From: Grant Likely <grant.likely@secretlab.ca>
To: David Daney <david.daney@cavium.com>,
Rob Herring <robherring2@gmail.com>
Cc: David Daney <ddaney.cavm@gmail.com>,
linux-mips@linux-mips.org, ralf@linux-mips.org,
devicetree-discuss@lists.ozlabs.org,
Rob Herring <rob.herring@calxeda.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 2/4] MIPS: Octeon: Setup irq_domains for interrupts.
Date: Wed, 28 Mar 2012 16:22:46 -0600 [thread overview]
Message-ID: <20120328222246.8AFA83E0CFE@localhost> (raw)
In-Reply-To: <4F7205F3.3000108@cavium.com>
On Tue, 27 Mar 2012 11:24:51 -0700, David Daney <david.daney@cavium.com> wrote:
> On 03/26/2012 06:56 PM, Rob Herring wrote:
> > On 03/26/2012 02:31 PM, David Daney wrote:
> >> From: David Daney<david.daney@cavium.com>
> [...]
> >> +static int octeon_irq_ciu_map(struct irq_domain *d,
> >> + unsigned int virq, irq_hw_number_t hw)
> >> +{
> >> + unsigned int line = hw>> 6;
> >> + unsigned int bit = hw& 63;
> >> +
> >> + if (virq>= 256)
> >> + return -EINVAL;
> >
> > Drop this. You should not care what the virq numbers are.
>
>
> I care that they don't overflow the width of octeon_irq_ciu_to_irq (a u8).
>
> So really I want to say:
>
> if (virq >= (1 << sizeof (octeon_irq_ciu_to_irq[0][0]))) {
> WARN(...);
> return -EINVAL;
> }
>
>
> I need a map external to any one irq_domain. The irq handling code
> handles sources that come from two separate irq_domains, as well as irqs
> that are not part of any domain.
You can get past this limitation by using the struct irq_data .hwirq and
.domain members for the irq ==> hwirq translation, and for hwirq ==>
irq the code should already have the context to know which user it is.
For the irqs that are not covered by an irq_domain, the driver is free
to set the .hwirq value directly. Ultimately however, it will
probably be best to add an irq domain for those users also.
...
Howver, I don't understand where the risk is in overflowing
octeon_irq_ciu_to_irq[][]. From what I can see, the virq value isn't
used at all to calculate the array dereference. line and bit are
calculated from the hwirq value. What am I missing?
g.
next prev parent reply other threads:[~2012-03-28 22:22 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-26 19:31 [PATCH v7 0/4] MIPS: OCTEON: Use Device Tree David Daney
2012-03-26 19:31 ` [PATCH v7 1/4] MIPS: Don't define early_init_devtree() and device_tree_init() in prom.c for CPU_CAVIUM_OCTEON David Daney
2012-03-26 19:31 ` [PATCH v7 2/4] MIPS: Octeon: Setup irq_domains for interrupts David Daney
[not found] ` <1332790281-9648-3-git-send-email-ddaney.cavm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-03-27 1:56 ` Rob Herring
2012-03-27 18:24 ` David Daney
2012-03-27 22:05 ` Rob Herring
2012-03-27 22:31 ` David Daney
2012-03-28 14:21 ` Rob Herring
2012-03-28 16:16 ` David Daney
2012-03-28 22:08 ` Grant Likely
2012-03-29 1:46 ` David Daney
2012-03-28 22:22 ` Grant Likely [this message]
2012-03-29 1:41 ` David Daney
[not found] ` <4F73BDAF.7020206-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
2012-03-30 21:54 ` Grant Likely
2012-03-28 22:31 ` Grant Likely
2012-03-29 1:33 ` David Daney
2012-03-26 19:31 ` [PATCH v7 3/4] MIPS: Octeon: Add device tree source files David Daney
2012-03-27 2:38 ` Rob Herring
2012-03-27 18:45 ` David Daney
2012-03-26 19:31 ` [PATCH v7 4/4] MIPS: Octeon: Initialize and fixup device tree David Daney
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