Two different interrupt-parents

Two different interrupt-parents

[jonsmirl-Re5JQEeQqe8AvxtiuMwx3w]

How do you define a device with two different interrupt parents?

I have a OTG USB controller where the main usb interrupt is on the
system interrupt controller and the OTG power interrupts are on a
cascaded PIC.

-- 
Jon Smirl
jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org

Re: Two different interrupt-parents

[Thomas Abraham]

On 15 April 2012 08:27, jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org <jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> How do you define a device with two different interrupt parents?
>
> I have a OTG USB controller where the main usb interrupt is on the
> system interrupt controller and the OTG power interrupts are on a
> cascaded PIC.

There was a discussion on this topic. The following is the link to
this discussion.

http://www.mail-archive.com/linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg10061.html
http://www.mail-archive.com/linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg10112.html

Thanks,
Thomas.

RE: Two different interrupt-parents

[Sethi Varun-B16395]

Hi Jon,
Does the cascaded PIC have an interrupt line to the system interrupt controller?

Regards
Varun

> -----Original Message-----
> From: devicetree-discuss-
> bounces+varun.sethi=freescale.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org [mailto:devicetree-
> discuss-bounces+varun.sethi=freescale.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org] On Behalf Of
> jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> Sent: Sunday, April 15, 2012 8:27 AM
> To: devicetree-discuss
> Subject: Two different interrupt-parents
> 
> How do you define a device with two different interrupt parents?
> 
> I have a OTG USB controller where the main usb interrupt is on the system
> interrupt controller and the OTG power interrupts are on a cascaded PIC.
> 
> --
> Jon Smirl
> jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss

Re: Two different interrupt-parents

[jonsmirl-Re5JQEeQqe8AvxtiuMwx3w]

On Sun, Apr 15, 2012 at 11:40 PM, Sethi Varun-B16395
<B16395-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
> Hi Jon,
> Does the cascaded PIC have an interrupt line to the system interrupt controller?

There are four cascade lines. The 128 inputs on the cascade controller
can be arbitrarily mapped onto these four lines.

>
> Regards
> Varun
>
>> -----Original Message-----
>> From: devicetree-discuss-
>> bounces+varun.sethi=freescale.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org [mailto:devicetree-
>> discuss-bounces+varun.sethi=freescale.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org] On Behalf Of
>> jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
>> Sent: Sunday, April 15, 2012 8:27 AM
>> To: devicetree-discuss
>> Subject: Two different interrupt-parents
>>
>> How do you define a device with two different interrupt parents?
>>
>> I have a OTG USB controller where the main usb interrupt is on the system
>> interrupt controller and the OTG power interrupts are on a cascaded PIC.
>>
>> --
>> Jon Smirl
>> jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
>> _______________________________________________
>> devicetree-discuss mailing list
>> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
>



-- 
Jon Smirl
jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org

RE: Two different interrupt-parents

[Sethi Varun-B16395]

You can use a 4 cell interrupt specifier (we use that in case of embedded power architecture platforms)
- First cell corresponds to one of the four cascade lines (coming from the cascaded pic)
- Second cell provides the interrupt sense information
- Third one tells the interrupt subtype (in your case should be the cascade power interrupt type)
- Fourth cell communicates the interrupt number corresponding to the cascaded pic.

There would be a single interrupt parent, which is the system interrupt controller. You would have
to translate the four cell interrupt specifier and also add cascaded interrupt handling
for the shared interrupt line.

-Varun

> -----Original Message-----
> From: jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org [mailto:jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org]
> Sent: Monday, April 16, 2012 9:32 AM
> To: Sethi Varun-B16395
> Cc: devicetree-discuss
> Subject: Re: Two different interrupt-parents
> 
> On Sun, Apr 15, 2012 at 11:40 PM, Sethi Varun-B16395
> <B16395-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
> > Hi Jon,
> > Does the cascaded PIC have an interrupt line to the system interrupt
> controller?
> 
> There are four cascade lines. The 128 inputs on the cascade controller
> can be arbitrarily mapped onto these four lines.
> 
> >
> > Regards
> > Varun
> >
> >> -----Original Message-----
> >> From: devicetree-discuss-
> >> bounces+varun.sethi=freescale.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> >> bounces+[mailto:devicetree-
> >> discuss-bounces+varun.sethi=freescale.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org] On Behalf
> >> discuss-bounces+Of
> >> jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> >> Sent: Sunday, April 15, 2012 8:27 AM
> >> To: devicetree-discuss
> >> Subject: Two different interrupt-parents
> >>
> >> How do you define a device with two different interrupt parents?
> >>
> >> I have a OTG USB controller where the main usb interrupt is on the
> >> system interrupt controller and the OTG power interrupts are on a
> cascaded PIC.
> >>
> >> --
> >> Jon Smirl
> >> jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> >> _______________________________________________
> >> devicetree-discuss mailing list
> >> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> >> https://lists.ozlabs.org/listinfo/devicetree-discuss
> >
> >
> 
> 
> 
> --
> Jon Smirl
> jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org

Re: Two different interrupt-parents

[David Gibson]

On Mon, Apr 16, 2012 at 04:14:25AM +0000, Sethi Varun-B16395 wrote:
> You can use a 4 cell interrupt specifier (we use that in case of embedded power architecture platforms)
> - First cell corresponds to one of the four cascade lines (coming from the cascaded pic)
> - Second cell provides the interrupt sense information
> - Third one tells the interrupt subtype (in your case should be the cascade power interrupt type)
> - Fourth cell communicates the interrupt number corresponding to the cascaded pic.
> 
> There would be a single interrupt parent, which is the system interrupt controller. You would have
> to translate the four cell interrupt specifier and also add cascaded interrupt handling
> for the shared interrupt line.

No, don't do that.

Use the interrupt-map technique described in the thread that got
linked earlier.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: Two different interrupt-parents

[jonsmirl-Re5JQEeQqe8AvxtiuMwx3w]

On Mon, Apr 16, 2012 at 12:53 AM, David Gibson
<david-xT8FGy+AXnRB3Ne2BGzF6laj5H9X9Tb+@public.gmane.org> wrote:
> On Mon, Apr 16, 2012 at 04:14:25AM +0000, Sethi Varun-B16395 wrote:
>> You can use a 4 cell interrupt specifier (we use that in case of embedded power architecture platforms)
>> - First cell corresponds to one of the four cascade lines (coming from the cascaded pic)
>> - Second cell provides the interrupt sense information
>> - Third one tells the interrupt subtype (in your case should be the cascade power interrupt type)
>> - Fourth cell communicates the interrupt number corresponding to the cascaded pic.
>>
>> There would be a single interrupt parent, which is the system interrupt controller. You would have
>> to translate the four cell interrupt specifier and also add cascaded interrupt handling
>> for the shared interrupt line.
>
> No, don't do that.
>
> Use the interrupt-map technique described in the thread that got
> linked earlier.

If interrupts had syntax like GPIOs this problem wouldn't exist.


>
> --
> David Gibson                    | I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
>                                | _way_ _around_!
> http://www.ozlabs.org/~dgibson



-- 
Jon Smirl
jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org

Re: Two different interrupt-parents

[David Gibson]

On Mon, Apr 16, 2012 at 09:55:09AM -0400, jonsmirl-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:
> On Mon, Apr 16, 2012 at 12:53 AM, David Gibson
> <david-xT8FGy+AXnRB3Ne2BGzF6laj5H9X9Tb+@public.gmane.org> wrote:
> > On Mon, Apr 16, 2012 at 04:14:25AM +0000, Sethi Varun-B16395 wrote:
> >> You can use a 4 cell interrupt specifier (we use that in case of embedded power architecture platforms)
> >> - First cell corresponds to one of the four cascade lines (coming from the cascaded pic)
> >> - Second cell provides the interrupt sense information
> >> - Third one tells the interrupt subtype (in your case should be the cascade power interrupt type)
> >> - Fourth cell communicates the interrupt number corresponding to the cascaded pic.
> >>
> >> There would be a single interrupt parent, which is the system interrupt controller. You would have
> >> to translate the four cell interrupt specifier and also add cascaded interrupt handling
> >> for the shared interrupt line.
> >
> > No, don't do that.
> >
> > Use the interrupt-map technique described in the thread that got
> > linked earlier.
> 
> If interrupts had syntax like GPIOs this problem wouldn't exist.

Yes, but the interrupt syntax has existed since forever, so it's not
worth creating a new incompatible one which we'd need to teach all the
clients about, when a perfectl good workaround like the interrupt-map
method exists.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson