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* [PATCH 0/4] ARM: at91: introduce AIC5 support
@ 2012-06-05 14:47 ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w
       [not found] ` <1338907664-24646-1-git-send-email-ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w @ 2012-06-05 14:47 UTC (permalink / raw)
  To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
  Cc: will.deacon-5wv7dgnIgG8,
	devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
	tglx-hfZtesqFncYOwBW4kG4KsQ

Hi,

This set of patches introduces AIC5 support with the goal to have only one
kernel image for all SOCs.
AIC5 can manage up to 128 irq lines and introduces a new register map and
a source select register to select the IRQ line we want to configure.

Regards

Ludovic

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2012-06-07  7:25 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-06-05 14:47 [PATCH 0/4] ARM: at91: introduce AIC5 support ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w
     [not found] ` <1338907664-24646-1-git-send-email-ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2012-06-05 14:47   ` [PATCH 1/4] ARM: at91: at91 based machines specify their own irq handler at run time ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w
2012-06-06  9:47     ` Christian Glindkamp
     [not found]       ` <20120606094748.GA26504-7uXufW8GZECzQB+pC5nmwQ@public.gmane.org>
2012-06-07  7:25         ` ludovic.desroches
2012-06-05 14:47 ` [PATCH 2/4] ARM: at91: fix irq_alloc_descs parameters for sparse irq ludovic.desroches
2012-06-05 14:47 ` [PATCH 3/4] ARM: at91: enable use of " ludovic.desroches
2012-06-05 14:47 ` [PATCH 4/4] ARM: at91: add AIC5 support ludovic.desroches

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