* [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-07 1:53 [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs Domenico Andreoli
@ 2012-10-07 1:53 ` Domenico Andreoli
2012-10-08 11:50 ` Florian Fainelli
` (2 more replies)
2012-10-07 1:53 ` [PATCH 2/6] ARM: bcm476x: Add system timer Domenico Andreoli
` (5 subsequent siblings)
6 siblings, 3 replies; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-07 1:53 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
[-- Attachment #1: arm-bcm476x-add-infrastructure.patch --]
[-- Type: text/plain, Size: 19900 bytes --]
From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
BCM476x's minimal infrastructure, Kernel's great reuse.
Look mom, no include/mach directory!
Signed-off-by: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
---
Documentation/devicetree/bindings/arm/bcm476x.txt | 8 +
MAINTAINERS | 9 +
arch/arm/Kconfig | 2 +
arch/arm/Makefile | 1 +
arch/arm/boot/dts/bcm476x-catalina.dts | 11 +
arch/arm/boot/dts/bcm476x.dtsi | 31 ++
arch/arm/configs/bcm476x_defconfig | 352 ++++++++++++++++++++++
arch/arm/include/debug/bcm476x-uncompress.h | 53 +++
arch/arm/include/debug/bcm476x.S | 35 ++
arch/arm/mach-bcm476x/Kconfig | 17 +
arch/arm/mach-bcm476x/Makefile | 1 +
arch/arm/mach-bcm476x/Makefile.boot | 5 +
arch/arm/mach-bcm476x/bcm476x.c | 83 +++++
13 files changed, 608 insertions(+)
Index: b/Documentation/devicetree/bindings/arm/bcm476x.txt
===================================================================
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm476x.txt
@@ -0,0 +1,8 @@
+Broadcom BCM476x device tree bindings
+-------------------------------------------
+
+Boards with the BCM476x SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm476x";
Index: b/arch/arm/Kconfig
===================================================================
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1017,6 +1017,8 @@ source "arch/arm/mach-mvebu/Kconfig"
source "arch/arm/mach-at91/Kconfig"
+source "arch/arm/mach-bcm476x/Kconfig"
+
source "arch/arm/mach-clps711x/Kconfig"
source "arch/arm/mach-cns3xxx/Kconfig"
Index: b/arch/arm/Makefile
===================================================================
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -137,6 +137,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x0020
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM2835) += bcm2835
+machine-$(CONFIG_ARCH_BCM476X) := bcm476x
machine-$(CONFIG_ARCH_CLPS711X) += clps711x
machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
machine-$(CONFIG_ARCH_DAVINCI) += davinci
Index: b/arch/arm/boot/dts/bcm476x-catalina.dts
===================================================================
--- /dev/null
+++ b/arch/arm/boot/dts/bcm476x-catalina.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+/include/ "bcm476x.dtsi"
+
+/ {
+ compatible = "brcm,catalina", "brcm,bcm476x";
+ model = "Broadcom Catalina";
+
+ memory {
+ reg = <0x30000000 0x4000000>;
+ };
+};
Index: b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================
--- /dev/null
+++ b/arch/arm/boot/dts/bcm476x.dtsi
@@ -0,0 +1,31 @@
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm476x";
+ model = "Broadcom BCM476x";
+
+ chosen {
+ bootargs = "earlyprintk";
+ };
+
+ amba {
+ compatible = "arm,amba-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ vic0: interrupt-controller@80000 {
+ compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
+ reg = <0x80000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ vic1: interrupt-controller@81000 {
+ compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
+ reg = <0x81000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
+};
Index: b/arch/arm/configs/bcm476x_defconfig
===================================================================
--- /dev/null
+++ b/arch/arm/configs/bcm476x_defconfig
@@ -0,0 +1,352 @@
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_NO_IOPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+CONFIG_DEFAULT_HOSTNAME="(none)"
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_KTIME_SCALAR=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_TINY_RCU=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_NAMESPACES=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_UID16=y
+CONFIG_KALLSYMS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_BLOCK=y
+CONFIG_MSDOS_PARTITION=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+CONFIG_INLINE_READ_UNLOCK=y
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+CONFIG_INLINE_WRITE_UNLOCK=y
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+CONFIG_MMU=y
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_V6=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_BCM476X=y
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_USE_DOMAINS=y
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
+CONFIG_ARM_NR_BANKS=8
+CONFIG_CPU_HAS_PMU=y
+CONFIG_MULTI_IRQ_HANDLER=y
+CONFIG_ARM_ERRATA_411920=y
+CONFIG_ARM_ERRATA_364296=y
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+CONFIG_ARM_AMBA=y
+CONFIG_VMSPLIT_3G=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_PREEMPT_NONE=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_MEMORY_ISOLATION=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_CROSS_MEMORY_ATTACH=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_DEPRECATED_PARAM_STRUCT=y
+CONFIG_USE_OF=y
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
+CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash"
+CONFIG_CMDLINE_FROM_BOOTLOADER=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_VFP=y
+CONFIG_BINFMT_ELF=y
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+CONFIG_HAVE_AOUT=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_HAVE_BPF_JIT=y
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_CMA=y
+CONFIG_CMA_SIZE_MBYTES=16
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_CMA_AREAS=7
+CONFIG_DTC=y
+CONFIG_OF=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+CONFIG_BLK_DEV=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_SCSI_MOD=y
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_INPUT=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_SERIAL_AMBA_PL010=y
+CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_PL022=y
+CONFIG_PINCTRL=y
+CONFIG_PINMUX=y
+CONFIG_PINCONF=y
+CONFIG_DEBUG_PINCTRL=y
+CONFIG_PINCTRL_BCM476X=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_SSB_POSSIBLE=y
+CONFIG_SSB=y
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+CONFIG_BCMA_POSSIBLE=y
+CONFIG_BCMA=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_BCM59040=y
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_HID=y
+CONFIG_HID_GENERIC=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_USB_MASS_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_DEBUG=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_RTC_LIB=y
+CONFIG_DMADEVICES=y
+CONFIG_AMBA_PL08X=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMMON_CLK_DEBUG=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS=y
+CONFIG_JBD=y
+CONFIG_JBD2=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_FANOTIFY=y
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_CRAMFS=y
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+CONFIG_ROMFS_ON_BLOCK=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=7
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_STRIP_ASM_SYMS=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_REDUCED=y
+CONFIG_FRAME_POINTER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_BCM476X_UART2=y
+CONFIG_DEBUG_LL_INCLUDE="debug/bcm476x.S"
+CONFIG_UNCOMPRESS_INCLUDE="debug/bcm476x-uncompress.h"
+CONFIG_EARLY_PRINTK=y
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_CRC16=y
+CONFIG_CRC32=y
+CONFIG_CRC32_SLICEBY8=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_AVERAGE=y
Index: b/arch/arm/mach-bcm476x/Makefile
===================================================================
--- /dev/null
+++ b/arch/arm/mach-bcm476x/Makefile
@@ -0,0 +1 @@
+obj-y += bcm476x.o
Index: b/arch/arm/mach-bcm476x/Makefile.boot
===================================================================
--- /dev/null
+++ b/arch/arm/mach-bcm476x/Makefile.boot
@@ -0,0 +1,5 @@
+ zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm4760-catalina.dtb
Index: b/arch/arm/mach-bcm476x/bcm476x.c
===================================================================
--- /dev/null
+++ b/arch/arm/mach-bcm476x/bcm476x.c
@@ -0,0 +1,83 @@
+/*
+ * Broadcom BCM476x SoCs platform support
+ *
+ * Copyright (C) 2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/hardware/vic.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+
+#define BCM476X_PERIPH_PHYS 0x00080000
+#define BCM476X_PERIPH_VIRT 0xd0080000
+#define BCM476X_PERIPH_SIZE SZ_512K
+
+static struct map_desc io_map __initdata = {
+ .virtual = BCM476X_PERIPH_VIRT,
+ .pfn = __phys_to_pfn(BCM476X_PERIPH_PHYS),
+ .length = BCM476X_PERIPH_SIZE,
+ .type = MT_DEVICE,
+};
+
+void __init bcm476x_map_io(void)
+{
+ iotable_init(&io_map, 1);
+}
+
+void __init bcm476x_init(void)
+{
+ int ret;
+
+ ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ if (ret) {
+ pr_err("of_platform_populate failed: %d\n", ret);
+ BUG();
+ }
+}
+
+static const struct of_device_id vic_of_match[] __initconst = {
+ { .compatible = "arm,pl192-vic", .data = vic_of_init, },
+ { /* Sentinel */ }
+};
+
+static void __init bcm476x_init_irq(void)
+{
+ of_irq_init(vic_of_match);
+}
+
+static void __init bcm476x_timer_init(void)
+{
+}
+
+struct sys_timer bcm476x_timer = {
+ .init = bcm476x_timer_init
+};
+
+static const char * const bcm476x_compat[] = {
+ "brcm,bcm476x",
+ NULL
+};
+
+DT_MACHINE_START(BCM476X, "Broadcom BCM476x")
+ .map_io = bcm476x_map_io,
+ .init_irq = bcm476x_init_irq,
+ .handle_irq = vic_handle_irq,
+ .init_machine = bcm476x_init,
+ .timer = &bcm476x_timer,
+ .dt_compat = bcm476x_compat
+MACHINE_END
Index: b/arch/arm/include/debug/bcm476x.S
===================================================================
--- /dev/null
+++ b/arch/arm/include/debug/bcm476x.S
@@ -0,0 +1,35 @@
+/*
+ * Broadcom BCM476x SoCs DEBUG_LL support
+ *
+ * Copyright (C) 2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#if defined(CONFIG_DEBUG_BCM476X_UART0)
+# define BCM476X_DEBUG_PHYS 0x000c0000
+# define BCM476X_DEBUG_VIRT 0xd00c0000
+#elif defined(CONFIG_DEBUG_BCM476X_UART1)
+# define BCM476X_DEBUG_PHYS 0x000c1000
+# define BCM476X_DEBUG_VIRT 0xd00c1000
+#elif defined(CONFIG_DEBUG_BCM476X_UART2)
+# define BCM476X_DEBUG_PHYS 0x000b2000
+# define BCM476X_DEBUG_VIRT 0xd00b2000
+#else
+# error Unknown BCM476x debug port
+#endif
+
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =BCM476X_DEBUG_PHYS
+ ldr \rv, =BCM476X_DEBUG_VIRT
+ .endm
+
+#include <asm/hardware/debug-pl01x.S>
Index: b/arch/arm/include/debug/bcm476x-uncompress.h
===================================================================
--- /dev/null
+++ b/arch/arm/include/debug/bcm476x-uncompress.h
@@ -0,0 +1,53 @@
+/*
+ * Broadcom BCM476x SoCs decompressor output
+ *
+ * Copyright (C) 2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+
+#if defined(CONFIG_DEBUG_BCM476X_UART0)
+# define BCM476X_DEBUG_PHYS 0x000c0000
+#elif defined(CONFIG_DEBUG_BCM476X_UART1)
+# define BCM476X_DEBUG_PHYS 0x000c1000
+#elif defined(CONFIG_DEBUG_BCM476X_UART2)
+# define BCM476X_DEBUG_PHYS 0x000b2000
+#else
+# error Unknown BCM476x debug port
+#endif
+
+#define BCM476X_UART_DR IOMEM(BCM476X_DEBUG_PHYS + UART01x_DR)
+#define BCM476X_UART_FR IOMEM(BCM476X_DEBUG_PHYS + UART01x_FR)
+#define BCM476X_UART_CR IOMEM(BCM476X_DEBUG_PHYS + UART011_CR)
+
+static inline void putc(int c)
+{
+ while (__raw_readl(BCM476X_UART_FR) & UART01x_FR_TXFF)
+ barrier();
+
+ __raw_writel(c, BCM476X_UART_DR);
+ barrier();
+}
+
+static inline void flush(void)
+{
+ int fr;
+
+ do {
+ fr = __raw_readl(BCM476X_UART_FR);
+ barrier();
+ } while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
+}
+
+#define arch_decomp_setup()
Index: b/arch/arm/mach-bcm476x/Kconfig
===================================================================
--- /dev/null
+++ b/arch/arm/mach-bcm476x/Kconfig
@@ -0,0 +1,17 @@
+config ARCH_BCM476X
+ bool "Broadcom BCM476X family" if ARCH_MULTI_V6
+ select CPU_V6
+ select ARM_VIC
+ select ARM_AMBA
+ select NO_IOPORT
+ select GENERIC_IRQ_CHIP
+ select SPARSE_IRQ
+ select MULTI_IRQ_HANDLER
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select GENERIC_CLOCKEVENTS
+ select CLKSRC_MMIO
+ select COMMON_CLK
+ select CLKDEV_LOOKUP
+ select PINCTRL
+ select PINMUX
+ select USE_OF
Index: b/MAINTAINERS
===================================================================
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1618,6 +1618,15 @@ F: arch/arm/boot/dts/bcm2835*
F: arch/arm/configs/bcm2835_defconfig
F: drivers/*/*bcm2835*
+ARM/BCM476x ARM ARCHITECTURE
+M: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+L: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm/mach-bcm476x
+F: arch/arm/boot/dts/bcm476x*
+F: arch/arm/configs/bcm476x_defconfig
+F: drivers/*/*bcm476x*
+
BROADCOM TG3 GIGABIT ETHERNET DRIVER
M: Matt Carlson <mcarlson-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
M: Michael Chan <mchan-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-07 1:53 ` [PATCH 1/6] ARM: bcm476x: Add infrastructure Domenico Andreoli
@ 2012-10-08 11:50 ` Florian Fainelli
2012-10-09 2:41 ` Stephen Warren
2012-10-08 12:14 ` Thomas Petazzoni
[not found] ` <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2 siblings, 1 reply; 46+ messages in thread
From: Florian Fainelli @ 2012-10-08 11:50 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Domenico Andreoli, devicetree-discuss, Domenico Andreoli
Hi Domenico,
On Sunday 07 October 2012 03:53:01 Domenico Andreoli wrote:
> From: Domenico Andreoli <domenico.andreoli@linux.com>
>
> BCM476x's minimal infrastructure, Kernel's great reuse.
>
> Look mom, no include/mach directory!
This is going to be in the commit, use something more sensible ;)
>
> Signed-off-by: Domenico Andreoli <domenico.andreoli@linux.com>
> ---
[snip]
> Index: b/arch/arm/boot/dts/bcm476x.dtsi
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/boot/dts/bcm476x.dtsi
> @@ -0,0 +1,31 @@
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + compatible = "brcm,bcm476x";
> + model = "Broadcom BCM476x";
> +
> + chosen {
> + bootargs = "earlyprintk";
> + };
> +
> + amba {
I would rather explicitely mention that the peripheral base address is at 0
so something like this:
amba@0 {
to make it clear that the peripherals declared as leaf nodes of this one are
at a relative address.
> + compatible = "arm,amba-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + vic0: interrupt-controller@80000 {
> + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
> + reg = <0x80000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> +
> + vic1: interrupt-controller@81000 {
> + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
> + reg = <0x81000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> + };
> +};
> Index: b/arch/arm/configs/bcm476x_defconfig
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/configs/bcm476x_defconfig
> @@ -0,0 +1,352 @@
[snip]
> +CONFIG_ARM_APPENDED_DTB=y
> +CONFIG_ARM_ATAG_DTB_COMPAT=y
> +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
> +CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash"
remove the specific init=, let people use the defaults.
--
Florian
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-08 11:50 ` Florian Fainelli
@ 2012-10-09 2:41 ` Stephen Warren
0 siblings, 0 replies; 46+ messages in thread
From: Stephen Warren @ 2012-10-09 2:41 UTC (permalink / raw)
To: Florian Fainelli
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 10/08/2012 05:50 AM, Florian Fainelli wrote:
> Hi Domenico,
>
> On Sunday 07 October 2012 03:53:01 Domenico Andreoli wrote:
>> From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
>>
>> BCM476x's minimal infrastructure, Kernel's great reuse.
>>
>> Look mom, no include/mach directory!
>> Index: b/arch/arm/boot/dts/bcm476x.dtsi
>> ===================================================================
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/bcm476x.dtsi
>> @@ -0,0 +1,31 @@
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> + compatible = "brcm,bcm476x";
>> + model = "Broadcom BCM476x";
>> +
>> + chosen {
>> + bootargs = "earlyprintk";
>> + };
>> +
>> + amba {
>
> I would rather explicitely mention that the peripheral base address is at 0
> so something like this:
>
> amba@0 {
>
> to make it clear that the peripherals declared as leaf nodes of this one are
> at a relative address.
>
>> + compatible = "arm,amba-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
You should only put a unit address ("@0") in the node name if there's a
matching reg property and the unit address is needed to make the node
name unique. Neither condition applies in this case.
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-07 1:53 ` [PATCH 1/6] ARM: bcm476x: Add infrastructure Domenico Andreoli
2012-10-08 11:50 ` Florian Fainelli
@ 2012-10-08 12:14 ` Thomas Petazzoni
2012-10-09 11:52 ` Domenico Andreoli
[not found] ` <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2 siblings, 1 reply; 46+ messages in thread
From: Thomas Petazzoni @ 2012-10-08 12:14 UTC (permalink / raw)
To: Domenico Andreoli; +Cc: Domenico Andreoli, devicetree-discuss, linux-arm-kernel
On Sun, 07 Oct 2012 03:53:01 +0200, Domenico Andreoli wrote:
> Index: b/arch/arm/mach-bcm476x/Makefile.boot
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/mach-bcm476x/Makefile.boot
> @@ -0,0 +1,5 @@
> + zreladdr-y := 0x00008000
> +params_phys-y := 0x00000100
> +initrd_phys-y := 0x00800000
Those params_phys-y and initrd_phys-y lines as useless as you're using
the Device Tree.
> +#define BCM476X_PERIPH_PHYS 0x00080000
> +#define BCM476X_PERIPH_VIRT 0xd0080000
This one should be defined with IOMEM(). Yes, you will have to add a
cast to make it play nicely with map_desc.virtual.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-08 12:14 ` Thomas Petazzoni
@ 2012-10-09 11:52 ` Domenico Andreoli
0 siblings, 0 replies; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-09 11:52 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Mon, Oct 08, 2012 at 02:14:55PM +0200, Thomas Petazzoni wrote:
>
> On Sun, 07 Oct 2012 03:53:01 +0200, Domenico Andreoli wrote:
>
> > Index: b/arch/arm/mach-bcm476x/Makefile.boot
> > ===================================================================
> > --- /dev/null
> > +++ b/arch/arm/mach-bcm476x/Makefile.boot
> > @@ -0,0 +1,5 @@
> > + zreladdr-y := 0x00008000
> > +params_phys-y := 0x00000100
> > +initrd_phys-y := 0x00800000
>
> Those params_phys-y and initrd_phys-y lines as useless as you're using
> the Device Tree.
>
> > +#define BCM476X_PERIPH_PHYS 0x00080000
> > +#define BCM476X_PERIPH_VIRT 0xd0080000
>
> This one should be defined with IOMEM(). Yes, you will have to add a
> cast to make it play nicely with map_desc.virtual.
Will address both of them. Thank you Thomas.
Regards,
Domenico
^ permalink raw reply [flat|nested] 46+ messages in thread
[parent not found: <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
[not found] ` <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2012-10-07 19:57 ` Jean-Christophe PLAGNIOL-VILLARD
[not found] ` <20121007195759.GG12801-RQcB7r2h9QmfDR2tN2SG5Ni2O/JbrIOy@public.gmane.org>
2012-10-09 2:48 ` Stephen Warren
` (3 subsequent siblings)
4 siblings, 1 reply; 46+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-10-07 19:57 UTC (permalink / raw)
To: Domenico Andreoli
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 03:53 Sun 07 Oct , Domenico Andreoli wrote:
> From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
>
> BCM476x's minimal infrastructure, Kernel's great reuse.
>
> Look mom, no include/mach directory!
>
> Signed-off-by: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
> ---
> Documentation/devicetree/bindings/arm/bcm476x.txt | 8 +
> MAINTAINERS | 9 +
> arch/arm/Kconfig | 2 +
> arch/arm/Makefile | 1 +
> arch/arm/boot/dts/bcm476x-catalina.dts | 11 +
> arch/arm/boot/dts/bcm476x.dtsi | 31 ++
> arch/arm/configs/bcm476x_defconfig | 352 ++++++++++++++++++++++
> arch/arm/include/debug/bcm476x-uncompress.h | 53 +++
> arch/arm/include/debug/bcm476x.S | 35 ++
> arch/arm/mach-bcm476x/Kconfig | 17 +
> arch/arm/mach-bcm476x/Makefile | 1 +
> arch/arm/mach-bcm476x/Makefile.boot | 5 +
> arch/arm/mach-bcm476x/bcm476x.c | 83 +++++
> 13 files changed, 608 insertions(+)
>
> Index: b/Documentation/devicetree/bindings/arm/bcm476x.txt
> ===================================================================
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm476x.txt
> @@ -0,0 +1,8 @@
> +Broadcom BCM476x device tree bindings
> +-------------------------------------------
> +
> +Boards with the BCM476x SoC shall have the following properties:
> +
> +Required root node property:
> +
> +compatible = "brcm,bcm476x";
> Index: b/arch/arm/Kconfig
> ===================================================================
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1017,6 +1017,8 @@ source "arch/arm/mach-mvebu/Kconfig"
>
> source "arch/arm/mach-at91/Kconfig"
>
> +source "arch/arm/mach-bcm476x/Kconfig"
> +
> source "arch/arm/mach-clps711x/Kconfig"
>
> source "arch/arm/mach-cns3xxx/Kconfig"
> Index: b/arch/arm/Makefile
> ===================================================================
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -137,6 +137,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x0020
> # by CONFIG_* macro name.
> machine-$(CONFIG_ARCH_AT91) += at91
> machine-$(CONFIG_ARCH_BCM2835) += bcm2835
> +machine-$(CONFIG_ARCH_BCM476X) := bcm476x
> machine-$(CONFIG_ARCH_CLPS711X) += clps711x
> machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
> machine-$(CONFIG_ARCH_DAVINCI) += davinci
> Index: b/arch/arm/boot/dts/bcm476x-catalina.dts
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/boot/dts/bcm476x-catalina.dts
> @@ -0,0 +1,11 @@
> +/dts-v1/;
> +/include/ "bcm476x.dtsi"
> +
> +/ {
> + compatible = "brcm,catalina", "brcm,bcm476x";
> + model = "Broadcom Catalina";
> +
> + memory {
> + reg = <0x30000000 0x4000000>;
> + };
> +};
> Index: b/arch/arm/boot/dts/bcm476x.dtsi
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/boot/dts/bcm476x.dtsi
> @@ -0,0 +1,31 @@
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + compatible = "brcm,bcm476x";
> + model = "Broadcom BCM476x";
> +
> + chosen {
> + bootargs = "earlyprintk";
> + };
> +
> + amba {
> + compatible = "arm,amba-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + vic0: interrupt-controller@80000 {
> + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
why brcm specific compatbile?
> + reg = <0x80000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> +
> + vic1: interrupt-controller@81000 {
> + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
> + reg = <0x81000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> + };
> +};
> Index: b/arch/arm/configs/bcm476x_defconfig
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/configs/bcm476x_defconfig
> @@ -0,0 +1,352 @@
> +CONFIG_ARM=y
> +CONFIG_SYS_SUPPORTS_APM_EMULATION=y
> +CONFIG_HAVE_PROC_CPU=y
> +CONFIG_NO_IOPORT=y
> +CONFIG_STACKTRACE_SUPPORT=y
> +CONFIG_HAVE_LATENCYTOP_SUPPORT=y
> +CONFIG_LOCKDEP_SUPPORT=y
> +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
> +CONFIG_RWSEM_GENERIC_SPINLOCK=y
> +CONFIG_GENERIC_HWEIGHT=y
> +CONFIG_GENERIC_CALIBRATE_DELAY=y
> +CONFIG_NEED_DMA_MAP_STATE=y
> +CONFIG_VECTORS_BASE=0xffff0000
> +CONFIG_ARM_PATCH_PHYS_VIRT=y
> +CONFIG_GENERIC_BUG=y
> +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
> +CONFIG_HAVE_IRQ_WORK=y
> +CONFIG_EXPERIMENTAL=y
> +CONFIG_BROKEN_ON_SMP=y
> +CONFIG_INIT_ENV_ARG_LIMIT=32
> +CONFIG_CROSS_COMPILE=""
> +CONFIG_LOCALVERSION=""
> +CONFIG_HAVE_KERNEL_GZIP=y
> +CONFIG_HAVE_KERNEL_LZMA=y
> +CONFIG_HAVE_KERNEL_XZ=y
> +CONFIG_HAVE_KERNEL_LZO=y
> +CONFIG_KERNEL_GZIP=y
> +CONFIG_DEFAULT_HOSTNAME="(none)"
> +CONFIG_HAVE_GENERIC_HARDIRQS=y
> +CONFIG_GENERIC_HARDIRQS=y
> +CONFIG_GENERIC_IRQ_PROBE=y
> +CONFIG_GENERIC_IRQ_SHOW=y
> +CONFIG_HARDIRQS_SW_RESEND=y
> +CONFIG_GENERIC_IRQ_CHIP=y
> +CONFIG_IRQ_DOMAIN=y
> +CONFIG_IRQ_DOMAIN_DEBUG=y
> +CONFIG_SPARSE_IRQ=y
> +CONFIG_KTIME_SCALAR=y
> +CONFIG_GENERIC_CLOCKEVENTS=y
> +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
> +CONFIG_TINY_RCU=y
> +CONFIG_IKCONFIG=y
> +CONFIG_IKCONFIG_PROC=y
> +CONFIG_LOG_BUF_SHIFT=17
> +CONFIG_NAMESPACES=y
> +CONFIG_BLK_DEV_INITRD=y
> +CONFIG_INITRAMFS_SOURCE=""
> +CONFIG_RD_GZIP=y
> +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
> +CONFIG_SYSCTL=y
> +CONFIG_ANON_INODES=y
> +CONFIG_EXPERT=y
> +CONFIG_UID16=y
> +CONFIG_KALLSYMS=y
> +CONFIG_HOTPLUG=y
> +CONFIG_PRINTK=y
> +CONFIG_BUG=y
> +CONFIG_ELF_CORE=y
> +CONFIG_BASE_FULL=y
> +CONFIG_FUTEX=y
> +CONFIG_EPOLL=y
> +CONFIG_SIGNALFD=y
> +CONFIG_TIMERFD=y
> +CONFIG_EVENTFD=y
> +CONFIG_SHMEM=y
> +CONFIG_AIO=y
> +CONFIG_EMBEDDED=y
> +CONFIG_HAVE_PERF_EVENTS=y
> +CONFIG_PERF_USE_VMALLOC=y
> +CONFIG_VM_EVENT_COUNTERS=y
> +CONFIG_SLAB=y
> +CONFIG_HAVE_OPROFILE=y
> +CONFIG_HAVE_KPROBES=y
> +CONFIG_HAVE_KRETPROBES=y
> +CONFIG_HAVE_ARCH_TRACEHOOK=y
> +CONFIG_HAVE_DMA_ATTRS=y
> +CONFIG_HAVE_DMA_CONTIGUOUS=y
> +CONFIG_GENERIC_SMP_IDLE_THREAD=y
> +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
> +CONFIG_HAVE_CLK=y
> +CONFIG_HAVE_DMA_API_DEBUG=y
> +CONFIG_HAVE_ARCH_JUMP_LABEL=y
> +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
> +CONFIG_HAVE_GENERIC_DMA_COHERENT=y
> +CONFIG_SLABINFO=y
> +CONFIG_RT_MUTEXES=y
> +CONFIG_BASE_SMALL=0
> +CONFIG_MODULES=y
> +CONFIG_MODULE_UNLOAD=y
> +CONFIG_BLOCK=y
> +CONFIG_MSDOS_PARTITION=y
> +CONFIG_IOSCHED_NOOP=y
> +CONFIG_DEFAULT_NOOP=y
> +CONFIG_DEFAULT_IOSCHED="noop"
> +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
> +CONFIG_INLINE_READ_UNLOCK=y
> +CONFIG_INLINE_READ_UNLOCK_IRQ=y
> +CONFIG_INLINE_WRITE_UNLOCK=y
> +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
> +CONFIG_MMU=y
> +CONFIG_ARCH_MULTIPLATFORM=y
> +CONFIG_ARCH_MULTI_V6=y
> +CONFIG_ARCH_MULTI_V6_V7=y
> +CONFIG_ARCH_BCM476X=y
> +CONFIG_CPU_V6=y
> +CONFIG_CPU_32v6=y
> +CONFIG_CPU_ABRT_EV6=y
> +CONFIG_CPU_PABRT_V6=y
> +CONFIG_CPU_CACHE_V6=y
> +CONFIG_CPU_CACHE_VIPT=y
> +CONFIG_CPU_COPY_V6=y
> +CONFIG_CPU_TLB_V6=y
> +CONFIG_CPU_HAS_ASID=y
> +CONFIG_CPU_CP15=y
> +CONFIG_CPU_CP15_MMU=y
> +CONFIG_CPU_USE_DOMAINS=y
> +CONFIG_ARM_THUMB=y
> +CONFIG_ARM_L1_CACHE_SHIFT=5
> +CONFIG_ARM_DMA_MEM_BUFFERABLE=y
> +CONFIG_ARM_NR_BANKS=8
> +CONFIG_CPU_HAS_PMU=y
> +CONFIG_MULTI_IRQ_HANDLER=y
> +CONFIG_ARM_ERRATA_411920=y
> +CONFIG_ARM_ERRATA_364296=y
> +CONFIG_ARM_VIC=y
> +CONFIG_ARM_VIC_NR=2
> +CONFIG_ARM_AMBA=y
> +CONFIG_VMSPLIT_3G=y
> +CONFIG_PAGE_OFFSET=0xC0000000
> +CONFIG_ARCH_NR_GPIO=0
> +CONFIG_PREEMPT_NONE=y
> +CONFIG_PREEMPT_COUNT=y
> +CONFIG_HZ=100
> +CONFIG_AEABI=y
> +CONFIG_HAVE_ARCH_PFN_VALID=y
> +CONFIG_SELECT_MEMORY_MODEL=y
> +CONFIG_FLATMEM_MANUAL=y
> +CONFIG_FLATMEM=y
> +CONFIG_FLAT_NODE_MEM_MAP=y
> +CONFIG_HAVE_MEMBLOCK=y
> +CONFIG_MEMORY_ISOLATION=y
> +CONFIG_PAGEFLAGS_EXTENDED=y
> +CONFIG_SPLIT_PTLOCK_CPUS=4
> +CONFIG_MIGRATION=y
> +CONFIG_ZONE_DMA_FLAG=0
> +CONFIG_VIRT_TO_BUS=y
> +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
> +CONFIG_CROSS_MEMORY_ATTACH=y
> +CONFIG_NEED_PER_CPU_KM=y
> +CONFIG_FORCE_MAX_ZONEORDER=11
> +CONFIG_ALIGNMENT_TRAP=y
> +CONFIG_DEPRECATED_PARAM_STRUCT=y
> +CONFIG_USE_OF=y
> +CONFIG_ZBOOT_ROM_TEXT=0
> +CONFIG_ZBOOT_ROM_BSS=0
> +CONFIG_ARM_APPENDED_DTB=y
> +CONFIG_ARM_ATAG_DTB_COMPAT=y
> +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
> +CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash"
> +CONFIG_CMDLINE_FROM_BOOTLOADER=y
> +CONFIG_AUTO_ZRELADDR=y
> +CONFIG_VFP=y
> +CONFIG_BINFMT_ELF=y
> +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
> +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
> +CONFIG_HAVE_AOUT=y
> +CONFIG_ARCH_SUSPEND_POSSIBLE=y
> +CONFIG_HAVE_BPF_JIT=y
> +CONFIG_UEVENT_HELPER_PATH=""
> +CONFIG_DEVTMPFS=y
> +CONFIG_DEVTMPFS_MOUNT=y
> +CONFIG_STANDALONE=y
> +CONFIG_PREVENT_FIRMWARE_BUILD=y
> +CONFIG_FW_LOADER=y
> +CONFIG_EXTRA_FIRMWARE=""
> +CONFIG_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=16
> +CONFIG_CMA_SIZE_SEL_MBYTES=y
> +CONFIG_CMA_ALIGNMENT=8
> +CONFIG_CMA_AREAS=7
> +CONFIG_DTC=y
> +CONFIG_OF=y
> +CONFIG_PROC_DEVICETREE=y
> +CONFIG_OF_FLATTREE=y
> +CONFIG_OF_EARLY_FLATTREE=y
> +CONFIG_OF_ADDRESS=y
> +CONFIG_OF_IRQ=y
> +CONFIG_OF_DEVICE=y
> +CONFIG_OF_I2C=y
> +CONFIG_BLK_DEV=y
> +CONFIG_BLK_DEV_LOOP=y
> +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
> +CONFIG_BLK_DEV_RAM=y
> +CONFIG_BLK_DEV_RAM_COUNT=16
> +CONFIG_BLK_DEV_RAM_SIZE=4096
> +CONFIG_SCSI_MOD=y
> +CONFIG_SCSI=y
> +CONFIG_SCSI_DMA=y
> +CONFIG_BLK_DEV_SD=y
> +CONFIG_SCSI_MULTI_LUN=y
> +CONFIG_INPUT=y
> +CONFIG_INPUT_EVDEV=y
> +CONFIG_SERIO=y
> +CONFIG_SERIO_SERPORT=y
> +CONFIG_VT=y
> +CONFIG_CONSOLE_TRANSLATIONS=y
> +CONFIG_VT_CONSOLE=y
> +CONFIG_HW_CONSOLE=y
> +CONFIG_UNIX98_PTYS=y
> +CONFIG_SERIAL_AMBA_PL010=y
> +CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
> +CONFIG_SERIAL_AMBA_PL011=y
> +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
> +CONFIG_SERIAL_CORE=y
> +CONFIG_SERIAL_CORE_CONSOLE=y
> +CONFIG_I2C=y
> +CONFIG_I2C_BOARDINFO=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_ALGOBIT=y
> +CONFIG_SPI=y
> +CONFIG_SPI_MASTER=y
> +CONFIG_SPI_PL022=y
> +CONFIG_PINCTRL=y
> +CONFIG_PINMUX=y
> +CONFIG_PINCONF=y
> +CONFIG_DEBUG_PINCTRL=y
> +CONFIG_PINCTRL_BCM476X=y
> +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
> +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
> +CONFIG_SSB_POSSIBLE=y
> +CONFIG_SSB=y
> +CONFIG_SSB_SDIOHOST_POSSIBLE=y
> +CONFIG_BCMA_POSSIBLE=y
> +}
> +
> +static void __init bcm476x_timer_init(void)
> +{
> +}
> +
> +struct sys_timer bcm476x_timer = {
> + .init = bcm476x_timer_init
> +};
> +
> +static const char * const bcm476x_compat[] = {
> + "brcm,bcm476x",
> + NULL
> +};
> +
> +DT_MACHINE_START(BCM476X, "Broadcom BCM476x")
> + .map_io = bcm476x_map_io,
> + .init_irq = bcm476x_init_irq,
> + .handle_irq = vic_handle_irq,
> + .init_machine = bcm476x_init,
> + .timer = &bcm476x_timer,
> + .dt_compat = bcm476x_compat
> +MACHINE_END
> Index: b/arch/arm/include/debug/bcm476x.S
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/include/debug/bcm476x.S
> @@ -0,0 +1,35 @@
> +/*
> + * Broadcom BCM476x SoCs DEBUG_LL support
> + *
> + * Copyright (C) 2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#if defined(CONFIG_DEBUG_BCM476X_UART0)
> +# define BCM476X_DEBUG_PHYS 0x000c0000
> +# define BCM476X_DEBUG_VIRT 0xd00c0000
> +#elif defined(CONFIG_DEBUG_BCM476X_UART1)
> +# define BCM476X_DEBUG_PHYS 0x000c1000
> +# define BCM476X_DEBUG_VIRT 0xd00c1000
> +#elif defined(CONFIG_DEBUG_BCM476X_UART2)
> +# define BCM476X_DEBUG_PHYS 0x000b2000
> +# define BCM476X_DEBUG_VIRT 0xd00b2000
> +#else
> +# error Unknown BCM476x debug port
> +#endif
can't you detect it?
> +
> + .macro addruart, rp, rv, tmp
> + ldr \rp, =BCM476X_DEBUG_PHYS
> + ldr \rv, =BCM476X_DEBUG_VIRT
> + .endm
> +
> +#include <asm/hardware/debug-pl01x.S>
> Index: b/arch/arm/include/debug/bcm476x-uncompress.h
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/include/debug/bcm476x-uncompress.h
> @@ -0,0 +1,53 @@
> +/*
> + * Broadcom BCM476x SoCs decompressor output
> + *
> + * Copyright (C) 2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/io.h>
> +#include <linux/amba/serial.h>
> +
> +#if defined(CONFIG_DEBUG_BCM476X_UART0)
> +# define BCM476X_DEBUG_PHYS 0x000c0000
> +#elif defined(CONFIG_DEBUG_BCM476X_UART1)
> +# define BCM476X_DEBUG_PHYS 0x000c1000
> +#elif defined(CONFIG_DEBUG_BCM476X_UART2)
> +# define BCM476X_DEBUG_PHYS 0x000b2000
> +#else
> +# error Unknown BCM476x debug port
ditto here by using the first one enable by the bootloader
> +#endif
> +
> +#define BCM476X_UART_DR IOMEM(BCM476X_DEBUG_PHYS + UART01x_DR)
> +#define BCM476X_UART_FR IOMEM(BCM476X_DEBUG_PHYS + UART01x_FR)
> +#define BCM476X_UART_CR IOMEM(BCM476X_DEBUG_PHYS + UART011_CR)
> +
> +static inline void putc(int c)
> +{
> + while (__raw_readl(BCM476X_UART_FR) & UART01x_FR_TXFF)
> + barrier();
> +
> + __raw_writel(c, BCM476X_UART_DR);
> + barrier();
> +}
> +
> +static inline void flush(void)
> +{
> + int fr;
> +
> + do {
> + fr = __raw_readl(BCM476X_UART_FR);
> + barrier();
> + } while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
> +}
> +
> +#define arch_decomp_setup()
> Index: b/arch/arm/mach-bcm476x/Kconfig
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/mach-bcm476x/Kconfig
> @@ -0,0 +1,17 @@
> +config ARCH_BCM476X
> + bool "Broadcom BCM476X family" if ARCH_MULTI_V6
> + select CPU_V6
> + select ARM_VIC
> + select ARM_AMBA
> + select NO_IOPORT
> + select GENERIC_IRQ_CHIP
> + select SPARSE_IRQ
> + select MULTI_IRQ_HANDLER
> + select ARCH_WANT_OPTIONAL_GPIOLIB
> + select GENERIC_CLOCKEVENTS
> + select CLKSRC_MMIO
> + select COMMON_CLK
> + select CLKDEV_LOOKUP
> + select PINCTRL
> + select PINMUX
> + select USE_OF
> Index: b/MAINTAINERS
> ===================================================================
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1618,6 +1618,15 @@ F: arch/arm/boot/dts/bcm2835*
> F: arch/arm/configs/bcm2835_defconfig
> F: drivers/*/*bcm2835*
>
> +ARM/BCM476x ARM ARCHITECTURE
> +M: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
> +L: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org (moderated for non-subscribers)
> +S: Maintained
> +F: arch/arm/mach-bcm476x
> +F: arch/arm/boot/dts/bcm476x*
> +F: arch/arm/configs/bcm476x_defconfig
> +F: drivers/*/*bcm476x*
> +
> BROADCOM TG3 GIGABIT ETHERNET DRIVER
> M: Matt Carlson <mcarlson-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> M: Michael Chan <mchan-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
[not found] ` <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-07 19:57 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2012-10-09 2:48 ` Stephen Warren
[not found] ` <50739074.8000001-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-09 3:08 ` Stephen Warren
` (2 subsequent siblings)
4 siblings, 1 reply; 46+ messages in thread
From: Stephen Warren @ 2012-10-09 2:48 UTC (permalink / raw)
To: Domenico Andreoli
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 10/06/2012 07:53 PM, Domenico Andreoli wrote:
> BCM476x's minimal infrastructure, Kernel's great reuse.
> Index: b/arch/arm/boot/dts/bcm476x.dtsi
> + chosen {
> + bootargs = "earlyprintk";
> + };
> Index: b/arch/arm/configs/bcm476x_defconfig
> +CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash"
> +CONFIG_CMDLINE_FROM_BOOTLOADER=y
I'm not sure you need to specify a default command-line in both those
places. I would be inclined to leave out the root= option as well; it's
pretty specific to however the user's SD card was partitioned, so there
could be quite some variation there I think? Oh, especially since I
think you said there was no SD driver yet anyway?
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
[not found] ` <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-07 19:57 ` Jean-Christophe PLAGNIOL-VILLARD
2012-10-09 2:48 ` Stephen Warren
@ 2012-10-09 3:08 ` Stephen Warren
[not found] ` <50739541.2030603-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-09 9:18 ` Arnd Bergmann
2012-10-12 7:06 ` Domenico Andreoli
4 siblings, 1 reply; 46+ messages in thread
From: Stephen Warren @ 2012-10-09 3:08 UTC (permalink / raw)
To: Domenico Andreoli
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 10/06/2012 07:53 PM, Domenico Andreoli wrote:
> BCM476x's minimal infrastructure, Kernel's great reuse.
> Index: b/arch/arm/configs/bcm476x_defconfig
> +CONFIG_DEBUG_BCM476X_UART2=y
> +CONFIG_DEBUG_LL_INCLUDE="debug/bcm476x.S"
> +CONFIG_UNCOMPRESS_INCLUDE="debug/bcm476x-uncompress.h"
Was this defconfig file created by "make savedefconfig ; mv defconfig
arch/arm/configs/bcm476x_defconfig"? If you do that, I think those last
two lines I quoted above (and many more) will be removed, since those
values are selected by CONFIG_DEBUG_BCM476X_UART2.
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
[not found] ` <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (2 preceding siblings ...)
2012-10-09 3:08 ` Stephen Warren
@ 2012-10-09 9:18 ` Arnd Bergmann
[not found] ` <201210090918.56725.arnd-r2nGTMty4D4@public.gmane.org>
2012-10-12 7:06 ` Domenico Andreoli
4 siblings, 1 reply; 46+ messages in thread
From: Arnd Bergmann @ 2012-10-09 9:18 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Stephen Warren
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
Hi Domenico,
Your series looks very nice, thanks for the contribution!
Stephen has already covered everything I would have commented and
more, except for one thing that I found:
On Sunday 07 October 2012, Domenico Andreoli wrote:
> Index: b/arch/arm/boot/dts/bcm476x.dtsi
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/boot/dts/bcm476x.dtsi
> @@ -0,0 +1,31 @@
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + compatible = "brcm,bcm476x";
> + model = "Broadcom BCM476x";
> +
> ...
> + vic0: interrupt-controller@80000 {
> + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
> + reg = <0x80000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
I suppose that the name of the soc is not actually "bcm476x" but you
are in fact referring to the family including bcm4760 and bcm4761.
The convention in the device tree is to always use specific product
numbers, rather than wildcards. If one of the two has a superset of
the hardware of the other, I would recommend you pick that number
in the device tree and in the drivers, and for the other one, you
just mark them as compatible to both of them.
Arnd
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
[not found] ` <20121007015405.958959522-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (3 preceding siblings ...)
2012-10-09 9:18 ` Arnd Bergmann
@ 2012-10-12 7:06 ` Domenico Andreoli
2012-10-12 7:26 ` Thomas Petazzoni
4 siblings, 1 reply; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-12 7:06 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Thomas,
On Sun, Oct 07, 2012 at 03:53:01AM +0200, Domenico Andreoli wrote:
>
> Index: b/arch/arm/mach-bcm476x/bcm476x.c
> ===================================================================
> --- /dev/null
> +++ b/arch/arm/mach-bcm476x/bcm476x.c
...
> +
> +#define BCM476X_PERIPH_PHYS 0x00080000
> +#define BCM476X_PERIPH_VIRT 0xd0080000
Are you sure I should use IOMEM() here? The only place I use these macros
is here below, for which I should add a cast to silent the compiler. All
the other accesses go throught ioremap/readl/writel, if not I want to fix it.
> +
> +static struct map_desc io_map __initdata = {
> + .virtual = BCM476X_PERIPH_VIRT,
> + .pfn = __phys_to_pfn(BCM476X_PERIPH_PHYS),
> + .length = BCM476X_PERIPH_SIZE,
> + .type = MT_DEVICE,
> +};
Regards,
Domenico
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-12 7:06 ` Domenico Andreoli
@ 2012-10-12 7:26 ` Thomas Petazzoni
2012-10-12 8:03 ` Arnd Bergmann
0 siblings, 1 reply; 46+ messages in thread
From: Thomas Petazzoni @ 2012-10-12 7:26 UTC (permalink / raw)
To: Domenico Andreoli; +Cc: devicetree-discuss, linux-arm-kernel
On Fri, 12 Oct 2012 09:06:51 +0200, Domenico Andreoli wrote:
> > +#define BCM476X_PERIPH_PHYS 0x00080000
> > +#define BCM476X_PERIPH_VIRT 0xd0080000
>
> Are you sure I should use IOMEM() here? The only place I use these
> macros is here below, for which I should add a cast to silent the
> compiler. All the other accesses go throught ioremap/readl/writel, if
> not I want to fix it.
>
> > +
> > +static struct map_desc io_map __initdata = {
> > + .virtual = BCM476X_PERIPH_VIRT,
> > + .pfn = __phys_to_pfn(BCM476X_PERIPH_PHYS),
> > + .length = BCM476X_PERIPH_SIZE,
> > + .type = MT_DEVICE,
> > +};
My understanding is that all virtual address constants should now be
defined to have the void __iomem * type (i.e, using IOMEM). In the
future, the idea is that map_desc.virtual might be switched to the void
__iomem * type as well.
But others (Arnd?) will confirm (or not) this.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-12 7:26 ` Thomas Petazzoni
@ 2012-10-12 8:03 ` Arnd Bergmann
2012-10-12 8:12 ` Thomas Petazzoni
0 siblings, 1 reply; 46+ messages in thread
From: Arnd Bergmann @ 2012-10-12 8:03 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Thomas Petazzoni, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
On Friday 12 October 2012, Thomas Petazzoni wrote:
> My understanding is that all virtual address constants should now be
> defined to have the void __iomem * type (i.e, using IOMEM). In the
> future, the idea is that map_desc.virtual might be switched to the void
> __iomem * type as well.
>
> But others (Arnd?) will confirm (or not) this.
I would certainly like to see this, yes. I had a patch for it ages ago,
but would start over again if I did this now.
I don't have time to do the conversion at the moment, but I would certainly
welcome a patch that does it. I can give some details about the problems
with that and how I think they should be solved.
Arnd
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-12 8:03 ` Arnd Bergmann
@ 2012-10-12 8:12 ` Thomas Petazzoni
2012-10-12 10:48 ` Arnd Bergmann
0 siblings, 1 reply; 46+ messages in thread
From: Thomas Petazzoni @ 2012-10-12 8:12 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: devicetree-discuss, Domenico Andreoli, linux-arm-kernel
Arnd,
On Fri, 12 Oct 2012 08:03:54 +0000, Arnd Bergmann wrote:
> I would certainly like to see this, yes. I had a patch for it ages
> ago, but would start over again if I did this now.
>
> I don't have time to do the conversion at the moment, but I would
> certainly welcome a patch that does it. I can give some details about
> the problems with that and how I think they should be solved.
I did start working on such a patch a few weeks ago, but converting all
the platforms to use IOMEM() was really boring. But now you did that, I
can try to revive my patch, see if it works, and post it if you're
interested.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-12 8:12 ` Thomas Petazzoni
@ 2012-10-12 10:48 ` Arnd Bergmann
2012-10-12 11:01 ` Thomas Petazzoni
0 siblings, 1 reply; 46+ messages in thread
From: Arnd Bergmann @ 2012-10-12 10:48 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Friday 12 October 2012, Thomas Petazzoni wrote:
> On Fri, 12 Oct 2012 08:03:54 +0000, Arnd Bergmann wrote:
>
> > I would certainly like to see this, yes. I had a patch for it ages
> > ago, but would start over again if I did this now.
> >
> > I don't have time to do the conversion at the moment, but I would
> > certainly welcome a patch that does it. I can give some details about
> > the problems with that and how I think they should be solved.
>
> I did start working on such a patch a few weeks ago, but converting all
> the platforms to use IOMEM() was really boring. But now you did that, I
> can try to revive my patch, see if it works, and post it if you're
> interested.
Ok, cool!
The main thing to watch out for are mappings that are not for MMIO,
such as the call to create_mapping() in map_lowmem() or in
devicemaps_init().
I would suggest making struct map_desc specific to callers of
iotable_init() and changing the prototype for create_mapping() to
void __init create_mapping(unsigned long virtual, unsigned long pfn,
size_t length, unsigned int type);
That means we still need to add one type cast in iotable_init(), but
everything else should become simpler. There are a few instances in
platform code that use MT_MEMORY rather MT_DEVICE. At least the TCM
one should not really be __iomem, but I'm not sure about the various
TI SRAM locations. Probably doesn't matter all that much for those.
Arnd
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-12 10:48 ` Arnd Bergmann
@ 2012-10-12 11:01 ` Thomas Petazzoni
2012-10-12 11:17 ` Arnd Bergmann
0 siblings, 1 reply; 46+ messages in thread
From: Thomas Petazzoni @ 2012-10-12 11:01 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: devicetree-discuss, Domenico Andreoli, linux-arm-kernel
Dear Arnd Bergmann,
On Fri, 12 Oct 2012 10:48:24 +0000, Arnd Bergmann wrote:
> The main thing to watch out for are mappings that are not for MMIO,
> such as the call to create_mapping() in map_lowmem() or in
> devicemaps_init().
>
> I would suggest making struct map_desc specific to callers of
> iotable_init() and changing the prototype for create_mapping() to
>
> void __init create_mapping(unsigned long virtual, unsigned long pfn,
> size_t length, unsigned int type);
Yes, this is exactly what I've done. I'll rebase my work, test and send
it.
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH 1/6] ARM: bcm476x: Add infrastructure
2012-10-12 11:01 ` Thomas Petazzoni
@ 2012-10-12 11:17 ` Arnd Bergmann
0 siblings, 0 replies; 46+ messages in thread
From: Arnd Bergmann @ 2012-10-12 11:17 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Friday 12 October 2012, Thomas Petazzoni wrote:
> On Fri, 12 Oct 2012 10:48:24 +0000, Arnd Bergmann wrote:
>
> > The main thing to watch out for are mappings that are not for MMIO,
> > such as the call to create_mapping() in map_lowmem() or in
> > devicemaps_init().
> >
> > I would suggest making struct map_desc specific to callers of
> > iotable_init() and changing the prototype for create_mapping() to
> >
> > void __init create_mapping(unsigned long virtual, unsigned long pfn,
> > size_t length, unsigned int type);
>
> Yes, this is exactly what I've done. I'll rebase my work, test and send
> it.
Ok, looking forward to it. FWIW, I have a branch called
testing/defconfig-warnings in the arm-soc tree that shuts up all known
build warnings. If you pull that in for testing, you can see if any
warnings were added by your patches.
Arnd
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH 2/6] ARM: bcm476x: Add system timer
2012-10-07 1:53 [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs Domenico Andreoli
2012-10-07 1:53 ` [PATCH 1/6] ARM: bcm476x: Add infrastructure Domenico Andreoli
@ 2012-10-07 1:53 ` Domenico Andreoli
2012-10-08 11:50 ` Florian Fainelli
2012-10-07 1:53 ` [PATCH 3/6] ARM: bcm476x: Add sched clock Domenico Andreoli
` (4 subsequent siblings)
6 siblings, 1 reply; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-07 1:53 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
[-- Attachment #1: arm-bcm476x-add-system-timer.patch --]
[-- Type: text/plain, Size: 10482 bytes --]
From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
System timer implementation for the BCM476x SoCs.
Signed-off-by: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
---
Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt | 22 +
arch/arm/boot/dts/bcm476x.dtsi | 8 +
arch/arm/mach-bcm476x/bcm476x.c | 10 -
drivers/clocksource/Makefile | 1 +
drivers/clocksource/bcm476x_timer.c | 188 ++++++++++
include/linux/bcm476x_timer.h | 24 +
6 files changed, 244 insertions(+), 9 deletions(-)
Index: b/Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt
===================================================================
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt
@@ -0,0 +1,22 @@
+BCM476x System Timer
+
+The System Timer peripheral provides either two or four 32-bit timer
+channels. BCM476x has three timers at 0xba000, 0xbb000 and 0xd1000. The
+first two provide four channels, the last (in the AON - Always ON power
+domain) provides only two.
+
+Required properties:
+
+- compatible : should be "brcm,bcm476x-system-timer"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 2 or 4 interrupt sinks; one per timer channel.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+ compatible = "brcm,bcm476x-system-timer";
+ reg = <0xba000 0x1000>;
+ interrupts = <4>, <11>;
+ clock-frequency = <24000000>;
+};
Index: b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================
--- a/arch/arm/boot/dts/bcm476x.dtsi
+++ b/arch/arm/boot/dts/bcm476x.dtsi
@@ -14,6 +14,14 @@
#size-cells = <1>;
ranges;
+ timer {
+ compatible = "brcm,bcm476x-system-timer";
+ reg = <0xba000 0x1000>;
+ interrupt-parent = <&vic0>;
+ interrupts = <4>, <11>;
+ clock-frequency = <24000000>;
+ };
+
vic0: interrupt-controller@80000 {
compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
reg = <0x80000 0x1000>;
Index: b/arch/arm/mach-bcm476x/bcm476x.c
===================================================================
--- a/arch/arm/mach-bcm476x/bcm476x.c
+++ b/arch/arm/mach-bcm476x/bcm476x.c
@@ -17,11 +17,11 @@
#include <linux/init.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/bcm476x_timer.h>
#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <asm/mach/time.h>
#define BCM476X_PERIPH_PHYS 0x00080000
#define BCM476X_PERIPH_VIRT 0xd0080000
@@ -60,14 +60,6 @@ static void __init bcm476x_init_irq(void
of_irq_init(vic_of_match);
}
-static void __init bcm476x_timer_init(void)
-{
-}
-
-struct sys_timer bcm476x_timer = {
- .init = bcm476x_timer_init
-};
-
static const char * const bcm476x_compat[] = {
"brcm,bcm476x",
NULL
Index: b/drivers/clocksource/Makefile
===================================================================
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -14,5 +14,6 @@ obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_
obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
+obj-$(CONFIG_ARCH_BCM476X) += bcm476x_timer.o
obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
Index: b/drivers/clocksource/bcm476x_timer.c
===================================================================
--- /dev/null
+++ b/drivers/clocksource/bcm476x_timer.c
@@ -0,0 +1,188 @@
+/*
+ * Broadcom BCM476x SoCs system timer
+ *
+ * Copyright (C) 2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/bcm476x_timer.h>
+#include <linux/bitops.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/interrupt.h>
+#include <linux/irqreturn.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include <asm/sched_clock.h>
+#include <asm/irq.h>
+
+#define TIMER_LOAD_OFFSET 0x00 /* load */
+#define TIMER_VALUE_OFFSET 0x04 /* value */
+#define TIMER_CONTROL_OFFSET 0x08 /* control */
+#define TIMER_INTCLR_OFFSET 0x0c /* interrupt clear */
+#define TIMER_RIS_OFFSET 0x10 /* raw interrupt */
+#define TIMER_MIS_OFFSET 0x14 /* masked interrupt status */
+#define TIMER_BGLOAD_OFFSET 0x18 /* background load */
+
+#define TIMER_CTRL_ONESHOTMODE BIT(0) /* One shot mode */
+#define TIMER_CTRL_32BIT BIT(1) /* 32-bit counter mode */
+#define TIMER_CTRL_IE BIT(5) /* Interrupt enable */
+#define TIMER_CTRL_PERIODIC BIT(6) /* Periodic mode */
+#define TIMER_CTRL_EN BIT(7) /* Timer enable */
+#define TIMER_CTRL_CLK2 BIT(9) /* Clock 2 selected */
+#define TIMER_CTRL_PREBY16 (1 << 2) /* prescale divide by 16 */
+#define TIMER_CTRL_PREBY256 (2 << 2) /* prescale divide by 256 */
+
+struct bcm476x_timer {
+ void __iomem *base;
+ struct clock_event_device evt;
+ struct irqaction act;
+};
+
+static inline void __iomem *to_load(struct bcm476x_timer *timer)
+{
+ return timer->base + TIMER_LOAD_OFFSET;
+}
+
+static inline void __iomem *to_control(struct bcm476x_timer *timer)
+{
+ return timer->base + TIMER_CONTROL_OFFSET;
+}
+
+static inline void __iomem *to_intclr(struct bcm476x_timer *timer)
+{
+ return timer->base + TIMER_INTCLR_OFFSET;
+}
+
+static inline void __iomem *to_ris(struct bcm476x_timer *timer)
+{
+ return timer->base + TIMER_RIS_OFFSET;
+}
+
+static inline void __iomem *to_mis(struct bcm476x_timer *timer)
+{
+ return timer->base + TIMER_MIS_OFFSET;
+}
+
+static void bcm476x_timer_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt_dev)
+{
+ struct bcm476x_timer *timer;
+ u32 val;
+
+ timer = container_of(evt_dev, struct bcm476x_timer, evt);
+ val = TIMER_CTRL_CLK2 | TIMER_CTRL_32BIT |
+ TIMER_CTRL_IE | TIMER_CTRL_EN;
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_ONESHOT:
+ writel(val | TIMER_CTRL_ONESHOTMODE, to_control(timer));
+ break;
+ case CLOCK_EVT_MODE_RESUME:
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ break;
+ default:
+ WARN(1, "%s: unhandled event mode %d\n", __func__, mode);
+ break;
+ }
+}
+
+static int bcm476x_timer_set_next_event(unsigned long event,
+ struct clock_event_device *evt_dev)
+{
+ struct bcm476x_timer *timer;
+
+ timer = container_of(evt_dev, struct bcm476x_timer, evt);
+ writel(event, to_load(timer));
+ return 0;
+}
+
+static irqreturn_t bcm476x_timer_interrupt(int irq, void *dev_id)
+{
+ struct bcm476x_timer *timer = dev_id;
+ void (*event_handler)(struct clock_event_device *);
+
+ /* check the (masked) interrupt status */
+ if (!readl_relaxed(to_mis(timer)))
+ return IRQ_NONE;
+
+ /* clear the timer interrupt */
+ writel_relaxed(1, to_intclr(timer));
+
+ event_handler = ACCESS_ONCE(timer->evt.event_handler);
+ if (event_handler)
+ event_handler(&timer->evt);
+
+ return IRQ_HANDLED;
+}
+
+static struct of_device_id bcm476x_timer_match[] __initconst = {
+ { .compatible = "brcm,bcm476x-system-timer" },
+ {}
+};
+
+static void __init bcm476x_timer_init(void)
+{
+ struct device_node *node;
+ void __iomem *base;
+ u32 freq;
+ int irq;
+ struct bcm476x_timer *timer;
+
+ node = of_find_matching_node(NULL, bcm476x_timer_match);
+ if (!node)
+ panic("No bcm476x timer node");
+
+ base = of_iomap(node, 0);
+ if (!base)
+ panic("Can't remap timer registers");
+
+ if (of_property_read_u32(node, "clock-frequency", &freq))
+ panic("Can't read timer frequency");
+ if (freq != 32000 && freq != 24000000)
+ panic("Invalid timer frequency");
+
+ timer = kzalloc(sizeof(*timer), GFP_KERNEL);
+ if (!timer)
+ panic("Can't allocate timer struct\n");
+
+ irq = irq_of_parse_and_map(node, 0);
+ if (irq <= 0)
+ panic("Can't parse timer IRQ");
+
+ timer->base = base;
+ timer->evt.name = node->name;
+ timer->evt.rating = 300;
+ timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
+ timer->evt.set_mode = bcm476x_timer_set_mode;
+ timer->evt.set_next_event = bcm476x_timer_set_next_event;
+ timer->evt.cpumask = cpumask_of(0);
+ timer->act.name = node->name;
+ timer->act.flags = IRQF_TIMER | IRQF_SHARED;
+ timer->act.dev_id = timer;
+ timer->act.handler = bcm476x_timer_interrupt;
+
+ if (setup_irq(irq, &timer->act))
+ panic("Can't set up timer IRQ\n");
+
+ clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
+}
+
+struct sys_timer bcm476x_timer = {
+ .init = bcm476x_timer_init,
+};
Index: b/include/linux/bcm476x_timer.h
===================================================================
--- /dev/null
+++ b/include/linux/bcm476x_timer.h
@@ -0,0 +1,24 @@
+/*
+ * Broadcom BCM476x SoCs system timer
+ *
+ * Copyright (C) 2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM476X_TIMER_H
+#define __BCM476X_TIMER_H
+
+#include <asm/mach/time.h>
+
+extern struct sys_timer bcm476x_timer;
+
+#endif
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 2/6] ARM: bcm476x: Add system timer
2012-10-07 1:53 ` [PATCH 2/6] ARM: bcm476x: Add system timer Domenico Andreoli
@ 2012-10-08 11:50 ` Florian Fainelli
2012-10-09 2:43 ` Stephen Warren
0 siblings, 1 reply; 46+ messages in thread
From: Florian Fainelli @ 2012-10-08 11:50 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Domenico Andreoli, devicetree-discuss, Domenico Andreoli
On Sunday 07 October 2012 03:53:02 Domenico Andreoli wrote:
> From: Domenico Andreoli <domenico.andreoli@linux.com>
>
> System timer implementation for the BCM476x SoCs.
>
> Signed-off-by: Domenico Andreoli <domenico.andreoli@linux.com>
> ---
> Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt | 22 +
> arch/arm/boot/dts/bcm476x.dtsi | 8 +
> arch/arm/mach-bcm476x/bcm476x.c | 10 -
> drivers/clocksource/Makefile | 1 +
> drivers/clocksource/bcm476x_timer.c | 188 ++++++++++
> include/linux/bcm476x_timer.h | 24 +
> 6 files changed, 244 insertions(+), 9 deletions(-)
>
> Index: b/Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt
> ===================================================================
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt
> @@ -0,0 +1,22 @@
> +BCM476x System Timer
> +
> +The System Timer peripheral provides either two or four 32-bit timer
> +channels. BCM476x has three timers at 0xba000, 0xbb000 and 0xd1000. The
> +first two provide four channels, the last (in the AON - Always ON power
> +domain) provides only two.
> +
> +Required properties:
> +
> +- compatible : should be "brcm,bcm476x-system-timer"
> +- reg : Specifies base physical address and size of the registers.
> +- interrupts : A list of 2 or 4 interrupt sinks; one per timer channel.
> +- clock-frequency : The frequency of the clock that drives the counter, in Hz.
> +
> +Example:
> +
> +timer {
> + compatible = "brcm,bcm476x-system-timer";
> + reg = <0xba000 0x1000>;
> + interrupts = <4>, <11>;
> + clock-frequency = <24000000>;
> +};
> Index: b/arch/arm/boot/dts/bcm476x.dtsi
> ===================================================================
> --- a/arch/arm/boot/dts/bcm476x.dtsi
> +++ b/arch/arm/boot/dts/bcm476x.dtsi
> @@ -14,6 +14,14 @@
> #size-cells = <1>;
> ranges;
>
> + timer {
> + compatible = "brcm,bcm476x-system-timer";
> + reg = <0xba000 0x1000>;
> + interrupt-parent = <&vic0>;
> + interrupts = <4>, <11>;
> + clock-frequency = <24000000>;
> + };
This should rather be timer: timer@ba0000 for this node to be uniquely named.
--
Florian
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 2/6] ARM: bcm476x: Add system timer
2012-10-08 11:50 ` Florian Fainelli
@ 2012-10-09 2:43 ` Stephen Warren
[not found] ` <50738F48.5010002-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
0 siblings, 1 reply; 46+ messages in thread
From: Stephen Warren @ 2012-10-09 2:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 10/08/2012 05:50 AM, Florian Fainelli wrote:
> On Sunday 07 October 2012 03:53:02 Domenico Andreoli wrote:
>> From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
>>
>> System timer implementation for the BCM476x SoCs.
>> Index: b/arch/arm/boot/dts/bcm476x.dtsi
>> + timer {
>> + compatible = "brcm,bcm476x-system-timer";
>> + reg = <0xba000 0x1000>;
>> + interrupt-parent = <&vic0>;
>> + interrupts = <4>, <11>;
>> + clock-frequency = <24000000>;
>> + };
>
> This should rather be timer: timer@ba0000 for this node to be uniquely named.
I only see 1 timer node in this series, so "timer" is already unique,
isn't it?
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH 3/6] ARM: bcm476x: Add sched clock
2012-10-07 1:53 [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs Domenico Andreoli
2012-10-07 1:53 ` [PATCH 1/6] ARM: bcm476x: Add infrastructure Domenico Andreoli
2012-10-07 1:53 ` [PATCH 2/6] ARM: bcm476x: Add system timer Domenico Andreoli
@ 2012-10-07 1:53 ` Domenico Andreoli
[not found] ` <20121007015406.809888002-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-07 1:53 ` [PATCH 4/6] ARM: bcm476x: Add stub clock driver Domenico Andreoli
` (3 subsequent siblings)
6 siblings, 1 reply; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-07 1:53 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
[-- Attachment #1: arm-bcm476x-add-sched-clock.patch --]
[-- Type: text/plain, Size: 3704 bytes --]
From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
Sched clock implementation based on the BCM476x's free runner counter.
Signed-off-by: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
---
Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt | 18 +++
arch/arm/boot/dts/bcm476x.dtsi | 6 +
drivers/clocksource/bcm476x_timer.c | 52 ++++++++++
3 files changed, 76 insertions(+)
Index: b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt
===================================================================
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt
@@ -0,0 +1,18 @@
+BCM476x Sched clock
+
+The BCM476x provides a 63-bit free running counter driven by a separate
+32KHz clock line.
+
+Required properties:
+
+- compatible : should be "brcm,bcm476x-sched-clock"
+- reg : Specifies base physical address and size of the registers.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+sched-clock {
+ compatible = "brcm,bcm476x-sched-clock";
+ reg = <0xbc000 0x1000>;
+ clock-frequency = <32000>;
+};
Index: b/drivers/clocksource/bcm476x_timer.c
===================================================================
--- a/drivers/clocksource/bcm476x_timer.c
+++ b/drivers/clocksource/bcm476x_timer.c
@@ -54,6 +54,21 @@ struct bcm476x_timer {
struct irqaction act;
};
+static void __iomem *system_clock __read_mostly;
+
+static u32 notrace bcm476x_sched_read(void)
+{
+ u32 hi, lo;
+
+ /* access to the counter must happen in the lo-hi order even if
+ * only the lower 32-bit part is of interest
+ */
+ lo = readl(system_clock);
+ hi = readl(system_clock + 4);
+
+ return lo;
+}
+
static inline void __iomem *to_load(struct bcm476x_timer *timer)
{
return timer->base + TIMER_LOAD_OFFSET;
@@ -131,6 +146,42 @@ static irqreturn_t bcm476x_timer_interru
return IRQ_HANDLED;
}
+static struct of_device_id bcm476x_sched_clock_match[] __initconst = {
+ { .compatible = "brcm,bcm476x-sched-clock" },
+ {}
+};
+
+static void __init bcm476x_sched_clock_init(void)
+{
+ struct device_node *node;
+ void __iomem *base;
+ u32 freq;
+
+ node = of_find_matching_node(NULL, bcm476x_sched_clock_match);
+ if (!node) {
+ pr_info("No bcm476x sched clock node");
+ return;
+ }
+
+ base = of_iomap(node, 0);
+ if (!base) {
+ pr_err("Can't remap sched clock registers");
+ return;
+ }
+
+ if (of_property_read_u32(node, "clock-frequency", &freq)) {
+ pr_err("Can't read sched clock frequency");
+ return;
+ }
+ if (freq != 32000) {
+ pr_err("Invalid sched clock frequency");
+ return;
+ }
+
+ system_clock = base;
+ setup_sched_clock(bcm476x_sched_read, 32, freq);
+}
+
static struct of_device_id bcm476x_timer_match[] __initconst = {
{ .compatible = "brcm,bcm476x-system-timer" },
{}
@@ -180,6 +231,7 @@ static void __init bcm476x_timer_init(vo
if (setup_irq(irq, &timer->act))
panic("Can't set up timer IRQ\n");
+ bcm476x_sched_clock_init();
clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
}
Index: b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================
--- a/arch/arm/boot/dts/bcm476x.dtsi
+++ b/arch/arm/boot/dts/bcm476x.dtsi
@@ -22,6 +22,12 @@
clock-frequency = <24000000>;
};
+ sched-clock {
+ compatible = "brcm,bcm476x-sched-clock";
+ reg = <0xbc000 0x1000>;
+ clock-frequency = <32000>;
+ };
+
vic0: interrupt-controller@80000 {
compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
reg = <0x80000 0x1000>;
^ permalink raw reply [flat|nested] 46+ messages in thread* [PATCH 4/6] ARM: bcm476x: Add stub clock driver
2012-10-07 1:53 [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs Domenico Andreoli
` (2 preceding siblings ...)
2012-10-07 1:53 ` [PATCH 3/6] ARM: bcm476x: Add sched clock Domenico Andreoli
@ 2012-10-07 1:53 ` Domenico Andreoli
[not found] ` <20121007015407.154476821-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-07 1:53 ` [PATCH 5/6] ARM: bcm476x: Add restart hook Domenico Andreoli
` (2 subsequent siblings)
6 siblings, 1 reply; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-07 1:53 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Domenico Andreoli, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
[-- Attachment #1: arm-bcm476x-add-stub-clock-driver.patch --]
[-- Type: text/plain, Size: 4725 bytes --]
From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
This is the minimal clock support required for the boot, a more complete
implementation will follow (shortly).
Signed-off-by: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
---
arch/arm/mach-bcm476x/bcm476x.c | 3 ++
drivers/clk/Makefile | 1 +
drivers/clk/clk-bcm476x.c | 52 ++++++++++++++++++++++++++++++++++++++++
include/linux/clk/bcm476x.h | 22 +++++++++++++++++
4 files changed, 78 insertions(+)
create mode 100644 drivers/clk/clk-bcm476x.c
create mode 100644 include/linux/clk/bcm476x.h
Index: b/arch/arm/mach-bcm476x/bcm476x.c
===================================================================
--- a/arch/arm/mach-bcm476x/bcm476x.c
+++ b/arch/arm/mach-bcm476x/bcm476x.c
@@ -18,6 +18,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/bcm476x_timer.h>
+#include <linux/clk/bcm476x.h>
#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
@@ -43,6 +44,8 @@ void __init bcm476x_init(void)
{
int ret;
+ bcm476x_init_clocks();
+
ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
if (ret) {
pr_err("of_platform_populate failed: %d\n", ret);
Index: b/drivers/clk/Makefile
===================================================================
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_COMMON_CLK) += clk.o clk-fi
clk-mux.o clk-divider.o clk-fixed-factor.o
# SoCs specific
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
+obj-$(CONFIG_ARCH_BCM476X) += clk-bcm476x.o
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
obj-$(CONFIG_ARCH_MXS) += mxs/
Index: b/drivers/clk/clk-bcm476x.c
===================================================================
--- /dev/null
+++ b/drivers/clk/clk-bcm476x.c
@@ -0,0 +1,52 @@
+/*
+ * Broadcom BCM476x SoCs clocks
+ *
+ * Copyright (C) 2011-2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-private.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/bcm476x.h>
+
+/*
+ * These are fixed clocks (and device tree doesn't support clk!).
+ *
+ * They're probably not all root clocks and it may be possible to
+ * turn them on and off but until this is mapped out better it's
+ * the only way they can be used.
+ */
+DEFINE_CLK_FIXED_RATE(sys_pclk, CLK_IS_ROOT, 312000000, 0);
+DEFINE_CLK_FIXED_RATE(apb_pclk, CLK_IS_ROOT, 156000000, 0);
+DEFINE_CLK_FIXED_RATE(uart0_pclk, CLK_IS_ROOT, 78000000, 0);
+DEFINE_CLK_FIXED_RATE(uart1_pclk, CLK_IS_ROOT, 78000000, 0);
+DEFINE_CLK_FIXED_RATE(uart2_pclk, CLK_IS_ROOT, 78000000, 0);
+
+static struct clk_lookup lookups[] = {
+ { .con_id = "sys_pclk", .clk = &sys_pclk },
+ { .con_id = "apb_pclk", .clk = &apb_pclk },
+ { .dev_id = "c0000.uart0", .clk = &uart0_pclk },
+ { .dev_id = "c1000.uart1", .clk = &uart1_pclk },
+ { .dev_id = "b2000.uart2", .clk = &uart2_pclk },
+};
+
+void __init bcm476x_init_clocks(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+ __clk_init(NULL, lookups[i].clk);
+ clkdev_add(&lookups[i]);
+ }
+}
Index: b/include/linux/clk/bcm476x.h
===================================================================
--- /dev/null
+++ b/include/linux/clk/bcm476x.h
@@ -0,0 +1,22 @@
+/*
+ * Broadcom BCM476x SoCs clocks
+ *
+ * Copyright (C) 2011-2012 Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_CLK_BCM476X_H_
+#define __LINUX_CLK_BCM476X_H_
+
+void __init bcm476x_init_clocks(void);
+
+#endif
^ permalink raw reply [flat|nested] 46+ messages in thread* [PATCH 5/6] ARM: bcm476x: Add restart hook
2012-10-07 1:53 [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs Domenico Andreoli
` (3 preceding siblings ...)
2012-10-07 1:53 ` [PATCH 4/6] ARM: bcm476x: Add stub clock driver Domenico Andreoli
@ 2012-10-07 1:53 ` Domenico Andreoli
2012-10-07 1:53 ` [PATCH 6/6] ARM: bcm476x: Instantiate console UART Domenico Andreoli
[not found] ` <20121007015300.828366635-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
6 siblings, 0 replies; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-07 1:53 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Domenico Andreoli, devicetree-discuss
[-- Attachment #1: arm-bcm476x-add-restart-hook.patch --]
[-- Type: text/plain, Size: 4203 bytes --]
From: Domenico Andreoli <domenico.andreoli@linux.com>
Restart hook implementation for the BCM476x SoC (uses the watchdog).
Signed-off-by: Domenico Andreoli <domenico.andreoli@linux.com>
---
Documentation/devicetree/bindings/watchdog/brcm,bcm476x-pm-wdt.txt | 13 ++
arch/arm/boot/dts/bcm476x.dtsi | 5 +
arch/arm/mach-bcm476x/bcm476x.c | 66 ++++++++++
3 files changed, 84 insertions(+)
Index: b/Documentation/devicetree/bindings/watchdog/brcm,bcm476x-pm-wdt.txt
===================================================================
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/brcm,bcm476x-pm-wdt.txt
@@ -0,0 +1,13 @@
+BCM476x Watchdog timer
+
+Required properties:
+
+- compatible : should be "brcm,bcm476x-pm-wdt"
+- reg : Specifies base physical address and size of the registers.
+
+Example:
+
+watchdog {
+ compatible = "brcm,bcm476x-pm-wdt";
+ reg = <0xbd000 0x1000>;
+};
Index: b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================
--- a/arch/arm/boot/dts/bcm476x.dtsi
+++ b/arch/arm/boot/dts/bcm476x.dtsi
@@ -28,6 +28,11 @@
clock-frequency = <32000>;
};
+ watchdog {
+ compatible = "brcm,bcm476x-pm-wdt";
+ reg = <0xbd000 0x1000>;
+ };
+
vic0: interrupt-controller@80000 {
compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
reg = <0x80000 0x1000>;
Index: b/arch/arm/mach-bcm476x/bcm476x.c
===================================================================
--- a/arch/arm/mach-bcm476x/bcm476x.c
+++ b/arch/arm/mach-bcm476x/bcm476x.c
@@ -15,7 +15,9 @@
*/
#include <linux/init.h>
+#include <linux/delay.h>
#include <linux/of_irq.h>
+#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/bcm476x_timer.h>
#include <linux/clk/bcm476x.h>
@@ -28,6 +30,17 @@
#define BCM476X_PERIPH_VIRT 0xd0080000
#define BCM476X_PERIPH_SIZE SZ_512K
+#define BCM476X_WDT_LOAD 0x000
+#define BCM476X_WDT_CTRL 0x008
+#define BCM476X_WDT_INTCLR 0x00c
+#define BCM476X_WDT_LOCK 0xc00
+
+#define BCM476X_WDT_PASSWORD 0x1acce551
+#define BCM476X_WDT_INTEN BIT(0)
+#define BCM476X_WDT_RESEN BIT(1)
+
+static void __iomem *wdt_regs;
+
static struct map_desc io_map __initdata = {
.virtual = BCM476X_PERIPH_VIRT,
.pfn = __phys_to_pfn(BCM476X_PERIPH_PHYS),
@@ -40,10 +53,62 @@ void __init bcm476x_map_io(void)
iotable_init(&io_map, 1);
}
+/*
+ * The machine restart method can be called from an atomic context so we won't
+ * be able to ioremap the regs then.
+ */
+static void bcm476x_setup_restart(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "brcm,bcm476x-pm-wdt");
+ if (WARN(!np, "unable to setup watchdog restart"))
+ return;
+
+ wdt_regs = of_iomap(np, 0);
+ WARN(!wdt_regs, "Can't remap watchdog registers");
+
+ /* unlock watchdog registers */
+ writel(BCM476X_WDT_PASSWORD, wdt_regs + BCM476X_WDT_LOCK);
+ /* disable watchdog */
+ writel(0, wdt_regs + BCM476X_WDT_CTRL);
+ /* lock watchdog registers */
+ writel(1, wdt_regs + BCM476X_WDT_LOCK);
+}
+
+static void bcm476x_restart(char mode, const char *cmd)
+{
+ if (!wdt_regs)
+ return;
+
+ /* unlock watchdog registers */
+ writel(BCM476X_WDT_PASSWORD, wdt_regs + BCM476X_WDT_LOCK);
+
+ /* disable watchdog */
+ writel(0, wdt_regs + BCM476X_WDT_CTRL);
+ udelay(20);
+
+ /* clear the irq status */
+ writel(1, wdt_regs + BCM476X_WDT_INTCLR);
+ udelay(20);
+
+ /* expire after 5 cycles (~156us) */
+ writel(5, wdt_regs + BCM476X_WDT_LOAD);
+ /* enable watchdog */
+ writel(BCM476X_WDT_INTEN | BCM476X_WDT_RESEN,
+ wdt_regs + BCM476X_WDT_CTRL);
+
+ /* lock watchdog registers */
+ writel(1, wdt_regs + BCM476X_WDT_LOCK);
+ /* wait the bite */
+ udelay(400);
+}
+
void __init bcm476x_init(void)
{
int ret;
+ bcm476x_setup_restart();
bcm476x_init_clocks();
ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -74,5 +139,6 @@ DT_MACHINE_START(BCM476X, "Broadcom BCM4
.handle_irq = vic_handle_irq,
.init_machine = bcm476x_init,
.timer = &bcm476x_timer,
+ .restart = bcm476x_restart,
.dt_compat = bcm476x_compat
MACHINE_END
^ permalink raw reply [flat|nested] 46+ messages in thread* [PATCH 6/6] ARM: bcm476x: Instantiate console UART
2012-10-07 1:53 [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs Domenico Andreoli
` (4 preceding siblings ...)
2012-10-07 1:53 ` [PATCH 5/6] ARM: bcm476x: Add restart hook Domenico Andreoli
@ 2012-10-07 1:53 ` Domenico Andreoli
[not found] ` <20121007015407.840781689-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
[not found] ` <20121007015300.828366635-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
6 siblings, 1 reply; 46+ messages in thread
From: Domenico Andreoli @ 2012-10-07 1:53 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Domenico Andreoli, devicetree-discuss
[-- Attachment #1: arm-bcm476x-instantiate-console-uart.patch --]
[-- Type: text/plain, Size: 2731 bytes --]
From: Domenico Andreoli <domenico.andreoli@linux.com>
The BCM476x sports standard PL011 UARTs which are fully described and
put to use with these few changes.
Signed-off-by: Domenico Andreoli <domenico.andreoli@linux.com>
---
arch/arm/Kconfig.debug | 16 ++++++++++++++++
arch/arm/boot/dts/bcm476x.dtsi | 23 ++++++++++++++++++++++-
2 files changed, 38 insertions(+), 1 deletion(-)
Index: b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================
--- a/arch/arm/boot/dts/bcm476x.dtsi
+++ b/arch/arm/boot/dts/bcm476x.dtsi
@@ -5,7 +5,7 @@
model = "Broadcom BCM476x";
chosen {
- bootargs = "earlyprintk";
+ bootargs = "console=ttyAMA1";
};
amba {
@@ -41,5 +41,26 @@
interrupt-controller;
#interrupt-cells = <1>;
};
+
+ uart0@c0000 {
+ compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";
+ reg = <0xc0000 0x1000>;
+ interrupt-parent = <&vic0>;
+ interrupts = <14>;
+ };
+
+ uart1@c1000 {
+ compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";
+ reg = <0xc1000 0x1000>;
+ interrupt-parent = <&vic0>;
+ interrupts = <15>;
+ };
+
+ uart2@b2000 {
+ compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";
+ reg = <0xb2000 0x1000>;
+ interrupt-parent = <&vic0>;
+ interrupts = <16>;
+ };
};
};
Index: b/arch/arm/Kconfig.debug
===================================================================
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -89,6 +89,18 @@ choice
bool "Kernel low-level debugging on 9263 and 9g45"
depends on HAVE_AT91_DBGU1
+ config DEBUG_BCM476X_UART0
+ depends on ARCH_BCM476X
+ bool "Kernel low-level debugging on BCM476x UART 0"
+
+ config DEBUG_BCM476X_UART1
+ depends on ARCH_BCM476X
+ bool "Kernel low-level debugging on BCM476x UART 1"
+
+ config DEBUG_BCM476X_UART2
+ depends on ARCH_BCM476X
+ bool "Kernel low-level debugging on BCM476x UART 2"
+
config DEBUG_CLPS711X_UART1
bool "Kernel low-level debugging messages via UART1"
depends on ARCH_CLPS711X
@@ -404,6 +416,8 @@ endchoice
config DEBUG_LL_INCLUDE
string
+ default "debug/bcm476x.S" if DEBUG_BCM476X_UART0 || \
+ DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2
default "debug/icedcc.S" if DEBUG_ICEDCC
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
@@ -416,6 +430,8 @@ config DEBUG_LL_INCLUDE
config UNCOMPRESS_INCLUDE
string
+ default "debug/bcm476x-uncompress.h" if DEBUG_BCM476X_UART0 || \
+ DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2
default "debug/icedcc-uncompress.h" if DEBUG_ICEDCC
default "debug/mvebu-uncompress.h" if DEBUG_MVEBU_UART
default "debug/tegra-uncompress.h" if DEBUG_TEGRA_UART
^ permalink raw reply [flat|nested] 46+ messages in thread[parent not found: <20121007015300.828366635-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs
[not found] ` <20121007015300.828366635-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2012-10-07 5:22 ` Stephen Warren
[not found] ` <5071118A.6040508-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-07 19:47 ` Olof Johansson
1 sibling, 1 reply; 46+ messages in thread
From: Stephen Warren @ 2012-10-07 5:22 UTC (permalink / raw)
To: Domenico Andreoli
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 10/06/2012 07:53 PM, Domenico Andreoli wrote:
> Howdy,
>
> this patchset adds (minimal) support for the Broadcom BCM476x ARM based
> SoCs to the kernel, not to be confused with the already supported MIPS
> based BCM47xx SoC and other BCM47xx WiFi and GPS produced by Broadcom.
>
> This BCM476x is a DT-only multi-platform ARM platform and, at this spin,
Nice. I was planning on converting bcm2835 to multi-platform in 3.8; I
assume it'll be pretty simple.
...
> Additional support is being worked on.... and usb (DWC OTG) only
> attemped reusing s3c-hsotg.
Hmmm. I believe the bcm2835 uses DWC OTG. I wonder if the same driver
will work there; USB in particular is a major pain point on the bcm2835...
...
> It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined
> multi-platform support and Stephen's patch to add DEBUG_LL to it.
There are two chunks of code related to that; uncompress.h and
debug-macro.S. Rob/Arnd's multi-platform patches already allowed
debug-macro.S to exist after multi-platform conversion, and my patches
were about adding back support for uncompress.h. Given that the only
reason I cared about uncompress was that Tegra's uncompress.h and
debug-macro.s were closely coupled, and Nicolas Pitre indicated he
thought that was a hack, I've re-written the Tegra code so they aren't
coupled any more (this will be included in 3.8) and so I care much less
about uncompress.h now. Unless anyone really pipes up and says they'd
still like me to pursue uncompress.h in multi-platform, I'm inclined to
drop it.
> Special thanks go to Stephen Warren who, with the recently mainlined
> BCM2835, showed how to do things cleanly since the beginning and
> involuntarily spurred me to act.
Thanks! Do note that much of the code I upstreamed was originally
written by others, although I did make quite a few changes during
upstream submission.
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs
[not found] ` <20121007015300.828366635-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-07 5:22 ` [PATCH 0/6] ARM: Add support for Broadcom BCM476x SoCs Stephen Warren
@ 2012-10-07 19:47 ` Olof Johansson
1 sibling, 0 replies; 46+ messages in thread
From: Olof Johansson @ 2012-10-07 19:47 UTC (permalink / raw)
To: Domenico Andreoli
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Sun, Oct 07, 2012 at 03:53:00AM +0200, Domenico Andreoli wrote:
> Howdy,
>
> this patchset adds (minimal) support for the Broadcom BCM476x ARM based
> SoCs to the kernel, not to be confused with the already supported MIPS
> based BCM47xx SoC and other BCM47xx WiFi and GPS produced by Broadcom.
>
> This BCM476x is a DT-only multi-platform ARM platform and, at this spin,
> minimal in the features (boots nicely into initrd/busybox only) but also
> in the new code required, thanks to the existing drivers (and sweet DT)
> easily hooked up with the rest.
>
> Additional support is being worked on. Pinctrl, clocks and gpios are
> almost ready for review. DMA (PL080) and/or sdhci have issues. Regulators
> (BCM59040) are minimal and usb (DWC OTG) only attemped reusing s3c-hsotg.
> Other fancy stuff (not too much) later and not all.
>
> All this is my code, originating by me. The reference code I used is
> published by TomTom (my employer, who is aware but not involved at all)
> as part of the GPL compliance program but I don't plan to re-publish
> or maintain any part of it.
>
> It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined
> multi-platform support and Stephen's patch to add DEBUG_LL to it.
>
> Special thanks go to Stephen Warren who, with the recently mainlined
> BCM2835, showed how to do things cleanly since the beginning and
> involuntarily spurred me to act.
>
> Any feedback is welcome.
Nice and clean. I wonder if it even warrants its own mach directory at this
point, or over time if more of them can share. But that's a restructuring that
can happen later.
For the series:
Acked-by: Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>
It's up to you if you want to send the driver patches through the respective
maintainers, or if you want to collect their Acked-by's and merge it in one set
of patches through arm-soc, let us know.
Thanks!
-Olof
^ permalink raw reply [flat|nested] 46+ messages in thread