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From: Andrew Lunn <andrew@lunn.ch>
To: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Lior Amsalem <alior@marvell.com>, Andrew Lunn <andrew@lunn.ch>,
	Ike Pan <ike.pan@canonical.com>,
	Will Deacon <will.deacon@arm.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Ian Molton <ian.molton@codethink.co.uk>,
	David Marlin <dmarlin@redhat.com>,
	Yehuda Yitschak <yehuday@marvell.com>,
	Jani Monoses <jani.monoses@canonical.com>,
	Russell King <linux@arm.linux.org.uk>,
	Tawfik Bayouk <tawfik@marvell.com>,
	Dan Frazier <dann.frazier@canonical.com>,
	Eran Ben-Avi <benavi@marvell.com>, Li Li <li.li@canonical.com>,
	Leif Lindholm <leif.lindholm@arm.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Arnd Bergmann <arnd@arndb.de>, Jon Masters <jcm@redhat.com>,
	devicetree-discuss@lists.ozlabs.org,
	Rob Herring <rob.herring@calxeda.com>,
	Ben Dooks <ben-linux@fluff.org>,
	Mike Turquette <mturquette@linaro.org>,
	linux-arm-kernel@lists.infradead.or
Subject: Re: [PATCH 5/5] arm: mvebu: Added SMP support for Armada XP
Date: Mon, 22 Oct 2012 20:45:37 +0200	[thread overview]
Message-ID: <20121022184537.GN21046@lunn.ch> (raw)
In-Reply-To: <1350925368-24243-6-git-send-email-gregory.clement@free-electrons.com>

Hi Gregory

> +void __init set_secondary_cpus_clock(void)
> +{
> +	int cpu;
> +	unsigned long rate;
> +	struct clk *cpu_clk = NULL;
> +	struct device_node *np = NULL;
> +
> +	cpu = smp_processor_id();
> +	np = of_find_node_by_type(np, "cpu");
> +	np = NULL;
> +	while ((np = of_find_node_by_type(np, "cpu"))) {
> +		const u32 *reg;
> +		int len;
> +		reg = of_get_property(np, "reg", &len);
> +		if (!reg || len != 4) {
> +			pr_err("%s missing reg property\n", np->full_name);
> +			continue;
> +		}
> +		if (be32_to_cpup(reg) == cpu) {
> +			cpu_clk = of_clk_get(np, 0);
> +			break;
> +		}
> +	}
> +	WARN_ON(IS_ERR(cpu_clk));
> +	rate = clk_get_rate(cpu_clk);
> +
> +	/* set all the other CPU clk to the same rate than the boot CPU */
> +	np = NULL;
> +	while ((np = of_find_node_by_type(np, "cpu"))) {
> +		const u32 *reg;
> +		int len;
> +		reg = of_get_property(np, "reg", &len);
> +		if (!reg || len != 4) {
> +			pr_err("%s missing reg property\n", np->full_name);
> +			continue;
> +		}
> +		if (be32_to_cpup(reg) != cpu) {
> +			cpu_clk = of_clk_get(np, 0);
> +			clk_set_rate(cpu_clk, rate);
> +		}

Maybe its hiding somewhere, but where is the clk_prepare_enable() for
this cpu_clk clock?

     Andrew

  reply	other threads:[~2012-10-22 18:45 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-22 17:02 [PATCH 0/5] SMP support for Armada XP Gregory CLEMENT
2012-10-22 17:02 ` [PATCH 1/5] arm: mvebu: Added support for coherency fabric in mach-mvebu Gregory CLEMENT
2012-10-22 17:02 ` [PATCH 2/5] arm: mvebu: Added initial support for power managmement service unit Gregory CLEMENT
2012-10-22 17:02 ` [PATCH 3/5] arm: mvebu: Added IPI support via doorbells Gregory CLEMENT
2012-10-22 17:30   ` Andrew Lunn
2012-10-22 19:07     ` Gregory CLEMENT
2012-10-22 20:07       ` Andrew Lunn
2012-10-22 21:11         ` Gregory CLEMENT
2012-10-23  5:14           ` Thomas Petazzoni
2012-10-23  5:44             ` Andrew Lunn
2012-10-23  5:50               ` Thomas Petazzoni
2012-10-22 17:02 ` [PATCH 4/5] arm: mm: Added support for PJ4B cpu and init routines Gregory CLEMENT
2012-10-22 17:02 ` [PATCH 5/5] arm: mvebu: Added SMP support for Armada XP Gregory CLEMENT
2012-10-22 18:45   ` Andrew Lunn [this message]
2012-10-23  9:11     ` Gregory CLEMENT
2012-10-23  9:30       ` Andrew Lunn
2012-10-23 10:43         ` Gregory CLEMENT

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