From: Arnd Bergmann <arnd@arndb.de>
To: Pratyush Anand <pratyush.anand@st.com>
Cc: viresh kumar <viresh.kumar@linaro.org>,
Shiraz HASHIM <shiraz.hashim@st.com>,
spear-devel <spear-devel@list.st.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree-discuss@lists.ozlabs.org"
<devicetree-discuss@lists.ozlabs.org>,
"olof@lixom.net" <olof@lixom.net>
Subject: Re: [PATCH 03/15] SPEAr13xx: Add mach/io.h
Date: Wed, 31 Oct 2012 22:05:14 +0000 [thread overview]
Message-ID: <201210312205.14399.arnd@arndb.de> (raw)
In-Reply-To: <50910A70.7050209@st.com>
On Wednesday 31 October 2012, Pratyush Anand wrote:
> Sorry, I could not find pci_ioremap_io function. May be you wanted to
> refer something else.
$ git grep pci_ioremap_io
arch/arm/include/asm/io.h:extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
arch/arm/mach-dove/pcie.c: pci_ioremap_io(sys->busnr * SZ_64K, DOVE_PCIE0_IO_PHYS_BASE);
...
arch/arm/mach-versatile/pci.c: ret = pci_ioremap_io(0, VERSATILE_PCI_MEM_BASE0);
arch/arm/mm/ioremap.c:int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr)
arch/arm/mm/ioremap.c:EXPORT_SYMBOL_GPL(pci_ioremap_io);
> In case of SPEAr too , we can reserve first 32Kb per controller as PCIe
> IO space. So, lets say I fixed address 0x80000000--0x80007FFF for IO
> transaction. I need to register address range of this window somehow.
>
> But, issue which faced was that I was not able to successfully
> request_resource(&ioport_resource, &res]) with res.start = 0x80000000
> and res.end = 0x80007fff.
That cannot work properly, because the ioport_resource lists ports between
0 and 0x10000 normally, or possibly a little bit higher. You certainly
don't want to waste 2 GB of virtual address space for having a PCI I/O window
that you don't use.
> So, I though first to change IO_SPACE_LIMIT. But I found it not a
> correct way.
>
> May be I am missing something and not able to get how can I use
> pci_ioremap_io or something else to register 0x80000000--0x80007FFF
> window. A reference will help.
Calling pci_ioremap_io will do the right thing, you just have to decide
how you partition the I/O space between the root complexes you have.
Arnd
next prev parent reply other threads:[~2012-10-31 22:05 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-29 7:01 [PATCH 00/15] SPEAr13xx PCIe patches Pratyush Anand
2012-10-29 7:01 ` [PATCH 01/15] arm: source drivers/pci/pcie/kconfig Pratyush Anand
2012-10-29 7:01 ` [PATCH 02/15] arm: Call pcie_bus_configure_settings for pcie devices Pratyush Anand
2012-10-29 7:01 ` [PATCH 03/15] SPEAr13xx: Add mach/io.h Pratyush Anand
2012-10-29 7:29 ` viresh kumar
2012-10-29 8:11 ` Pratyush Anand
[not found] ` <508E3A2E.3000204-qxv4g6HH51o@public.gmane.org>
2012-10-30 21:45 ` Arnd Bergmann
2012-10-31 11:24 ` Pratyush Anand
2012-10-31 22:05 ` Arnd Bergmann [this message]
2012-10-29 7:01 ` [PATCH 04/15] SPEAr13xx: Add PCIe Root Complex driver support Pratyush Anand
2012-10-30 22:20 ` Arnd Bergmann
2012-10-31 11:24 ` Pratyush Anand
2012-10-31 22:00 ` Arnd Bergmann
2012-11-01 7:25 ` Pratyush Anand
2012-10-29 7:01 ` [PATCH 05/15] clk: SPEAr1340: Fix pcie0 clock name Pratyush Anand
2012-10-29 7:01 ` [PATCH 06/15] clk: SPEAr1310: Fix pcie " Pratyush Anand
2012-10-29 13:11 ` viresh kumar
2012-10-29 7:01 ` [PATCH 07/15] SPEAr1340: Add PCIe auxdata for miphy clock initialization Pratyush Anand
2012-10-29 7:01 ` [PATCH 08/15] SPEAr1310: " Pratyush Anand
2012-10-30 21:57 ` Arnd Bergmann
2012-10-29 7:01 ` [PATCH 09/15] SPEAr13xx: dts: Fix PCIe core address ranges Pratyush Anand
2012-10-29 13:23 ` viresh kumar
2012-10-30 3:23 ` Pratyush Anand
2012-10-30 21:55 ` Arnd Bergmann
2012-10-31 11:24 ` Pratyush Anand
2012-10-29 7:01 ` [PATCH 10/15] SPEAr13xx: DTS: Add auxiliary data for PCIe host Pratyush Anand
2012-10-29 13:24 ` viresh kumar
2012-10-30 3:24 ` Pratyush Anand
2012-10-30 5:47 ` Viresh Kumar
2012-10-29 7:01 ` [PATCH 11/15] SPEAr1340-evb: dts: Enable PCIe0 Pratyush Anand
2012-10-29 7:01 ` [PATCH 12/15] SPEAr1310-EVB: DTS: Fix PCIe1 enable Pratyush Anand
2012-10-29 7:01 ` [PATCH 13/15] SPEAr13xx: update kconfig for PCIe selection Pratyush Anand
2012-10-29 13:33 ` viresh kumar
2012-10-30 3:25 ` Pratyush Anand
2012-10-29 7:01 ` [PATCH 14/15] SPEAR13xx: Update makefile for PCIe inclusion Pratyush Anand
2012-10-29 13:34 ` viresh kumar
2012-10-29 7:01 ` [PATCH 15/15] SPEAR13xx: update defconfig for PCIe compilation Pratyush Anand
2012-10-29 7:16 ` [PATCH 00/15] SPEAr13xx PCIe patches viresh kumar
2012-10-29 7:22 ` Pratyush Anand
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