devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Mark Rutland <mark.rutland@arm.com>
To: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>,
	Dave Martin <dave.martin@linaro.org>,
	Kukjin Kim <kgene.kim@samsung.com>,
	Russell King <linux@arm.linux.org.uk>,
	Pawel Moll <Pawel.Moll@arm.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Tony Lindgren <tony@atomide.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	"devicetree-discuss@lists.ozlabs.org"
	<devicetree-discuss@lists.ozlabs.org>,
	Will Deacon <Will.Deacon@arm.com>,
	Amit Kucheria <amit.kucheria@linaro.org>,
	Grant Likely <grant.likely@secretlab.ca>,
	"rob.herring@calxeda.com" <rob.herring@calxeda.com>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	David Brown <davidb@codeaurora.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 2/5] ARM: kernel: add device tree init map function
Date: Mon, 12 Nov 2012 10:38:09 +0000	[thread overview]
Message-ID: <20121112103713.GA7982@e106331-lin.cambridge.arm.com> (raw)
In-Reply-To: <1352471654-20207-3-git-send-email-lorenzo.pieralisi@arm.com>

On Fri, Nov 09, 2012 at 02:34:11PM +0000, Lorenzo Pieralisi wrote:
> When booting through a device tree, the kernel cpu logical id map can be
> initialized using device tree data passed by FW or through an embedded blob.
> 
> This patch adds a function that parses device tree "cpu" nodes and
> retrieves the corresponding CPUs hardware identifiers (MPIDR).
> It sets the possible cpus and the cpu logical map values according to
> the number of CPUs defined in the device tree and respective properties.
> 
> The device tree HW identifiers are considered valid if all CPU nodes contain
> a "reg" property and the DT defines a CPU node that matches the MPIDR[23:0]
> of the boot CPU.
> 
> The primary CPU is assigned cpu logical number 0 to keep the current convention
> valid.
> 
> Current bindings documentation is included in the patch:
> 
> Documentation/devicetree/bindings/arm/cpus.txt
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> ---
>  Documentation/devicetree/bindings/arm/cpus.txt | 84 ++++++++++++++++++++++++++
>  arch/arm/include/asm/prom.h                    |  2 +
>  arch/arm/kernel/devtree.c                      | 76 +++++++++++++++++++++++
>  3 files changed, 162 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/cpus.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> new file mode 100644
> index 0000000..83cd98a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -0,0 +1,84 @@
> +* ARM CPUs binding description
> +
> +The device tree allows to describe the layout of CPUs in a system through
> +the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
> +defining properties for every cpu.
> +
> +Bindings for CPU nodes follow the ePAPR standard, available from:
> +
> +http://devicetree.org
> +
> +For the ARM architecture every CPU node must contain the following properties:
> +
> +- reg : property matching the CPU MPIDR[23:0] register bits
> +- compatible: must be set to "arm, <cpu-model>"
> +              where <cpu-model> is the full processor name as used in the
> +              processor Technical Reference Manual, eg:
> +              - for a Cortex A9 processor
> +                compatible = <arm, cortex-a9>;
> +              - for a Cortex A15 processor
> +                compatible = <arm, cortex-a15>;
> +
> +List of possible "compatible" string ids:
> +
> +<arm, arm1020>
> +<arm, arm1020e>
> +<arm, arm1022>
> +<arm, arm1026>
> +<arm, arm720>
> +<arm, arm740>
> +<arm, arm7tdmi>
> +<arm, arm920>
> +<arm, arm922>
> +<arm, arm925>
> +<arm, arm926>
> +<arm, arm940>
> +<arm, arm946>
> +<arm, arm9tdmi>
> +<arm, fa526>
> +<arm, feroceon>
> +<arm, mohawk>
> +<arm, sa110>
> +<arm, sa1100>
> +<arm, xsc3>
> +<arm, xscale>
> +<arm, cortex-a5>
> +<arm, cortex-a7>
> +<arm, cortex-a8>
> +<arm, cortex-a9>
> +<arm, cortex-a15>
> +<arm, arm1136>
> +<arm, arm11-mpcore>
> +

Is there any reason for the spaces in the compatible string? No other binding
seems to do this.

Is <STRING> a valid dts format? Should these not be "STRING" instead?

For consistency, it would be nice to have the compatible strings tab-indented
as in Documentation/devicetree/bindings/arm/pmu.txt.

Thanks,
Mark

  parent reply	other threads:[~2012-11-12 10:38 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-09 14:34 [PATCH v2 0/5] ARM: multi-cluster aware boot protocol Lorenzo Pieralisi
2012-11-09 14:34 ` [PATCH v2 1/5] ARM: kernel: smp_setup_processor_id() updates Lorenzo Pieralisi
2012-11-09 14:44   ` Will Deacon
2012-11-09 14:53     ` Lorenzo Pieralisi
2012-11-09 15:05     ` Lorenzo Pieralisi
2012-11-09 14:34 ` [PATCH v2 2/5] ARM: kernel: add device tree init map function Lorenzo Pieralisi
2012-11-09 14:42   ` Will Deacon
2012-11-09 14:57     ` Lorenzo Pieralisi
2012-11-12 10:38   ` Mark Rutland [this message]
2012-11-12 11:51     ` Lorenzo Pieralisi
     [not found]   ` <1352471654-20207-3-git-send-email-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2012-11-12 15:14     ` Dave Martin
2012-11-12 15:55       ` Lorenzo Pieralisi
2012-11-12 17:27     ` Dave Martin
2012-11-13 10:06       ` Lorenzo Pieralisi
2012-11-09 14:34 ` [PATCH v2 3/5] ARM: kernel: add cpu logical map DT init in setup_arch Lorenzo Pieralisi
2012-11-09 14:34 ` [PATCH v2 4/5] ARM: kernel: add logical mappings look-up Lorenzo Pieralisi
2012-11-09 14:34 ` [PATCH v2 5/5] ARM: gic: use a private mapping for CPU target interfaces Lorenzo Pieralisi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20121112103713.GA7982@e106331-lin.cambridge.arm.com \
    --to=mark.rutland@arm.com \
    --cc=Catalin.Marinas@arm.com \
    --cc=Lorenzo.Pieralisi@arm.com \
    --cc=Pawel.Moll@arm.com \
    --cc=Will.Deacon@arm.com \
    --cc=amit.kucheria@linaro.org \
    --cc=benh@kernel.crashing.org \
    --cc=dave.martin@linaro.org \
    --cc=davidb@codeaurora.org \
    --cc=devicetree-discuss@lists.ozlabs.org \
    --cc=grant.likely@secretlab.ca \
    --cc=kgene.kim@samsung.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux@arm.linux.org.uk \
    --cc=magnus.damm@gmail.com \
    --cc=nicolas.pitre@linaro.org \
    --cc=rob.herring@calxeda.com \
    --cc=swarren@wwwdotorg.org \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).