From: Russell King - ARM Linux <linux@arm.linux.org.uk>
To: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Lior Amsalem <alior@marvell.com>, Andrew Lunn <andrew@lunn.ch>,
Ike Pan <ike.pan@canonical.com>,
Will Deacon <will.deacon@arm.com>,
Nadav Haklai <nadavh@marvell.com>,
Ian Molton <ian.molton@codethink.co.uk>,
David Marlin <dmarlin@redhat.com>,
Yehuda Yitschak <yehuday@marvell.com>,
Jani Monoses <jani.monoses@canonical.com>,
Mike Turquette <mturquette@linaro.org>,
Tawfik Bayouk <tawfik@marvell.com>,
Dan Frazier <dann.frazier@canonical.com>,
Eran Ben-Avi <benavi@marvell.com>,
Leif Lindholm <leif.lindholm@arm.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Jason Cooper <jason@lakedaemon.net>,
Arnd Bergmann <arnd@arndb.de>, Jon Masters <jcm@redhat.com>,
devicetree-discuss@lists.ozlabs.org,
Rob Herring <rob.herring@calxeda.com>,
Ben Dooks <ben-linux@fluff.org>,
linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Chris
Subject: Re: [PATCH V2 4/5] arm: mm: Added support for PJ4B cpu and init routines
Date: Wed, 14 Nov 2012 00:14:38 +0000 [thread overview]
Message-ID: <20121114001438.GF3290@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <1351545108-18954-5-git-send-email-gregory.clement@free-electrons.com>
On Mon, Oct 29, 2012 at 10:11:47PM +0100, Gregory CLEMENT wrote:
> + /* Auxiliary Debug Modes Control 2 Register */
> + mrc p15, 1, r0, c15, c1, 2
> + bic r0, r0, #(1 << 23) @ Enable fast LDR.
> + orr r0, r0, #(1 << 25) @ Dont interleave write and snoop data.
> + orr r0, r0, #(1 << 27) @ Disable Critical Word First feature.
> + orr r0, r0, #(1 << 29) @ Disable outstanding non cacheable request
> + orr r0, r0, #(1 << 30) @ L1 replacement - Strict round robin
This just looks silly to me - setting five bits with five instructions
when they can all be done in one instruction. Yes, I know you want
to comment it, but there's other ways to achieve that.
> +__v7_pj4b_proc_info:
> + .long 0x562f5842
> + .long 0xffffffff
Same comment here as Will :)
next prev parent reply other threads:[~2012-11-14 0:14 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-29 21:11 [PATCH V2 0/5] SMP support for Armada XP Gregory CLEMENT
2012-10-29 21:11 ` [PATCH V2 1/5] arm: mvebu: Added support for coherency fabric in mach-mvebu Gregory CLEMENT
2012-11-05 14:02 ` Will Deacon
2012-11-05 23:53 ` Gregory CLEMENT
2012-11-12 20:21 ` Gregory CLEMENT
2012-11-13 10:43 ` Will Deacon
2012-11-14 20:00 ` Gregory CLEMENT
2012-11-15 10:17 ` Will Deacon
2012-11-15 15:54 ` Gregory CLEMENT
2012-11-15 16:21 ` Will Deacon
2012-11-15 16:49 ` Gregory CLEMENT
2012-11-16 18:56 ` Will Deacon
[not found] ` <20121116185610.GA1019-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2012-11-16 19:25 ` Gregory CLEMENT
[not found] ` <50A69341.2090202-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2012-11-19 10:32 ` Will Deacon
2012-10-29 21:11 ` [PATCH V2 2/5] arm: mvebu: Added initial support for power managmement service unit Gregory CLEMENT
2012-11-05 14:05 ` Will Deacon
2012-11-14 0:07 ` Russell King - ARM Linux
2012-11-14 9:46 ` Will Deacon
2012-10-29 21:11 ` [PATCH V2 3/5] arm: mvebu: Added IPI support via doorbells Gregory CLEMENT
2012-10-29 21:11 ` [PATCH V2 4/5] arm: mm: Added support for PJ4B cpu and init routines Gregory CLEMENT
2012-11-13 15:15 ` Gregory CLEMENT
2012-11-13 22:53 ` Will Deacon
2012-11-14 0:14 ` Russell King - ARM Linux [this message]
2012-10-29 21:11 ` [PATCH V2 5/5] arm: mvebu: Added SMP support for Armada XP Gregory CLEMENT
2012-11-12 20:49 ` [PATCH V2 0/5] " Gregory CLEMENT
2012-11-12 22:32 ` Arnd Bergmann
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