[PATCH] arm/dts: OMAP3: fix pinctrl-single configuration

[PATCH] arm/dts: OMAP3: fix pinctrl-single configuration

[Christoph Fritz]

- Fix 'function-mask' referring to TRM Section 7.4.4:
  "Pad Functional Multiplexing and Configuration".
- Fix 'omap3_pmx_core' referring to TRM Table 7-4:
  "Core Control Module Pad Configuration Register Fields"
- Fix 'omap3_pmx_wkup' referring to TRM Table 7-6:
  "Wake-Up Control Module Pad Configuration Register Fields".

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
---
 arch/arm/boot/dts/omap3.dtsi |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 1acc261..6ce3b5c 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -27,7 +27,7 @@
 	};
 
 	/*
-	 * The soc node represents the soc top level view. It is uses for IPs
+	 * The soc node represents the soc top level view. It is used for IPs
 	 * that are not memory mapped in the MPU view or for the MPU itself.
 	 */
 	soc {
@@ -77,20 +77,20 @@
 
 		omap3_pmx_core: pinmux@48002030 {
 			compatible = "ti,omap3-padconf", "pinctrl-single";
-			reg = <0x48002030 0x05cc>;
+			reg = <0x48002030 0x234>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			pinctrl-single,register-width = <16>;
-			pinctrl-single,function-mask = <0x7fff>;
+			pinctrl-single,function-mask = <0x7f1f>;
 		};
 
-		omap3_pmx_wkup: pinmux@0x48002a58 {
+		omap3_pmx_wkup: pinmux@0x48002a00 {
 			compatible = "ti,omap3-padconf", "pinctrl-single";
-			reg = <0x48002a58 0x5c>;
+			reg = <0x48002a00 0x54>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			pinctrl-single,register-width = <16>;
-			pinctrl-single,function-mask = <0x7fff>;
+			pinctrl-single,function-mask = <0x7f1f>;
 		};
 
 		gpio1: gpio@48310000 {
-- 
1.7.10.4

Re: [PATCH] arm/dts: OMAP3: fix pinctrl-single configuration

[Tony Lindgren]

* Christoph Fritz <chf.fritz@googlemail.com> [130328 01:12]:
> - Fix 'function-mask' referring to TRM Section 7.4.4:
>   "Pad Functional Multiplexing and Configuration".
> - Fix 'omap3_pmx_core' referring to TRM Table 7-4:
>   "Core Control Module Pad Configuration Register Fields"
> - Fix 'omap3_pmx_wkup' referring to TRM Table 7-6:
>   "Wake-Up Control Module Pad Configuration Register Fields".

Maybe mention which TRM this is so people will know.
 
> Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
> ---
>  arch/arm/boot/dts/omap3.dtsi |   12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> index 1acc261..6ce3b5c 100644
> --- a/arch/arm/boot/dts/omap3.dtsi
> +++ b/arch/arm/boot/dts/omap3.dtsi
> @@ -27,7 +27,7 @@
>  	};
>  
>  	/*
> -	 * The soc node represents the soc top level view. It is uses for IPs
> +	 * The soc node represents the soc top level view. It is used for IPs
>  	 * that are not memory mapped in the MPU view or for the MPU itself.
>  	 */
>  	soc {
> @@ -77,20 +77,20 @@
>  
>  		omap3_pmx_core: pinmux@48002030 {
>  			compatible = "ti,omap3-padconf", "pinctrl-single";
> -			reg = <0x48002030 0x05cc>;
> +			reg = <0x48002030 0x234>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			pinctrl-single,register-width = <16>;
> -			pinctrl-single,function-mask = <0x7fff>;
> +			pinctrl-single,function-mask = <0x7f1f>;
>  		};

Changing the size from 0x5cc to 0x234 misses the range ending at
CONTROL_PADCONF_ETK_D14[31:16] 0x480025f8 that's listed at least in
the 3630 TRM. Which TRM are you looking at?

Ack for the function-mask change for omap3, looks like those bits are not
used.
  
> -		omap3_pmx_wkup: pinmux@0x48002a58 {
> +		omap3_pmx_wkup: pinmux@0x48002a00 {
>  			compatible = "ti,omap3-padconf", "pinctrl-single";
> -			reg = <0x48002a58 0x5c>;
> +			reg = <0x48002a00 0x54>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			pinctrl-single,register-width = <16>;
> -			pinctrl-single,function-mask = <0x7fff>;
> +			pinctrl-single,function-mask = <0x7f1f>;
>  		};

Hmm I think I converted these from the legacy mux framework, that seems
to be missing the wkup range between 0x2a00 - 0x2a58. So yes 0x2a00
is the right start as otherwise we're missing some wkup registers.

But the size should be 0x50 instead of 0x54 as the JTAG_TDO[31:16] is
already un-used in TRM?

Or it could be 0x60 if we want to map also the reserved GPIO128[31:16].

Regards,

Tony

Re: [PATCH] arm/dts: OMAP3: fix pinctrl-single configuration

[Christoph Fritz]

On Thu, 2013-03-28 at 09:38 -0700, Tony Lindgren wrote:
> * Christoph Fritz <chf.fritz@googlemail.com> [130328 01:12]:
> > - Fix 'function-mask' referring to TRM Section 7.4.4:
> >   "Pad Functional Multiplexing and Configuration".
> > - Fix 'omap3_pmx_core' referring to TRM Table 7-4:
> >   "Core Control Module Pad Configuration Register Fields"
> > - Fix 'omap3_pmx_wkup' referring to TRM Table 7-6:
> >   "Wake-Up Control Module Pad Configuration Register Fields".
> 
> Maybe mention which TRM this is so people will know.
>  
> > Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
> > ---
> >  arch/arm/boot/dts/omap3.dtsi |   12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> > index 1acc261..6ce3b5c 100644
> > --- a/arch/arm/boot/dts/omap3.dtsi
> > +++ b/arch/arm/boot/dts/omap3.dtsi
> > @@ -27,7 +27,7 @@
> >  	};
> >  
> >  	/*
> > -	 * The soc node represents the soc top level view. It is uses for IPs
> > +	 * The soc node represents the soc top level view. It is used for IPs
> >  	 * that are not memory mapped in the MPU view or for the MPU itself.
> >  	 */
> >  	soc {
> > @@ -77,20 +77,20 @@
> >  
> >  		omap3_pmx_core: pinmux@48002030 {
> >  			compatible = "ti,omap3-padconf", "pinctrl-single";
> > -			reg = <0x48002030 0x05cc>;
> > +			reg = <0x48002030 0x234>;
> >  			#address-cells = <1>;
> >  			#size-cells = <0>;
> >  			pinctrl-single,register-width = <16>;
> > -			pinctrl-single,function-mask = <0x7fff>;
> > +			pinctrl-single,function-mask = <0x7f1f>;
> >  		};
> 
> Changing the size from 0x5cc to 0x234 misses the range ending at
> CONTROL_PADCONF_ETK_D14[31:16] 0x480025f8 that's listed at least in
> the 3630 TRM. Which TRM are you looking at?

I used TRM Omap35xx, and yes in the TRM Omap36xx 0x234 is fine. I'll fix
this in the next revision of this patch.


> Ack for the function-mask change for omap3, looks like those bits are not
> used.
>   
> > -		omap3_pmx_wkup: pinmux@0x48002a58 {
> > +		omap3_pmx_wkup: pinmux@0x48002a00 {
> >  			compatible = "ti,omap3-padconf", "pinctrl-single";
> > -			reg = <0x48002a58 0x5c>;
> > +			reg = <0x48002a00 0x54>;
> >  			#address-cells = <1>;
> >  			#size-cells = <0>;
> >  			pinctrl-single,register-width = <16>;
> > -			pinctrl-single,function-mask = <0x7fff>;
> > +			pinctrl-single,function-mask = <0x7f1f>;
> >  		};
> 
> Hmm I think I converted these from the legacy mux framework, that seems
> to be missing the wkup range between 0x2a00 - 0x2a58. So yes 0x2a00
> is the right start as otherwise we're missing some wkup registers.
> 
> But the size should be 0x50 instead of 0x54 as the JTAG_TDO[31:16] is
> already un-used in TRM?
> 
> Or it could be 0x60 if we want to map also the reserved GPIO128[31:16].

Why not 0x5c ? GPIO128[31:16] starts at 0x2a5a and its size is 2 bytes.

 Thanks
  -- Christoph

Re: [PATCH] arm/dts: OMAP3: fix pinctrl-single configuration

[Christoph Fritz]

On Fri, 2013-03-29 at 10:37 +0100, Christoph Fritz wrote:
> On Thu, 2013-03-28 at 09:38 -0700, Tony Lindgren wrote:
> > * Christoph Fritz <chf.fritz@googlemail.com> [130328 01:12]:
> > > - Fix 'function-mask' referring to TRM Section 7.4.4:
> > >   "Pad Functional Multiplexing and Configuration".
> > > - Fix 'omap3_pmx_core' referring to TRM Table 7-4:
> > >   "Core Control Module Pad Configuration Register Fields"
> > > - Fix 'omap3_pmx_wkup' referring to TRM Table 7-6:
> > >   "Wake-Up Control Module Pad Configuration Register Fields".
> > 
> > Maybe mention which TRM this is so people will know.
> >  
> > > Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
> > > ---
> > >  arch/arm/boot/dts/omap3.dtsi |   12 ++++++------
> > >  1 file changed, 6 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> > > index 1acc261..6ce3b5c 100644
> > > --- a/arch/arm/boot/dts/omap3.dtsi
> > > +++ b/arch/arm/boot/dts/omap3.dtsi
> > > @@ -27,7 +27,7 @@
> > >  	};
> > >  
> > >  	/*
> > > -	 * The soc node represents the soc top level view. It is uses for IPs
> > > +	 * The soc node represents the soc top level view. It is used for IPs
> > >  	 * that are not memory mapped in the MPU view or for the MPU itself.
> > >  	 */
> > >  	soc {
> > > @@ -77,20 +77,20 @@
> > >  
> > >  		omap3_pmx_core: pinmux@48002030 {
> > >  			compatible = "ti,omap3-padconf", "pinctrl-single";
> > > -			reg = <0x48002030 0x05cc>;
> > > +			reg = <0x48002030 0x234>;
> > >  			#address-cells = <1>;
> > >  			#size-cells = <0>;
> > >  			pinctrl-single,register-width = <16>;
> > > -			pinctrl-single,function-mask = <0x7fff>;
> > > +			pinctrl-single,function-mask = <0x7f1f>;
> > >  		};
> > 
> > Changing the size from 0x5cc to 0x234 misses the range ending at
> > CONTROL_PADCONF_ETK_D14[31:16] 0x480025f8 that's listed at least in
> > the 3630 TRM. Which TRM are you looking at?
> 
> I used TRM Omap35xx, and yes in the TRM Omap36xx 0x234 is fine. I'll fix
> this in the next revision of this patch.

I mean 0x5cc is fine :)


> 
> > Ack for the function-mask change for omap3, looks like those bits are not
> > used.
> >   
> > > -		omap3_pmx_wkup: pinmux@0x48002a58 {
> > > +		omap3_pmx_wkup: pinmux@0x48002a00 {
> > >  			compatible = "ti,omap3-padconf", "pinctrl-single";
> > > -			reg = <0x48002a58 0x5c>;
> > > +			reg = <0x48002a00 0x54>;
> > >  			#address-cells = <1>;
> > >  			#size-cells = <0>;
> > >  			pinctrl-single,register-width = <16>;
> > > -			pinctrl-single,function-mask = <0x7fff>;
> > > +			pinctrl-single,function-mask = <0x7f1f>;
> > >  		};
> > 
> > Hmm I think I converted these from the legacy mux framework, that seems
> > to be missing the wkup range between 0x2a00 - 0x2a58. So yes 0x2a00
> > is the right start as otherwise we're missing some wkup registers.
> > 
> > But the size should be 0x50 instead of 0x54 as the JTAG_TDO[31:16] is
> > already un-used in TRM?
> > 
> > Or it could be 0x60 if we want to map also the reserved GPIO128[31:16].
> 
> Why not 0x5c ? GPIO128[31:16] starts at 0x2a5a and its size is 2 bytes.
> 
>  Thanks
>   -- Christoph
> 

Re: [PATCH] arm/dts: OMAP3: fix pinctrl-single configuration

[Tony Lindgren]

* Christoph Fritz <chf.fritz@googlemail.com> [130329 02:41]:
> On Thu, 2013-03-28 at 09:38 -0700, Tony Lindgren wrote:
> > * Christoph Fritz <chf.fritz@googlemail.com> [130328 01:12]:
> > > - Fix 'function-mask' referring to TRM Section 7.4.4:
> > >   "Pad Functional Multiplexing and Configuration".
> > > - Fix 'omap3_pmx_core' referring to TRM Table 7-4:
> > >   "Core Control Module Pad Configuration Register Fields"
> > > - Fix 'omap3_pmx_wkup' referring to TRM Table 7-6:
> > >   "Wake-Up Control Module Pad Configuration Register Fields".
> > 
> > Maybe mention which TRM this is so people will know.
> >  
> > > Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
> > > ---
> > >  arch/arm/boot/dts/omap3.dtsi |   12 ++++++------
> > >  1 file changed, 6 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> > > index 1acc261..6ce3b5c 100644
> > > --- a/arch/arm/boot/dts/omap3.dtsi
> > > +++ b/arch/arm/boot/dts/omap3.dtsi
> > > @@ -27,7 +27,7 @@
> > >  	};
> > >  
> > >  	/*
> > > -	 * The soc node represents the soc top level view. It is uses for IPs
> > > +	 * The soc node represents the soc top level view. It is used for IPs
> > >  	 * that are not memory mapped in the MPU view or for the MPU itself.
> > >  	 */
> > >  	soc {
> > > @@ -77,20 +77,20 @@
> > >  
> > >  		omap3_pmx_core: pinmux@48002030 {
> > >  			compatible = "ti,omap3-padconf", "pinctrl-single";
> > > -			reg = <0x48002030 0x05cc>;
> > > +			reg = <0x48002030 0x234>;
> > >  			#address-cells = <1>;
> > >  			#size-cells = <0>;
> > >  			pinctrl-single,register-width = <16>;
> > > -			pinctrl-single,function-mask = <0x7fff>;
> > > +			pinctrl-single,function-mask = <0x7f1f>;
> > >  		};
> > 
> > Changing the size from 0x5cc to 0x234 misses the range ending at
> > CONTROL_PADCONF_ETK_D14[31:16] 0x480025f8 that's listed at least in
> > the 3630 TRM. Which TRM are you looking at?
> 
> I used TRM Omap35xx, and yes in the TRM Omap36xx 0x234 is fine. I'll fix
> this in the next revision of this patch.

OK 
 
> > Ack for the function-mask change for omap3, looks like those bits are not
> > used.
> >   
> > > -		omap3_pmx_wkup: pinmux@0x48002a58 {
> > > +		omap3_pmx_wkup: pinmux@0x48002a00 {
> > >  			compatible = "ti,omap3-padconf", "pinctrl-single";
> > > -			reg = <0x48002a58 0x5c>;
> > > +			reg = <0x48002a00 0x54>;
> > >  			#address-cells = <1>;
> > >  			#size-cells = <0>;
> > >  			pinctrl-single,register-width = <16>;
> > > -			pinctrl-single,function-mask = <0x7fff>;
> > > +			pinctrl-single,function-mask = <0x7f1f>;
> > >  		};
> > 
> > Hmm I think I converted these from the legacy mux framework, that seems
> > to be missing the wkup range between 0x2a00 - 0x2a58. So yes 0x2a00
> > is the right start as otherwise we're missing some wkup registers.
> > 
> > But the size should be 0x50 instead of 0x54 as the JTAG_TDO[31:16] is
> > already un-used in TRM?
> > 
> > Or it could be 0x60 if we want to map also the reserved GPIO128[31:16].
> 
> Why not 0x5c ? GPIO128[31:16] starts at 0x2a5a and its size is 2 bytes.

Oops yes 0x5c as it's 2 bytes. So the original value is fine then.

Regards,

Tony

[PATCH v2] arm/dts: OMAP3: fix pinctrl-single configuration

[Christoph Fritz]

 - Fix 'function-mask' referring to TRM (Omap 36xx) Section 13.4.4:
   "Pad Functional Multiplexing and Configuration".
 - Fix 'omap3_pmx_wkup' referring to TRM Table 13-6:
   "Wkup Control Module Pad Configuration Register Fields".

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
---
 arch/arm/boot/dts/omap3.dtsi |   10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 1acc261..1997b41 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -27,7 +27,7 @@
 	};
 
 	/*
-	 * The soc node represents the soc top level view. It is uses for IPs
+	 * The soc node represents the soc top level view. It is used for IPs
 	 * that are not memory mapped in the MPU view or for the MPU itself.
 	 */
 	soc {
@@ -81,16 +81,16 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			pinctrl-single,register-width = <16>;
-			pinctrl-single,function-mask = <0x7fff>;
+			pinctrl-single,function-mask = <0x7f1f>;
 		};
 
-		omap3_pmx_wkup: pinmux@0x48002a58 {
+		omap3_pmx_wkup: pinmux@0x48002a00 {
 			compatible = "ti,omap3-padconf", "pinctrl-single";
-			reg = <0x48002a58 0x5c>;
+			reg = <0x48002a00 0x5c>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			pinctrl-single,register-width = <16>;
-			pinctrl-single,function-mask = <0x7fff>;
+			pinctrl-single,function-mask = <0x7f1f>;
 		};
 
 		gpio1: gpio@48310000 {
-- 
1.7.10.4

Re: [PATCH v2] arm/dts: OMAP3: fix pinctrl-single configuration

[Tony Lindgren]

* Christoph Fritz <chf.fritz@googlemail.com> [130329 09:36]:
>  - Fix 'function-mask' referring to TRM (Omap 36xx) Section 13.4.4:
>    "Pad Functional Multiplexing and Configuration".
>  - Fix 'omap3_pmx_wkup' referring to TRM Table 13-6:
>    "Wkup Control Module Pad Configuration Register Fields".

Thanks applying into omap-for-v3.10/dt on top of the patches
queued by Benoit.

Tony
 
> Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
> ---
>  arch/arm/boot/dts/omap3.dtsi |   10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> index 1acc261..1997b41 100644
> --- a/arch/arm/boot/dts/omap3.dtsi
> +++ b/arch/arm/boot/dts/omap3.dtsi
> @@ -27,7 +27,7 @@
>  	};
>  
>  	/*
> -	 * The soc node represents the soc top level view. It is uses for IPs
> +	 * The soc node represents the soc top level view. It is used for IPs
>  	 * that are not memory mapped in the MPU view or for the MPU itself.
>  	 */
>  	soc {
> @@ -81,16 +81,16 @@
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			pinctrl-single,register-width = <16>;
> -			pinctrl-single,function-mask = <0x7fff>;
> +			pinctrl-single,function-mask = <0x7f1f>;
>  		};
>  
> -		omap3_pmx_wkup: pinmux@0x48002a58 {
> +		omap3_pmx_wkup: pinmux@0x48002a00 {
>  			compatible = "ti,omap3-padconf", "pinctrl-single";
> -			reg = <0x48002a58 0x5c>;
> +			reg = <0x48002a00 0x5c>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			pinctrl-single,register-width = <16>;
> -			pinctrl-single,function-mask = <0x7fff>;
> +			pinctrl-single,function-mask = <0x7f1f>;
>  		};
>  
>  		gpio1: gpio@48310000 {
> -- 
> 1.7.10.4
> 
> 
>