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From: Andrew Murray <andrew.murray-5wv7dgnIgG8@public.gmane.org>
To: Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: "linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
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Subject: Re: [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC
Date: Thu, 11 Apr 2013 13:03:22 +0100	[thread overview]
Message-ID: <20130411120322.GA28981@arm.com> (raw)
In-Reply-To: <51656592.7070806-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

On Wed, Apr 10, 2013 at 02:13:54PM +0100, Rob Herring wrote:
> Adding Ben H and Michal...
> 
> On 04/10/2013 02:29 AM, Andrew Murray wrote:
> > The pci_process_bridge_OF_ranges function, used to parse the "ranges"
> > property of a PCI host device, is found in both Microblaze and PowerPC
> > architectures. These implementations are nearly identical. This patch
> > moves this common code to a common place.
> > 
> > Signed-off-by: Andrew Murray <Andrew.Murray-5wv7dgnIgG8@public.gmane.org>
> > Signed-off-by: Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
> 
> One comment below. Otherwise,
> 
> Reviewed-by: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
> 
> You need also need acks from Ben and Michal.
> 
> [...]
> 
> > +		/* Act based on address space type */
> > +		res = NULL;
> > +		switch ((pci_space >> 24) & 0x3) {
> > +		case 1:		/* PCI IO space */
> > +			pr_info("  IO 0x%016llx..0x%016llx -> 0x%016llx\n",
> > +			       cpu_addr, cpu_addr + size - 1, pci_addr);
> > +
> > +			/* We support only one IO range */
> > +			if (hose->pci_io_size) {
> > +				pr_info(" \\--> Skipped (too many) !\n");
> > +				continue;
> > +			}
> > +#if defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)
> 
> How about "if (!IS_ENABLED(CONFIG_64BIT))" instead.

OK I'll add in my next re-spin. Would "#ifndef CONFIG_64BIT" suffice?

> 
> > +			/* On 32 bits, limit I/O space to 16MB */
> > +			if (size > 0x01000000)
> > +				size = 0x01000000;
> > +
> > +			/* 32 bits needs to map IOs here */
> > +			hose->io_base_virt = ioremap(cpu_addr, size);
> > +
> > +			/* Expect trouble if pci_addr is not 0 */
> > +			if (primary)
> > +				isa_io_base =
> > +					(unsigned long)hose->io_base_virt;
> > +#endif /* CONFIG_PPC32 || CONFIG_MICROBLAZE */
> > +			/* pci_io_size and io_base_phys always represent IO
> > +			 * space starting at 0 so we factor in pci_addr
> > +			 */
> > +			hose->pci_io_size = pci_addr + size;
> > +			hose->io_base_phys = cpu_addr - pci_addr;
> 
> 

  parent reply	other threads:[~2013-04-11 12:03 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-10  7:29 [PATCH v5 0/3] of/pci: Provide common support for PCI DT parsing Andrew Murray
     [not found] ` <1365578969-30966-1-git-send-email-Andrew.Murray-5wv7dgnIgG8@public.gmane.org>
2013-04-10  7:29   ` [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC Andrew Murray
2013-04-10 13:13     ` Rob Herring
2013-04-10 21:30       ` Thomas Petazzoni
2013-04-11 16:57         ` Linus Walleij
     [not found]       ` <51656592.7070806-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-04-11 12:03         ` Andrew Murray [this message]
2013-04-10 21:33     ` Thomas Petazzoni
2013-04-11 12:12       ` Andrew Murray
     [not found]         ` <20130411121242.GB28981-5wv7dgnIgG8@public.gmane.org>
2013-04-11 15:28           ` Thomas Petazzoni
2013-04-10  7:29   ` [PATCH v5 2/3] of/pci: Provide support for parsing PCI DT ranges property Andrew Murray
     [not found]     ` <1365578969-30966-3-git-send-email-Andrew.Murray-5wv7dgnIgG8@public.gmane.org>
2013-04-10 18:26       ` Rob Herring
     [not found]         ` <5165AEBA.7000803-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-04-11 13:11           ` Andrew Murray
2013-04-10  7:29   ` [PATCH v5 3/3] of/pci: mips: convert to common of_pci_range_parser Andrew Murray
2013-04-10 18:28     ` Rob Herring

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