[RFC PATCH v2 00/13] ARM: DT cpu bindings updates

[RFC PATCH v2 00/13] ARM: DT cpu bindings updates

[Lorenzo Pieralisi]

This patchset is an update of a previous posting:

http://lists.infradead.org/pipermail/linux-arm-kernel/2013-April/163310.html

v2 changes:

- Reworded DT cpu bindings
- Split the set, with per-mach specific dts updates
- Updated cpu node compatible string list
- Defined behaviour of OS running on v8 in AArch32

The introduction of DT cpus/cpu bindings for ARM requires well established
rules to enforce the reg property definition for 32-bit and 64-bit ARM
processors, inclusive of legacy and current uniprocessor/SMP systems.

ARM 64 bit architecture also requires dtb compiled for 64-bit configurations
to be reused for kernels running in 32 bit mode, so the cpus/cpu bindings
specification must be made compliant to cope with this configuration.

Patch #1 of this series is a fix and is included to have a clean patch
series and should get reviewed and merged separately.

Patch #2-13, along with some kernel fixes related to DT parsing function,
update the cpu node bindings and in kernel dts files to cope with legacy,
current and upcoming ARM systems.

In-kernel device tree source files are updated to comply with the latest
specification, so thorough testing is required in order to validate all
changes on all affected ARM systems, in particular systems with exotic
MPIDR configurations that are likely to break with the changes provided.

Code relying on the reg property size to be 4-bytes will break when
dtb compiled for 64-bit kernels are used to boot a 32-bit system so
kernel code relying on that (bogus) assumption must be updated properly.

Lorenzo Pieralisi (13):
  ARM: DT: kernel: move temporary cpu map stack array to static data
  ARM: mach-mv78xx0: cpus/cpu node dts updates
  ARM: mach-at91: cpus/cpu node dts updates
  ARM: mach-exynos: cpus/cpu nodes dts updates
  ARM: mach-imx: cpus/cpu nodes dts updates
  ARM: mach-lpc32xx: cpus/cpu nodes dts updates
  ARM: mach-omap2: cpus/cpu nodes dts updates
  ARM: mach-picoxcell: cpus/cpu nodes dts updates
  ARM: mach-shmobile: cpus/cpu nodes dts updates
  ARM: mach-spear: cpus/cpu nodes dts updates
  ARM: mach-sunxi: cpus/cpu nodes dts updates
  ARM: mach-vt8500: cpus/cpu nodes dts updates
  ARM: DT: kernel: DT cpu node bindings update

 Documentation/devicetree/bindings/arm/cpus.txt | 378 ++++++++++++++++++++++---
 arch/arm/boot/dts/armada-370-xp.dtsi           |   1 +
 arch/arm/boot/dts/at91sam9260.dtsi             |   2 +-
 arch/arm/boot/dts/at91sam9263.dtsi             |   2 +-
 arch/arm/boot/dts/at91sam9g45.dtsi             |   2 +-
 arch/arm/boot/dts/at91sam9n12.dtsi             |   2 +-
 arch/arm/boot/dts/exynos5440.dtsi              |   7 +
 arch/arm/boot/dts/imx23.dtsi                   |   2 +-
 arch/arm/boot/dts/imx28.dtsi                   |   2 +-
 arch/arm/boot/dts/lpc32xx.dtsi                 |   2 +-
 arch/arm/boot/dts/omap3.dtsi                   |   4 +
 arch/arm/boot/dts/omap4.dtsi                   |   5 +
 arch/arm/boot/dts/omap5.dtsi                   |   5 +
 arch/arm/boot/dts/picoxcell-pc3x2.dtsi         |   2 +-
 arch/arm/boot/dts/picoxcell-pc3x3.dtsi         |   2 +-
 arch/arm/boot/dts/r8a7740.dtsi                 |   3 +
 arch/arm/boot/dts/sh7372.dtsi                  |   4 +
 arch/arm/boot/dts/spear3xx.dtsi                |   2 +-
 arch/arm/boot/dts/spear600.dtsi                |   2 +-
 arch/arm/boot/dts/sunxi.dtsi                   |   4 +
 arch/arm/boot/dts/wm8505.dtsi                  |   2 +-
 arch/arm/kernel/devtree.c                      |  85 ++++--
 22 files changed, 431 insertions(+), 89 deletions(-)

-- 
1.7.12

[RFC PATCH v2 01/13] ARM: DT: kernel: move temporary cpu map stack array to static data

[Lorenzo Pieralisi]

As the number of CPUs increase, the temporary array allocated on the
stack in arm_dt_init_cpu_maps() can become too big and trigger stack
issues.
This patch moves the allocated memory to static __initdata so that stack
data is not used anymore to allocate the temporary array.
Memory is marked as __initdata since it need not be persistent after boot.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 arch/arm/kernel/devtree.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 70f1bde..f149217 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -78,11 +78,12 @@ void __init arm_dt_init_cpu_maps(void)
 	 * contain a list of MPIDR[23:0] values where MPIDR[31:24] must
 	 * read as 0.
 	 */
+	static u32 tmp_map[NR_CPUS] __initdata = {
+				[0 ... NR_CPUS-1] = UINT_MAX };
 	struct device_node *cpu, *cpus;
 	u32 i, j, cpuidx = 1;
 	u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
 
-	u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = UINT_MAX };
 	bool bootcpu_valid = false;
 	cpus = of_find_node_by_path("/cpus");
 
-- 
1.7.12

[RFC PATCH v2 02/13] ARM: mach-mv78xx0: cpus/cpu node dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 arch/arm/boot/dts/armada-370-xp.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 6f1acc7..79a6689 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -24,6 +24,7 @@
 
 	cpus {
 		cpu@0 {
+			reg = <0>;
 			compatible = "marvell,sheeva-v7";
 		};
 	};
-- 
1.7.12

[RFC PATCH v2 04/13] ARM: mach-exynos: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 arch/arm/boot/dts/exynos5440.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 5f3562a..eda21d5 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -24,8 +24,12 @@
 	};
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "arm,cortex-a15";
+			reg = <0x0>;
 			timer {
 				compatible = "arm,armv7-timer";
 				interrupts = <1 13 0xf08>;
@@ -34,6 +38,7 @@
 		};
 		cpu@1 {
 			compatible = "arm,cortex-a15";
+			reg = <0x1>;
 			timer {
 				compatible = "arm,armv7-timer";
 				interrupts = <1 14 0xf08>;
@@ -42,6 +47,7 @@
 		};
 		cpu@2 {
 			compatible = "arm,cortex-a15";
+			reg = <0x2>;
 			timer {
 				compatible = "arm,armv7-timer";
 				interrupts = <1 14 0xf08>;
@@ -50,6 +56,7 @@
 		};
 		cpu@3 {
 			compatible = "arm,cortex-a15";
+			reg = <0x3>;
 			timer {
 				compatible = "arm,armv7-timer";
 				interrupts = <1 14 0xf08>;
-- 
1.7.12

[RFC PATCH v2 05/13] ARM: mach-imx: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 arch/arm/boot/dts/imx23.dtsi | 2 +-
 arch/arm/boot/dts/imx28.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 56afcf4..d98330c 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -24,7 +24,7 @@
 
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 7ba4966..8c5a3ba 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -33,7 +33,7 @@
 
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
-- 
1.7.12

Re: [RFC PATCH v2 05/13] ARM: mach-imx: cpus/cpu nodes dts updates

[Shawn Guo]

On Mon, Apr 22, 2013 at 04:27:27PM +0100, Lorenzo Pieralisi wrote:
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>

Acked-by: Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

> ---
>  arch/arm/boot/dts/imx23.dtsi | 2 +-
>  arch/arm/boot/dts/imx28.dtsi | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
> index 56afcf4..d98330c 100644
> --- a/arch/arm/boot/dts/imx23.dtsi
> +++ b/arch/arm/boot/dts/imx23.dtsi
> @@ -24,7 +24,7 @@
>  
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
> index 7ba4966..8c5a3ba 100644
> --- a/arch/arm/boot/dts/imx28.dtsi
> +++ b/arch/arm/boot/dts/imx28.dtsi
> @@ -33,7 +33,7 @@
>  
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> -- 
> 1.7.12
> 
> 

[RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
 arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
 arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
 arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index cb7bcc5..2e9de85 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -33,7 +33,7 @@
 	};
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 271d4de..25c4725 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -30,7 +30,7 @@
 	};
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 6b1d4ca..cf647d1 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -36,7 +36,7 @@
 	};
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 7750f98..d531ae3 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -32,7 +32,7 @@
 	};
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
-- 
1.7.12

Re: [RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Nicolas Ferre]

On 04/22/2013 05:27 PM, Lorenzo Pieralisi :
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Thanks, bye.

> ---
>  arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
>  arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
>  arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
>  arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> index cb7bcc5..2e9de85 100644
> --- a/arch/arm/boot/dts/at91sam9260.dtsi
> +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> @@ -33,7 +33,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
> index 271d4de..25c4725 100644
> --- a/arch/arm/boot/dts/at91sam9263.dtsi
> +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> @@ -30,7 +30,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
> index 6b1d4ca..cf647d1 100644
> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> @@ -36,7 +36,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
> index 7750f98..d531ae3 100644
> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> @@ -32,7 +32,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> 


-- 
Nicolas Ferre

Re: [RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Rob Herring]

On 04/22/2013 10:27 AM, Lorenzo Pieralisi wrote:
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> ---
>  arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
>  arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
>  arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
>  arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> index cb7bcc5..2e9de85 100644
> --- a/arch/arm/boot/dts/at91sam9260.dtsi
> +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> @@ -33,7 +33,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";

I don't understand why you are doing this. If this does not match the
documentation, fix the documentation. We can't continue on changing dts
files without reqard to breaking compatibility.

Rob

>  		};
>  	};
>  
> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
> index 271d4de..25c4725 100644
> --- a/arch/arm/boot/dts/at91sam9263.dtsi
> +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> @@ -30,7 +30,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
> index 6b1d4ca..cf647d1 100644
> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> @@ -36,7 +36,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
> index 7750f98..d531ae3 100644
> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> @@ -32,7 +32,7 @@
>  	};
>  	cpus {
>  		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>  		};
>  	};
>  
> 

Re: [RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Jean-Christophe PLAGNIOL-VILLARD]

On Apr 23, 2013, at 9:11 PM, Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:

> On 04/22/2013 10:27 AM, Lorenzo Pieralisi wrote:
>> This patch updates the in-kernel dts files according to the latest cpus
>> and cpu bindings updates for ARM.
>> 
>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
>> ---
>> arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
>> arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
>> arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
>> arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
>> 4 files changed, 4 insertions(+), 4 deletions(-)
>> 
>> diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
>> index cb7bcc5..2e9de85 100644
>> --- a/arch/arm/boot/dts/at91sam9260.dtsi
>> +++ b/arch/arm/boot/dts/at91sam9260.dtsi
>> @@ -33,7 +33,7 @@
>> 	};
>> 	cpus {
>> 		cpu@0 {
>> -			compatible = "arm,arm926ejs";
>> +			compatible = "arm,arm926";
> 
> I don't understand why you are doing this. If this does not match the
> documentation, fix the documentation. We can't continue on changing dts
> files without reqard to breaking compatibility.

agreed and on AT91 it's a arm926ejs cpu
> 
> Rob
> 
>> 		};
>> 	};
>> 
>> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
>> index 271d4de..25c4725 100644
>> --- a/arch/arm/boot/dts/at91sam9263.dtsi
>> +++ b/arch/arm/boot/dts/at91sam9263.dtsi
>> @@ -30,7 +30,7 @@
>> 	};
>> 	cpus {
>> 		cpu@0 {
>> -			compatible = "arm,arm926ejs";
>> +			compatible = "arm,arm926";
>> 		};
>> 	};
>> 
>> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
>> index 6b1d4ca..cf647d1 100644
>> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
>> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
>> @@ -36,7 +36,7 @@
>> 	};
>> 	cpus {
>> 		cpu@0 {
>> -			compatible = "arm,arm926ejs";
>> +			compatible = "arm,arm926";
>> 		};
>> 	};
>> 
>> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
>> index 7750f98..d531ae3 100644
>> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
>> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
>> @@ -32,7 +32,7 @@
>> 	};
>> 	cpus {
>> 		cpu@0 {
>> -			compatible = "arm,arm926ejs";
>> +			compatible = "arm,arm926";
>> 		};
>> 	};
>> 
>> 
> 
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss

Re: [RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Lorenzo Pieralisi]

On Tue, Apr 23, 2013 at 02:11:46PM +0100, Rob Herring wrote:
> On 04/22/2013 10:27 AM, Lorenzo Pieralisi wrote:
> > This patch updates the in-kernel dts files according to the latest cpus
> > and cpu bindings updates for ARM.
> > 
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> > ---
> >  arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
> >  arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
> >  arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
> >  arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
> >  4 files changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> > index cb7bcc5..2e9de85 100644
> > --- a/arch/arm/boot/dts/at91sam9260.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> > @@ -33,7 +33,7 @@
> >  	};
> >  	cpus {
> >  		cpu@0 {
> > -			compatible = "arm,arm926ejs";
> > +			compatible = "arm,arm926";
> 
> I don't understand why you are doing this. If this does not match the
> documentation, fix the documentation. We can't continue on changing dts
> files without reqard to breaking compatibility.

IMHO compatibility is already broken. There are a number of dts in the
kernel missing cpus and cpu nodes, others with cpu nodes missing
device_type = "cpu", missing cpu nodes compatible properties and the list
goes on and on. Those files got merged in the kernel before bindings were
properly defined for ARM so at that point in time the only reference was the
ePAPR and still, it was not followed (eg my broken patch above fails to add
device_type = "cpu" to the cpu node, should I change the documentation (ePAPR)
to make the dts above compliant ? I do not think so, I reckon we should fix
all dts and force them to comply with the ePAPR and the in-kernel bindings).

If we do not set in stone the bindings and draw a line now, this stuff will
go wild, it is already in a state that I do not like much.

The reason we are patching the compatible property above is to avoid having
compatible properties containing suffixes for CPUs, we do not deem that
necessary, see:

http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/145305.html

That's just my opinion, open to change it to find a proper solution to this
issue as long as we make progress.

Thanks for the review,
Lorenzo

> 
> Rob
> 
> >  		};
> >  	};
> >  
> > diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
> > index 271d4de..25c4725 100644
> > --- a/arch/arm/boot/dts/at91sam9263.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> > @@ -30,7 +30,7 @@
> >  	};
> >  	cpus {
> >  		cpu@0 {
> > -			compatible = "arm,arm926ejs";
> > +			compatible = "arm,arm926";
> >  		};
> >  	};
> >  
> > diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
> > index 6b1d4ca..cf647d1 100644
> > --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> > @@ -36,7 +36,7 @@
> >  	};
> >  	cpus {
> >  		cpu@0 {
> > -			compatible = "arm,arm926ejs";
> > +			compatible = "arm,arm926";
> >  		};
> >  	};
> >  
> > diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
> > index 7750f98..d531ae3 100644
> > --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> > +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> > @@ -32,7 +32,7 @@
> >  	};
> >  	cpus {
> >  		cpu@0 {
> > -			compatible = "arm,arm926ejs";
> > +			compatible = "arm,arm926";
> >  		};
> >  	};
> >  
> > 
> 
> 

Re: [RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Jean-Christophe PLAGNIOL-VILLARD]

On 14:53 Tue 23 Apr     , Lorenzo Pieralisi wrote:
> On Tue, Apr 23, 2013 at 02:11:46PM +0100, Rob Herring wrote:
> > On 04/22/2013 10:27 AM, Lorenzo Pieralisi wrote:
> > > This patch updates the in-kernel dts files according to the latest cpus
> > > and cpu bindings updates for ARM.
> > > 
> > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > ---
> > >  arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
> > >  arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
> > >  arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
> > >  arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
> > >  4 files changed, 4 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> > > index cb7bcc5..2e9de85 100644
> > > --- a/arch/arm/boot/dts/at91sam9260.dtsi
> > > +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> > > @@ -33,7 +33,7 @@
> > >  	};
> > >  	cpus {
> > >  		cpu@0 {
> > > -			compatible = "arm,arm926ejs";
> > > +			compatible = "arm,arm926";
> > 
> > I don't understand why you are doing this. If this does not match the
> > documentation, fix the documentation. We can't continue on changing dts
> > files without reqard to breaking compatibility.
> 
> IMHO compatibility is already broken. There are a number of dts in the
> kernel missing cpus and cpu nodes, others with cpu nodes missing
> device_type = "cpu", missing cpu nodes compatible properties and the list
> goes on and on. Those files got merged in the kernel before bindings were
> properly defined for ARM so at that point in time the only reference was the
> ePAPR and still, it was not followed (eg my broken patch above fails to add
> device_type = "cpu" to the cpu node, should I change the documentation (ePAPR)
> to make the dts above compliant ? I do not think so, I reckon we should fix
> all dts and force them to comply with the ePAPR and the in-kernel bindings).
> 
> If we do not set in stone the bindings and draw a line now, this stuff will
> go wild, it is already in a state that I do not like much.
> 
> The reason we are patching the compatible property above is to avoid having
> compatible properties containing suffixes for CPUs, we do not deem that
> necessary, see:
> 
> http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/145305.html
> 
> That's just my opinion, open to change it to find a proper solution to this
> issue as long as we make progress.

I do not agree when you set the compatible you need to be preceise the cpu is
a arm926ejs not a arm926

Best Regards,
J/
> 
> Thanks for the review,
> Lorenzo
> 
> > 
> > Rob
> > 
> > >  		};
> > >  	};
> > >  
> > > diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
> > > index 271d4de..25c4725 100644
> > > --- a/arch/arm/boot/dts/at91sam9263.dtsi
> > > +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> > > @@ -30,7 +30,7 @@
> > >  	};
> > >  	cpus {
> > >  		cpu@0 {
> > > -			compatible = "arm,arm926ejs";
> > > +			compatible = "arm,arm926";
> > >  		};
> > >  	};
> > >  
> > > diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
> > > index 6b1d4ca..cf647d1 100644
> > > --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> > > +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> > > @@ -36,7 +36,7 @@
> > >  	};
> > >  	cpus {
> > >  		cpu@0 {
> > > -			compatible = "arm,arm926ejs";
> > > +			compatible = "arm,arm926";
> > >  		};
> > >  	};
> > >  
> > > diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
> > > index 7750f98..d531ae3 100644
> > > --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> > > +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> > > @@ -32,7 +32,7 @@
> > >  	};
> > >  	cpus {
> > >  		cpu@0 {
> > > -			compatible = "arm,arm926ejs";
> > > +			compatible = "arm,arm926";
> > >  		};
> > >  	};
> > >  
> > > 
> > 
> > 
> 
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss

Re: [RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Lorenzo Pieralisi]

On Tue, Apr 23, 2013 at 08:52:59PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 14:53 Tue 23 Apr     , Lorenzo Pieralisi wrote:
> > On Tue, Apr 23, 2013 at 02:11:46PM +0100, Rob Herring wrote:
> > > On 04/22/2013 10:27 AM, Lorenzo Pieralisi wrote:
> > > > This patch updates the in-kernel dts files according to the latest cpus
> > > > and cpu bindings updates for ARM.
> > > > 
> > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> > > > ---
> > > >  arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
> > > >  arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
> > > >  arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
> > > >  arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
> > > >  4 files changed, 4 insertions(+), 4 deletions(-)
> > > > 
> > > > diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> > > > index cb7bcc5..2e9de85 100644
> > > > --- a/arch/arm/boot/dts/at91sam9260.dtsi
> > > > +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> > > > @@ -33,7 +33,7 @@
> > > >  	};
> > > >  	cpus {
> > > >  		cpu@0 {
> > > > -			compatible = "arm,arm926ejs";
> > > > +			compatible = "arm,arm926";
> > > 
> > > I don't understand why you are doing this. If this does not match the
> > > documentation, fix the documentation. We can't continue on changing dts
> > > files without reqard to breaking compatibility.
> > 
> > IMHO compatibility is already broken. There are a number of dts in the
> > kernel missing cpus and cpu nodes, others with cpu nodes missing
> > device_type = "cpu", missing cpu nodes compatible properties and the list
> > goes on and on. Those files got merged in the kernel before bindings were
> > properly defined for ARM so at that point in time the only reference was the
> > ePAPR and still, it was not followed (eg my broken patch above fails to add
> > device_type = "cpu" to the cpu node, should I change the documentation (ePAPR)
> > to make the dts above compliant ? I do not think so, I reckon we should fix
> > all dts and force them to comply with the ePAPR and the in-kernel bindings).
> > 
> > If we do not set in stone the bindings and draw a line now, this stuff will
> > go wild, it is already in a state that I do not like much.
> > 
> > The reason we are patching the compatible property above is to avoid having
> > compatible properties containing suffixes for CPUs, we do not deem that
> > necessary, see:
> > 
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/145305.html
> > 
> > That's just my opinion, open to change it to find a proper solution to this
> > issue as long as we make progress.
> 
> I do not agree when you set the compatible you need to be preceise the cpu is
> a arm926ejs not a arm926

I updated the bindings with all processor variants so that we will all
be happy again (I hope). My comments still stand though and these dts need
patching, I am posting the required changes in v3.

Lorenzo

Re: [RFC PATCH v2 03/13] ARM: mach-at91: cpus/cpu node dts updates

[Jean-Christophe PLAGNIOL-VILLARD]

On 10:29 Wed 24 Apr     , Lorenzo Pieralisi wrote:
> On Tue, Apr 23, 2013 at 08:52:59PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 14:53 Tue 23 Apr     , Lorenzo Pieralisi wrote:
> > > On Tue, Apr 23, 2013 at 02:11:46PM +0100, Rob Herring wrote:
> > > > On 04/22/2013 10:27 AM, Lorenzo Pieralisi wrote:
> > > > > This patch updates the in-kernel dts files according to the latest cpus
> > > > > and cpu bindings updates for ARM.
> > > > > 
> > > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > > ---
> > > > >  arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
> > > > >  arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
> > > > >  arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
> > > > >  arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
> > > > >  4 files changed, 4 insertions(+), 4 deletions(-)
> > > > > 
> > > > > diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> > > > > index cb7bcc5..2e9de85 100644
> > > > > --- a/arch/arm/boot/dts/at91sam9260.dtsi
> > > > > +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> > > > > @@ -33,7 +33,7 @@
> > > > >  	};
> > > > >  	cpus {
> > > > >  		cpu@0 {
> > > > > -			compatible = "arm,arm926ejs";
> > > > > +			compatible = "arm,arm926";
> > > > 
> > > > I don't understand why you are doing this. If this does not match the
> > > > documentation, fix the documentation. We can't continue on changing dts
> > > > files without reqard to breaking compatibility.
> > > 
> > > IMHO compatibility is already broken. There are a number of dts in the
> > > kernel missing cpus and cpu nodes, others with cpu nodes missing
> > > device_type = "cpu", missing cpu nodes compatible properties and the list
> > > goes on and on. Those files got merged in the kernel before bindings were
> > > properly defined for ARM so at that point in time the only reference was the
> > > ePAPR and still, it was not followed (eg my broken patch above fails to add
> > > device_type = "cpu" to the cpu node, should I change the documentation (ePAPR)
> > > to make the dts above compliant ? I do not think so, I reckon we should fix
> > > all dts and force them to comply with the ePAPR and the in-kernel bindings).
> > > 
> > > If we do not set in stone the bindings and draw a line now, this stuff will
> > > go wild, it is already in a state that I do not like much.
> > > 
> > > The reason we are patching the compatible property above is to avoid having
> > > compatible properties containing suffixes for CPUs, we do not deem that
> > > necessary, see:
> > > 
> > > http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/145305.html
> > > 
> > > That's just my opinion, open to change it to find a proper solution to this
> > > issue as long as we make progress.
> > 
> > I do not agree when you set the compatible you need to be preceise the cpu is
> > a arm926ejs not a arm926
> 
> I updated the bindings with all processor variants so that we will all
> be happy again (I hope). My comments still stand though and these dts need
> patching, I am posting the required changes in v3.

ok tks put me in Cc for at91

Best Regards,
J.
> 
> Lorenzo
> 

[RFC PATCH v2 06/13] ARM: mach-lpc32xx: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/lpc32xx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index 1582f48..c376975 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -19,7 +19,7 @@
 
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
-- 
1.7.12

[RFC PATCH v2 07/13] ARM: mach-omap2: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/omap3.dtsi | 4 ++++
 arch/arm/boot/dts/omap4.dtsi | 5 +++++
 arch/arm/boot/dts/omap5.dtsi | 5 +++++
 3 files changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 1acc261..b4e2b8d 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -21,8 +21,12 @@
 	};
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "arm,cortex-a8";
+			reg = <0x0>;
 		};
 	};
 
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 739bb79..9c5f7c2 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -28,13 +28,18 @@
 	};
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
+			reg = <0x0>;
 		};
 		cpu@1 {
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
+			reg = <0x1>;
 		};
 	};
 
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 790bb2a..d2106b6 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -31,8 +31,12 @@
 	};
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "arm,cortex-a15";
+			reg = <0x0>;
 			timer {
 				compatible = "arm,armv7-timer";
 				/* 14th PPI IRQ, active low level-sensitive */
@@ -42,6 +46,7 @@
 		};
 		cpu@1 {
 			compatible = "arm,cortex-a15";
+			reg = <0x1>;
 			timer {
 				compatible = "arm,armv7-timer";
 				/* 14th PPI IRQ, active low level-sensitive */
-- 
1.7.12

[RFC PATCH v2 08/13] ARM: mach-picoxcell: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 2 +-
 arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
index f0a8c20..978dbdf 100644
--- a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
+++ b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
@@ -22,7 +22,7 @@
 		#size-cells = <0>;
 
 		cpu@0 {
-			compatible = "arm,1176jz-s";
+			compatible = "arm,arm1176";
 			clock-frequency = <400000000>;
 			reg = <0>;
 			d-cache-line-size = <32>;
diff --git a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi b/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
index daa962d..5fa309e 100644
--- a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
+++ b/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
@@ -22,7 +22,7 @@
 		#size-cells = <0>;
 
 		cpu@0 {
-			compatible = "arm,1176jz-s";
+			compatible = "arm,arm1176;
 			cpu-clock = <&arm_clk>, "cpu";
 			reg = <0>;
 			d-cache-line-size = <32>;
-- 
1.7.12

[RFC PATCH v2 09/13] ARM: mach-shmobile: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/r8a7740.dtsi | 3 +++
 arch/arm/boot/dts/sh7372.dtsi  | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 798fa35..b47bb36 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -14,8 +14,11 @@
 	compatible = "renesas,r8a7740";
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		cpu@0 {
 			compatible = "arm,cortex-a9";
+			reg = <0x0>;
 		};
 	};
 };
diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
index 677fc60..78478af 100644
--- a/arch/arm/boot/dts/sh7372.dtsi
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -14,8 +14,12 @@
 	compatible = "renesas,sh7372";
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "arm,cortex-a8";
+			reg = <0x0>;
 		};
 	};
 };
-- 
1.7.12

Re: [RFC PATCH v2 09/13] ARM: mach-shmobile: cpus/cpu nodes dts updates

[Simon Horman]

On Mon, Apr 22, 2013 at 04:27:31PM +0100, Lorenzo Pieralisi wrote:
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.

Sorry to be a pain, but I would appreciate two separate patches,
one per-Soc.

> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> ---
>  arch/arm/boot/dts/r8a7740.dtsi | 3 +++
>  arch/arm/boot/dts/sh7372.dtsi  | 4 ++++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
> index 798fa35..b47bb36 100644
> --- a/arch/arm/boot/dts/r8a7740.dtsi
> +++ b/arch/arm/boot/dts/r8a7740.dtsi
> @@ -14,8 +14,11 @@
>  	compatible = "renesas,r8a7740";
>  
>  	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
>  		cpu@0 {
>  			compatible = "arm,cortex-a9";
> +			reg = <0x0>;
>  		};
>  	};
>  };
> diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
> index 677fc60..78478af 100644
> --- a/arch/arm/boot/dts/sh7372.dtsi
> +++ b/arch/arm/boot/dts/sh7372.dtsi
> @@ -14,8 +14,12 @@
>  	compatible = "renesas,sh7372";
>  
>  	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
>  		cpu@0 {
>  			compatible = "arm,cortex-a8";
> +			reg = <0x0>;
>  		};
>  	};
>  };
> -- 
> 1.7.12
> 
> 

[RFC PATCH v2 10/13] ARM: mach-spear: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/spear3xx.dtsi | 2 +-
 arch/arm/boot/dts/spear600.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi
index c2a852d..485d4d8 100644
--- a/arch/arm/boot/dts/spear3xx.dtsi
+++ b/arch/arm/boot/dts/spear3xx.dtsi
@@ -18,7 +18,7 @@
 
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index 19f99dc..0498700 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -16,7 +16,7 @@
 
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
-- 
1.7.12

Re: [RFC PATCH v2 10/13] ARM: mach-spear: cpus/cpu nodes dts updates

[Viresh Kumar]

On 22 April 2013 20:57, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> wrote:
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> ---
>  arch/arm/boot/dts/spear3xx.dtsi | 2 +-
>  arch/arm/boot/dts/spear600.dtsi | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

[RFC PATCH v2 11/13] ARM: mach-sunxi: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/sunxi.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi
index 8b36abe..447a0f0 100644
--- a/arch/arm/boot/dts/sunxi.dtsi
+++ b/arch/arm/boot/dts/sunxi.dtsi
@@ -17,8 +17,12 @@
 	interrupt-parent = <&intc>;
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "arm,cortex-a8";
+			reg = <0x0>;
 		};
 	};
 
-- 
1.7.12

Re: [RFC PATCH v2 11/13] ARM: mach-sunxi: cpus/cpu nodes dts updates

[Maxime Ripard]

Hi Lorenzo,

Le 22/04/2013 17:27, Lorenzo Pieralisi a écrit :
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> ---
>  arch/arm/boot/dts/sunxi.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)

Just to let you know, this file won't exist anymore in 3.10, and has
been split out in sun4i-a10.dtsi and sun5i-a13.dtsi. You'll obviously
need to change both when rebasing.

Other than that,
Acked-By: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[RFC PATCH v2 12/13] ARM: mach-vt8500: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm/boot/dts/wm8505.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index e74a1c0..a470808 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -13,7 +13,7 @@
 
 	cpus {
 		cpu@0 {
-			compatible = "arm,arm926ejs";
+			compatible = "arm,arm926";
 		};
 	};
 
-- 
1.7.12

Re: [RFC PATCH v2 12/13] ARM: mach-vt8500: cpus/cpu nodes dts updates

[Tony Prisk]

On 23/04/13 03:27, Lorenzo Pieralisi wrote:
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> ---
>   arch/arm/boot/dts/wm8505.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
> index e74a1c0..a470808 100644
> --- a/arch/arm/boot/dts/wm8505.dtsi
> +++ b/arch/arm/boot/dts/wm8505.dtsi
> @@ -13,7 +13,7 @@
>   
>   	cpus {
>   		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>   		};
>   	};
>   
As the only author for that file, and the arch-vt8500 maintainer, a CC 
would have been nice :)

This binding is still incomplete.device_type, compatible and reg are all 
required properties.
Also, you seem to have only fixed the wm8505.dtsi, while vt8500.dtsi, 
wm8650.dtsi and wm8850.dtsi are all left incorrect.

I am already carrying a patch to fix all this properly so could you drop 
the arch-vt8500 related patch and I will send in a more complete version 
for 3.11

Regards
Tony Prisk

Re: [RFC PATCH v2 12/13] ARM: mach-vt8500: cpus/cpu nodes dts updates

[Tony Prisk]

On 23/04/13 14:13, Tony Prisk wrote:
> On 23/04/13 03:27, Lorenzo Pieralisi wrote:
>> This patch updates the in-kernel dts files according to the latest cpus
>> and cpu bindings updates for ARM.
>>
>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>> ---
>>   arch/arm/boot/dts/wm8505.dtsi | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/wm8505.dtsi 
>> b/arch/arm/boot/dts/wm8505.dtsi
>> index e74a1c0..a470808 100644
>> --- a/arch/arm/boot/dts/wm8505.dtsi
>> +++ b/arch/arm/boot/dts/wm8505.dtsi
>> @@ -13,7 +13,7 @@
>>         cpus {
>>           cpu@0 {
>> -            compatible = "arm,arm926ejs";
>> +            compatible = "arm,arm926";
>>           };
>>       };
> As the only author for that file, and the arch-vt8500 maintainer, a CC 
> would have been nice :)
>
> This binding is still incomplete.device_type, compatible and reg are 
> all required properties.
> Also, you seem to have only fixed the wm8505.dtsi, while vt8500.dtsi, 
> wm8650.dtsi and wm8850.dtsi are all left incorrect.
>
> I am already carrying a patch to fix all this properly so could you 
> drop the arch-vt8500 related patch and I will send in a more complete 
> version for 3.11
>
> Regards
> Tony Prisk

I didn't notice the rules had been changed in the last patch - shouldn't 
you be changing the rules (read: binding) before changing the devicetree 
files?
Request still stands - please drop this patch and I will submit a more 
complete one with the other SoCs updated as well.

Tony P

Re: [RFC PATCH v2 12/13] ARM: mach-vt8500: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

On Tue, Apr 23, 2013 at 03:20:46AM +0100, Tony Prisk wrote:
> On 23/04/13 14:13, Tony Prisk wrote:
> > On 23/04/13 03:27, Lorenzo Pieralisi wrote:
> >> This patch updates the in-kernel dts files according to the latest cpus
> >> and cpu bindings updates for ARM.
> >>
> >> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> >> ---
> >>   arch/arm/boot/dts/wm8505.dtsi | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm/boot/dts/wm8505.dtsi 
> >> b/arch/arm/boot/dts/wm8505.dtsi
> >> index e74a1c0..a470808 100644
> >> --- a/arch/arm/boot/dts/wm8505.dtsi
> >> +++ b/arch/arm/boot/dts/wm8505.dtsi
> >> @@ -13,7 +13,7 @@
> >>         cpus {
> >>           cpu@0 {
> >> -            compatible = "arm,arm926ejs";
> >> +            compatible = "arm,arm926";
> >>           };
> >>       };
> > As the only author for that file, and the arch-vt8500 maintainer, a CC 
> > would have been nice :)
> >
> > This binding is still incomplete.device_type, compatible and reg are 
> > all required properties.
> > Also, you seem to have only fixed the wm8505.dtsi, while vt8500.dtsi, 
> > wm8650.dtsi and wm8850.dtsi are all left incorrect.
> >
> > I am already carrying a patch to fix all this properly so could you 
> > drop the arch-vt8500 related patch and I will send in a more complete 
> > version for 3.11
> >
> > Regards
> > Tony Prisk
> 
> I didn't notice the rules had been changed in the last patch - shouldn't 
> you be changing the rules (read: binding) before changing the devicetree 
> files?

Fair enough, point taken.

> Request still stands - please drop this patch and I will submit a more 
> complete one with the other SoCs updated as well.

Great, thanks,
Lorenzo

Re: [RFC PATCH v2 12/13] ARM: mach-vt8500: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

On Tue, Apr 23, 2013 at 03:13:18AM +0100, Tony Prisk wrote:
> On 23/04/13 03:27, Lorenzo Pieralisi wrote:
> > This patch updates the in-kernel dts files according to the latest cpus
> > and cpu bindings updates for ARM.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > ---
> >   arch/arm/boot/dts/wm8505.dtsi | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
> > index e74a1c0..a470808 100644
> > --- a/arch/arm/boot/dts/wm8505.dtsi
> > +++ b/arch/arm/boot/dts/wm8505.dtsi
> > @@ -13,7 +13,7 @@
> >   
> >   	cpus {
> >   		cpu@0 {
> > -			compatible = "arm,arm926ejs";
> > +			compatible = "arm,arm926";
> >   		};
> >   	};
> >   
> As the only author for that file, and the arch-vt8500 maintainer, a CC 
> would have been nice :)

Apologies.

> This binding is still incomplete.device_type, compatible and reg are all 
> required properties.

device_type should already be there and I should not be in charge of
adding it; reg is not required for that processor.

> Also, you seem to have only fixed the wm8505.dtsi, while vt8500.dtsi, 
> wm8650.dtsi and wm8850.dtsi are all left incorrect.

There is no cpus node in there. I can't add cpus node in all dts files
in the kernel where it is missing (why have those dts files been
accepted in the first place, with no cpus node ? why ? cpus node is mandatory
since device tree was introduced, I really do not understand why those dts
landed in the kernel as they are), I would kindly ask maintainers to do
that, I just can not know what cpus are there for every given SoC.

> I am already carrying a patch to fix all this properly so could you drop 
> the arch-vt8500 related patch and I will send in a more complete version 
> for 3.11

Good, thanks.
Lorenzo

Re: [RFC PATCH v2 12/13] ARM: mach-vt8500: cpus/cpu nodes dts updates

[Tony Prisk]

On 23/04/13 03:27, Lorenzo Pieralisi wrote:
> This patch updates the in-kernel dts files according to the latest cpus
> and cpu bindings updates for ARM.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> ---
>   arch/arm/boot/dts/wm8505.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
> index e74a1c0..a470808 100644
> --- a/arch/arm/boot/dts/wm8505.dtsi
> +++ b/arch/arm/boot/dts/wm8505.dtsi
> @@ -13,7 +13,7 @@
>   
>   	cpus {
>   		cpu@0 {
> -			compatible = "arm,arm926ejs";
> +			compatible = "arm,arm926";
>   		};
>   	};
>   
The more I look at this, the more wrong it is :/

 From the new binding documentation,

+	A cpus node must define the following properties:
+
+	- #address-cells
+		Usage: required
+		Value type: <u32>
+		Definition: must be set to 1 for 32-bit systems and 2 for
+			    64-bit systems
+	- #size-cells
+		Usage: required
+		Value type: <u32>
+		Definition: must be set to 0

...

+- cpu node
+
+	Description: Describes a CPU in an ARM based system
+
+	PROPERTIES
+
+	- device_type
+		Usage: required
+		Value type: <string>
+		Definition: must be "cpu"

Three required properties that aren't present in the patch.

cpus {
     #size-cells = <0>;
     #address-cells = <1>;

     cpu {
         device_type = "cpu"
         compatible = "arm,arm926";
     };
};

Regards
Tony P

Re: [RFC PATCH v2 12/13] ARM: mach-vt8500: cpus/cpu nodes dts updates

[Lorenzo Pieralisi]

On Tue, Apr 23, 2013 at 03:43:48AM +0100, Tony Prisk wrote:
> On 23/04/13 03:27, Lorenzo Pieralisi wrote:
> > This patch updates the in-kernel dts files according to the latest cpus
> > and cpu bindings updates for ARM.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > ---
> >   arch/arm/boot/dts/wm8505.dtsi | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
> > index e74a1c0..a470808 100644
> > --- a/arch/arm/boot/dts/wm8505.dtsi
> > +++ b/arch/arm/boot/dts/wm8505.dtsi
> > @@ -13,7 +13,7 @@
> >   
> >   	cpus {
> >   		cpu@0 {
> > -			compatible = "arm,arm926ejs";
> > +			compatible = "arm,arm926";
> >   		};
> >   	};
> >   
> The more I look at this, the more wrong it is :/
> 
>  From the new binding documentation,
> 
> +	A cpus node must define the following properties:
> +
> +	- #address-cells
> +		Usage: required
> +		Value type: <u32>
> +		Definition: must be set to 1 for 32-bit systems and 2 for
> +			    64-bit systems
> +	- #size-cells
> +		Usage: required
> +		Value type: <u32>
> +		Definition: must be set to 0
> 
> ...
> 
> +- cpu node
> +
> +	Description: Describes a CPU in an ARM based system
> +
> +	PROPERTIES
> +
> +	- device_type
> +		Usage: required
> +		Value type: <string>
> +		Definition: must be "cpu"
> 

This property is required since DT was invented, again, I should not be
in charge of adding it.

> Three required properties that aren't present in the patch.
> 
> cpus {
>      #size-cells = <0>;
>      #address-cells = <1>;
> 
>      cpu {
>          device_type = "cpu"
>          compatible = "arm,arm926";
>      };
> };

I am of two minds about this. That processor does not have an MPIDR
equivalent so in theory #address-cells and #size-cells could be omitted
because the reg property is meaningless. I do not know to be honest the
best way to handle this.

Thoughts ?

Thanks for the review,
Lorenzo

[RFC PATCH v2 13/13] ARM: DT: kernel: DT cpu node bindings update

[Lorenzo Pieralisi]

In order to extend the current cpu nodes bindings to newer CPUs
inclusive of AArch64 and to update support for older ARM CPUs this
patch updates device tree documentation for the cpu nodes bindings.

Main changes:

- adds 64-bit bindings (inclusive of cpus node #address-cells updates)
- defines behaviour on pre and post v7 uniprocessor systems
- adds ARM 11MPcore specific reg property definition

DT cpu map parsing code must be made compliant with the latest bindings
updates, hence this patch also updates the arm_dt_init_cpu_maps() function
with checks and additional parsing rules.

Uniprocessor systems predating v7 do not parse the cpus node at all
since the reg property is meaningless on those systems.

Device trees for 64-bit systems can be taken as device tree input also
for 64-bit CPUs running in 32-bit mode. The code checks that the reg entries
are zeroed as required in the respective fields and detects automatically
the cpus node #address-cells value so that device tree written for
64-bit ARM platforms (cpus #address-cells == 2) can still be taken as
input. The correct device tree entries are to be set up by the boot
loader, kernel code just checks that device tree entries in the cpus
node are as expected for a 32-bit CPU (reg[63:24] == 0).

cpu node entries with invalid reg property or containing duplicates are
ignored and the device tree parsing is not stopped anymore when such
entries are encountered, the device tree cpu entry is just skipped.

A device tree with cpu nodes missing the boot CPU MPIDR is considered a
hard error and the kernel flags this up as a bug to force firmware updates.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
---
 Documentation/devicetree/bindings/arm/cpus.txt | 378 ++++++++++++++++++++++---
 arch/arm/kernel/devtree.c                      |  82 ++++--
 2 files changed, 384 insertions(+), 76 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index f32494d..82684ca 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -1,77 +1,361 @@
-* ARM CPUs binding description
+=================
+ARM CPUs bindings
+=================
 
 The device tree allows to describe the layout of CPUs in a system through
 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
 defining properties for every cpu.
 
-Bindings for CPU nodes follow the ePAPR standard, available from:
-
-http://devicetree.org
-
-For the ARM architecture every CPU node must contain the following properties:
-
-- device_type:	must be "cpu"
-- reg:		property matching the CPU MPIDR[23:0] register bits
-		reg[31:24] bits must be set to 0
-- compatible:	should be one of:
-		"arm,arm1020"
-		"arm,arm1020e"
-		"arm,arm1022"
-		"arm,arm1026"
-		"arm,arm720"
-		"arm,arm740"
-		"arm,arm7tdmi"
-		"arm,arm920"
-		"arm,arm922"
-		"arm,arm925"
-		"arm,arm926"
-		"arm,arm940"
-		"arm,arm946"
-		"arm,arm9tdmi"
-		"arm,cortex-a5"
-		"arm,cortex-a7"
-		"arm,cortex-a8"
-		"arm,cortex-a9"
-		"arm,cortex-a15"
-		"arm,arm1136"
-		"arm,arm1156"
-		"arm,arm1176"
-		"arm,arm11mpcore"
-		"faraday,fa526"
-		"intel,sa110"
-		"intel,sa1100"
-		"marvell,feroceon"
-		"marvell,mohawk"
-		"marvell,xsc3"
-		"marvell,xscale"
-
-Example:
+Bindings for CPU nodes follow the ePAPR v1.1 standard, available from:
+
+https://www.power.org/documentation/epapr-version-1-1/
+
+with updates for 32-bit and 64-bit ARM systems provided in this document.
+
+================================
+Convention used in this document
+================================
+
+This document follows the conventions described in the ePAPR v1.1, with
+the addition:
+
+- square brackets define bitfields, eg reg[7:0] value of the bitfield in
+  the reg property contained in bits 7 down to 0
+
+=====================================
+cpus and cpu node bindings definition
+=====================================
+
+The ARM architecture, in accordance with the ePAPR, requires the cpus and cpu
+nodes to be present and contain the properties described below.
+
+- cpus node
+
+	Description: Container of cpu nodes
+
+	The node name must be "cpus".
+
+	A cpus node must define the following properties:
+
+	- #address-cells
+		Usage: required
+		Value type: <u32>
+		Definition: must be set to 1 for 32-bit systems and 2 for
+			    64-bit systems
+	- #size-cells
+		Usage: required
+		Value type: <u32>
+		Definition: must be set to 0
+
+- cpu node
+
+	Description: Describes a CPU in an ARM based system
+
+	PROPERTIES
+
+	- device_type
+		Usage: required
+		Value type: <string>
+		Definition: must be "cpu"
+	- reg
+		Usage and definition depend on ARM architecture version and
+		configuration:
+
+			# On uniprocessor ARM architectures previous to v7
+			  this property is optional since they do not define
+			  any register that provides a CPU identifier.
+			  Any value set in the reg property for these CPUs
+			  should be ignored.
+
+			# On ARM 11 MPcore based systems this property is
+			  required and matches the CPUID[11:0] register bits.
+
+			  Bits [11:0] in the reg cell must be set to
+			  bits [11:0] in CPU ID register.
+
+			  All other bits in the reg cell must be set to 0.
+
+			# On 32-bit ARM v7 or later systems this property is
+			  required and matches the CPU MPIDR[23:0] register
+			  bits.
+
+			  Bits [23:0] in the reg cell must be set to
+			  bits [23:0] in MPIDR.
+
+			  All other bits in the reg cell must be set to 0.
+
+			# On ARM v8 64-bit systems, where the reg property
+			  is made up of two cells to accomodate the 64-bit
+			  MPDIR_EL1 register this property is required and
+			  matches:
+
+			  - On systems running the OS in AArch32:
+
+			    The first reg cell must be set to 0.
+
+			    The second reg cell bits [23:0] must be set to
+			    bits [23:0] of MPIDR_EL1, all other bits in the
+			    reg cell must be set to 0.
+
+			  - On systems running the OS in AArch64:
+
+			    The first reg cell bits [7:0] must be set to
+			    bits [39:32] of MPIDR_EL1.
+
+			    The second reg cell bits [23:0] must be set to
+			    bits [23:0] of MPIDR_EL1.
+
+			    All other bits in the reg cells must be set to 0.
+	- compatible:
+		Usage: required
+		Value type: <string>
+		Definition: should be one of:
+			    "arm,arm720"
+			    "arm,arm740"
+			    "arm,arm7tdmi"
+			    "arm,arm920"
+			    "arm,arm922"
+			    "arm,arm925"
+			    "arm,arm926"
+			    "arm,arm940"
+			    "arm,arm946"
+			    "arm,arm9tdmi"
+			    "arm,arm1020"
+			    "arm,arm1022"
+			    "arm,arm1026"
+			    "arm,arm1136"
+			    "arm,arm1156"
+			    "arm,arm1176"
+			    "arm,arm11mpcore"
+			    "arm,cortex-a5"
+			    "arm,cortex-a7"
+			    "arm,cortex-a8"
+			    "arm,cortex-a9"
+			    "arm,cortex-a15"
+			    "arm,cortex-a53"
+			    "arm,cortex-a57"
+			    "arm,cortex-m0"
+			    "arm,cortex-m0+"
+			    "arm,cortex-m1"
+			    "arm,cortex-m3"
+			    "arm,cortex-m4"
+			    "arm,cortex-r4"
+			    "arm,cortex-r5"
+			    "arm,cortex-r7"
+			    "faraday,fa526"
+			    "intel,sa110"
+			    "intel,sa1100"
+			    "marvell,feroceon"
+			    "marvell,mohawk"
+			    "marvell,pj4"
+			    "marvell,sheeva-v7"
+			    "marvell,xsc3"
+			    "marvell,xscale"
+			    "qcom,krait"
+			    "qcom,scorpion"
+	- enable-method
+		Value type: <stringlist>
+		Usage and definition depend on ARM architecture version and
+		configuration:
+			# On ARM v8 64-bit systems running the OS in AArch64,
+			  this property is required and must be "spin-table".
+			# On ARM 32-bit systems or ARM v8 systems running
+			  the OS in AArch32 this property is prohibited.
+
+	- cpu-release-addr
+		Usage: required for systems that have an "enable-method"
+		       property value of "spin-table".
+		Value type: <prop-encoded-array>
+		Definition:
+			# On ARM v8 64-bit systems must be a two cell
+			  property identifying a 64-bit zero-initialised
+			  memory location.
+
+Example 1 (dual-cluster big.LITTLE system 32-bit):
 
 	cpus {
 		#size-cells = <0>;
 		#address-cells = <1>;
 
-		CPU0: cpu@0 {
+		cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <0x0>;
 		};
 
-		CPU1: cpu@1 {
+		cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <0x1>;
 		};
 
-		CPU2: cpu@100 {
+		cpu@100 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0x100>;
 		};
 
-		CPU3: cpu@101 {
+		cpu@101 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0x101>;
 		};
 	};
+
+Example 2 (Cortex-A8 uniprocessor 32-bit system):
+
+	cpus {
+		#size-cells = <0>;
+		#address-cells = <1>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a8";
+			reg = <0x0>;
+		};
+
+	};
+
+Example 3 (ARM 1176 uniprocessor 32-bit system):
+
+	cpus {
+		cpu {
+			device_type = "cpu";
+			compatible = "arm,arm1176";
+		};
+	};
+
+Example 4 (ARM Cortex-A57 64-bit system):
+
+cpus {
+	#size-cells = <0>;
+	#address-cells = <2>;
+
+	cpu@0 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x0>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@1 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x1>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x100>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@101 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x101>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@10000 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x10000>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@10001 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x10001>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@10100 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x10100>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@10101 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x0 0x10101>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100000000 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x0>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100000001 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x1>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100000100 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x100>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100000101 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x101>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100010000 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x10000>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100010001 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x10001>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100010100 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x10100>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+
+	cpu@100010101 {
+		device_type = "cpu";
+		compatible = "arm,cortex-a57";
+		reg = <0x1 0x10101>;
+		enable-method = "spin-table";
+		cpu-release-addr = <0 0x20000000>;
+	};
+};
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index f149217..4eda2dc 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -23,6 +23,7 @@
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/smp_plat.h>
+#include <asm/system_info.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
@@ -81,48 +82,68 @@ void __init arm_dt_init_cpu_maps(void)
 	static u32 tmp_map[NR_CPUS] __initdata = {
 				[0 ... NR_CPUS-1] = UINT_MAX };
 	struct device_node *cpu, *cpus;
-	u32 i, j, cpuidx = 1;
+	u32 i, j, ac, cpuidx = 1;
 	u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
-
+	int len;
 	bool bootcpu_valid = false;
+
 	cpus = of_find_node_by_path("/cpus");
 
-	if (!cpus)
+	if (!cpus || ((cpu_architecture() < CPU_ARCH_ARMv7) && !is_smp()))
 		return;
 
+	if (WARN_ON(of_property_read_u32(cpus, "#address-cells", &ac)))
+		ac = of_n_addr_cells(cpus);
+
 	for_each_child_of_node(cpus, cpu) {
-		u32 hwid;
+		u64 hwid64;
+		u32 hwid32;
+		const __be32 *prop;
 
 		pr_debug(" * %s...\n", cpu->full_name);
 		/*
-		 * A device tree containing CPU nodes with missing "reg"
-		 * properties is considered invalid to build the
-		 * cpu_logical_map.
+		 * A CPU node with missing or wrong "reg" property is
+		 * considered invalid to build a cpu_logical_map entry.
 		 */
-		if (of_property_read_u32(cpu, "reg", &hwid)) {
-			pr_debug(" * %s missing reg property\n",
-				     cpu->full_name);
-			return;
+		prop = of_get_property(cpu, "reg", &len);
+		if (!prop || len < (ac * sizeof(*prop))) {
+				WARN(1, " * %s node missing/wrong reg"
+					 " property, skipped\n",
+					 cpu->full_name);
+				goto next;
 		}
-
 		/*
-		 * 8 MSBs must be set to 0 in the DT since the reg property
-		 * defines the MPIDR[23:0].
+		 * Always read reg as u64 value.
+		 * For dts with #address-cells == 1 hwid64[63:32]
+		 * will be set to 0 by of_read_number.
+		 * Toss away the top 32 bits and store value in hwid32.
+		 */
+		hwid32 = hwid64 = of_read_number(prop, ac);
+		/*
+		 * hwid64[63:24] must be always be 0 since the reg
+		 * property defines the MPIDR[23:0] bits regardless
+		 * of the cpus node #address-cells value.
 		 */
-		if (hwid & ~MPIDR_HWID_BITMASK)
-			return;
+		if (hwid64 & ~MPIDR_HWID_BITMASK) {
+			WARN(1, " * %s node reg[63:24] must be 0 on"
+			       " 32-bit dts, got %#016llx, skipped\n",
+			       cpu->full_name, hwid64);
+			goto next;
+		}
 
 		/*
 		 * Duplicate MPIDRs are a recipe for disaster.
 		 * Scan all initialized entries and check for
-		 * duplicates. If any is found just bail out.
+		 * duplicates. If any is found just ignore the CPU.
 		 * temp values were initialized to UINT_MAX
 		 * to avoid matching valid MPIDR[23:0] values.
 		 */
 		for (j = 0; j < cpuidx; j++)
-			if (WARN(tmp_map[j] == hwid, "Duplicate /cpu reg "
-						     "properties in the DT\n"))
-				return;
+			if (WARN(tmp_map[j] == hwid32, " * %s node "
+						"duplicate cpu reg "
+						"property, skipped\n",
+						cpu->full_name))
+				goto next;
 
 		/*
 		 * Build a stashed array of MPIDR values. Numbering scheme
@@ -133,26 +154,29 @@ void __init arm_dt_init_cpu_maps(void)
 		 * logical map built from DT is validated and can be used
 		 * to override the map created in smp_setup_processor_id().
 		 */
-		if (hwid == mpidr) {
+		if (hwid32 == mpidr) {
 			i = 0;
 			bootcpu_valid = true;
 		} else {
 			i = cpuidx++;
 		}
 
-		if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than "
-					       "max cores %u, capping them\n",
+		if (WARN_ONCE(cpuidx > nr_cpu_ids, "DT cpu %u nodes greater"
+						   " than max cores %u,"
+						   " capping them\n",
 					       cpuidx, nr_cpu_ids)) {
 			cpuidx = nr_cpu_ids;
-			break;
+			goto next;
 		}
 
-		tmp_map[i] = hwid;
+		tmp_map[i] = hwid32;
+next:	;
 	}
-
-	if (WARN(!bootcpu_valid, "DT missing boot CPU MPIDR[23:0], "
-				 "fall back to default cpu_logical_map\n"))
-		return;
+	/*
+	 * A DT missing the boot CPU MPIDR is a really bad omen
+	 * Flag it up as such and force firmware/dtb updates
+	 */
+	BUG_ON(!bootcpu_valid);
 
 	/*
 	 * Since the boot CPU node contains proper data, and all nodes have
-- 
1.7.12

Re: [RFC PATCH v2 13/13] ARM: DT: kernel: DT cpu node bindings update

[Tony Prisk]

On 23/04/13 03:27, Lorenzo Pieralisi wrote:
> +
> +=====================================
> +cpus and cpu node bindings definition
> +=====================================
> +
> +The ARM architecture, in accordance with the ePAPR, requires the cpus and cpu
> +nodes to be present and contain the properties described below.
> +
> +- cpus node
> +
> +	Description: Container of cpu nodes
> +
> +	The node name must be "cpus".
> +
> +	A cpus node must define the following properties:
> +
> +	- #address-cells
> +		Usage: required
> +		Value type: <u32>
> +		Definition: must be set to 1 for 32-bit systems and 2 for
> +			    64-bit systems
> +	- #size-cells
> +		Usage: required
> +		Value type: <u32>
> +		Definition: must be set to 0
> +
...
> +Example 3 (ARM 1176 uniprocessor 32-bit system):
> +
> +	cpus {
> +		cpu {
> +			device_type = "cpu";
> +			compatible = "arm,arm1176";
> +		};
> +	};
> +
This example is missing the required #size-cells and #address-cells 
properties.

Regards
Tony P

Re: [RFC PATCH v2 13/13] ARM: DT: kernel: DT cpu node bindings update

[Stephen Warren]

On 04/22/2013 09:27 AM, Lorenzo Pieralisi wrote:
> In order to extend the current cpu nodes bindings to newer CPUs
> inclusive of AArch64 and to update support for older ARM CPUs this
> patch updates device tree documentation for the cpu nodes bindings.

Since I'm late reviewing this due to vacation, I imagine this has been
applied by now. But for the record, the structure of the DT binding
documentation in this version does look much better to me, and addresses
any concerns I had with v1.

Re: [RFC PATCH v2 13/13] ARM: DT: kernel: DT cpu node bindings update

[Lorenzo Pieralisi]

On Thu, May 02, 2013 at 07:31:05PM +0100, Stephen Warren wrote:
> On 04/22/2013 09:27 AM, Lorenzo Pieralisi wrote:
> > In order to extend the current cpu nodes bindings to newer CPUs
> > inclusive of AArch64 and to update support for older ARM CPUs this
> > patch updates device tree documentation for the cpu nodes bindings.
> 
> Since I'm late reviewing this due to vacation, I imagine this has been
> applied by now. But for the record, the structure of the DT binding
> documentation in this version does look much better to me, and addresses
> any concerns I had with v1.

It is not merged yet, but hopefully it can be as soon as the merge
window closes, I just need to update some bits and bobs after rebasing,
to take into account changes that got merged this cycle.

I will repost a, hopefully, final series as soon as the merge window closes.

Thanks,
Lorenzo

Re: [RFC PATCH v2 00/13] ARM: DT cpu bindings updates

[Will Deacon]

Hi Lorenzo,

On Mon, Apr 22, 2013 at 04:27:22PM +0100, Lorenzo Pieralisi wrote:
> Code relying on the reg property size to be 4-bytes will break when
> dtb compiled for 64-bit kernels are used to boot a 32-bit system so
> kernel code relying on that (bogus) assumption must be updated properly.

So that code currently includes kvmtool, and I think it's unfair to break
it:

	- kvmtool can boot either 32-bit or 64-bit guests under a 64-bit
	  kernel and only AFF0 is exposed by the KVM host (containing the
	  vcpu id). This allows us to use a single cell for the reg
	  property, regardless of the guest payload.

	- It always sets the #address-cells property correctly, so if it
	  passes a 32-bit reg property, then #address-cells will be 0x1

	- This scheme worked fine with older kernels

Why can't we instead allow the kernel to zero extend single-cell CPU reg
properies on 64-bit systems? We can always check them against the logical
map and barf if they don't match what's sitting in the hardware, without
penalising machines which don't make use of the upper bits. Given that
people *will* run 32-bit OSs on 64-bit CPUs (a use-case which we allow), I
don't think penalising 64-bit software is the right thing to do.

Thoughts? I notice Catalin has some patches queued for arm64 which
unconditionally use of_property_read_u64, but I have a patch to honour the
#address-cells property instead.

Will

Re: [RFC PATCH v2 00/13] ARM: DT cpu bindings updates

[Lorenzo Pieralisi]

Hi Will,

On Mon, Apr 22, 2013 at 05:41:12PM +0100, Will Deacon wrote:
> Hi Lorenzo,
> 
> On Mon, Apr 22, 2013 at 04:27:22PM +0100, Lorenzo Pieralisi wrote:
> > Code relying on the reg property size to be 4-bytes will break when
> > dtb compiled for 64-bit kernels are used to boot a 32-bit system so
> > kernel code relying on that (bogus) assumption must be updated properly.
> 
> So that code currently includes kvmtool, and I think it's unfair to break
> it:
> 
> 	- kvmtool can boot either 32-bit or 64-bit guests under a 64-bit
> 	  kernel and only AFF0 is exposed by the KVM host (containing the
> 	  vcpu id). This allows us to use a single cell for the reg
> 	  property, regardless of the guest payload.
> 
> 	- It always sets the #address-cells property correctly, so if it
> 	  passes a 32-bit reg property, then #address-cells will be 0x1
> 
> 	- This scheme worked fine with older kernels
> 
> Why can't we instead allow the kernel to zero extend single-cell CPU reg
> properies on 64-bit systems? We can always check them against the logical
> map and barf if they don't match what's sitting in the hardware, without
> penalising machines which don't make use of the upper bits. Given that
> people *will* run 32-bit OSs on 64-bit CPUs (a use-case which we allow), I
> don't think penalising 64-bit software is the right thing to do.
> 
> Thoughts? I notice Catalin has some patches queued for arm64 which
> unconditionally use of_property_read_u64, but I have a patch to honour the
> #address-cells property instead.

Basically you want me to rule out passing a dtb with cpus node having
#address-cells == 2 to a 32-bit kernel, correct ? Or put it another way:

- a 32-bit kernel must always get passed a dtb with cpus node
  #address-cells == 1. If the system is ARMv8 with CPUs having
  MPIDR_EL1[63:32] != 0x0, well, running 32-bit kernel on it is not
  the safest thing to do anyway.
- a 64 bit kernel can get passed a dtb blob with configurable
  #address-cells [1,2]. If MPIDR_EL1[63:32] is == 0, #address-cells can be
  set to 1 and the OS must zero extend the reg property. #address-cells
  == 1 implies -> zero extension required in the OS.

It makes sense. I disagree on the check you mentioned, we are not able
to probe MPIDR_EL1, so if the kernel gets passed wrong reg values we have
a problem, logical_map depends on DT, if DT assumes MPIDR_EL1[63:32] is
0 but it is not there is no way we can recover.

I will update the bindings and arm32 parsing code if nobody objects.

Lorenzo

Re: [RFC PATCH v2 00/13] ARM: DT cpu bindings updates

[Arnd Bergmann]

On Monday 22 April 2013, Lorenzo Pieralisi wrote:
> > Thoughts? I notice Catalin has some patches queued for arm64 which
> > unconditionally use of_property_read_u64, but I have a patch to honour the
> > #address-cells property instead.
> 
> Basically you want me to rule out passing a dtb with cpus node having
> #address-cells == 2 to a 32-bit kernel, correct ? Or put it another way:
> 
> - a 32-bit kernel must always get passed a dtb with cpus node
>   #address-cells == 1. 

Why that? For other registers, we allow leading zeroes. This is
already required for MMIO registers on LPAE capable machines.

>   If the system is ARMv8 with CPUs having
>   MPIDR_EL1[63:32] != 0x0, well, running 32-bit kernel on it is not
>   the safest thing to do anyway.

I would assume the hypervisor to provide a virtual MPIDR_EL1 for
a 32 bit kernel in that case.

	Arnd

Re: [RFC PATCH v2 00/13] ARM: DT cpu bindings updates

[Will Deacon]

Hi Lorenzo,

On Mon, Apr 22, 2013 at 08:18:41PM +0100, Arnd Bergmann wrote:
> On Monday 22 April 2013, Lorenzo Pieralisi wrote:
> > > Thoughts? I notice Catalin has some patches queued for arm64 which
> > > unconditionally use of_property_read_u64, but I have a patch to honour the
> > > #address-cells property instead.
> > 
> > Basically you want me to rule out passing a dtb with cpus node having
> > #address-cells == 2 to a 32-bit kernel, correct ? Or put it another way:

No, I'm not proposing that! I don't see why we couldn't make the same change
for 32-bit kernels and honour the address-cells field there too.

> > 
> > - a 32-bit kernel must always get passed a dtb with cpus node
> >   #address-cells == 1. 
> 
> Why that? For other registers, we allow leading zeroes. This is
> already required for MMIO registers on LPAE capable machines.

Indeed, we should probably allow any old #address-cells and parse the reg
property accordingly. Of course, if any bits above bit 31 are non-zero, then
we should complain loudly on an AArch32 system.

> >   If the system is ARMv8 with CPUs having
> >   MPIDR_EL1[63:32] != 0x0, well, running 32-bit kernel on it is not
> >   the safest thing to do anyway.
> 
> I would assume the hypervisor to provide a virtual MPIDR_EL1 for
> a 32 bit kernel in that case.

Correct, but that doesn't help with the bare-metal/host case (where we will
need to scream, as described above).

Also, when I mentioned the mpidr check, I was just referring to the boot
CPU -- you're right about the secondaries.

Will

Re: [RFC PATCH v2 00/13] ARM: DT cpu bindings updates

[Lorenzo Pieralisi]

On Tue, Apr 23, 2013 at 10:09:43AM +0100, Will Deacon wrote:
> Hi Lorenzo,
> 
> On Mon, Apr 22, 2013 at 08:18:41PM +0100, Arnd Bergmann wrote:
> > On Monday 22 April 2013, Lorenzo Pieralisi wrote:
> > > > Thoughts? I notice Catalin has some patches queued for arm64 which
> > > > unconditionally use of_property_read_u64, but I have a patch to honour the
> > > > #address-cells property instead.
> > > 
> > > Basically you want me to rule out passing a dtb with cpus node having
> > > #address-cells == 2 to a 32-bit kernel, correct ? Or put it another way:
> 
> No, I'm not proposing that! I don't see why we couldn't make the same change
> for 32-bit kernels and honour the address-cells field there too.

Ok, that was a misunderstanding. I do honour the address-cells field in
the arm32 kernel, but there is code that does not and must be fixed (or
removed, I have to knock together an RFC to do that or ping the authors
and let them do it).

> > > - a 32-bit kernel must always get passed a dtb with cpus node
> > >   #address-cells == 1. 
> > 
> > Why that? For other registers, we allow leading zeroes. This is
> > already required for MMIO registers on LPAE capable machines.
> 
> Indeed, we should probably allow any old #address-cells and parse the reg
> property accordingly. Of course, if any bits above bit 31 are non-zero, then
> we should complain loudly on an AArch32 system.

That's what I do, but again there is code that does not check that and
honestly what I would like to do is parsing the reg property once for
all at cpu_logical_map init time to avoid reg property parsing proliferation
in the kernel.

> > >   If the system is ARMv8 with CPUs having
> > >   MPIDR_EL1[63:32] != 0x0, well, running 32-bit kernel on it is not
> > >   the safest thing to do anyway.
> > 
> > I would assume the hypervisor to provide a virtual MPIDR_EL1 for
> > a 32 bit kernel in that case.
> 
> Correct, but that doesn't help with the bare-metal/host case (where we will
> need to scream, as described above).
> 
> Also, when I mentioned the mpidr check, I was just referring to the boot
> CPU -- you're right about the secondaries.

Ok, that's agreed.

Thanks,
Lorenzo