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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Russell King - ARM Linux <linux@arm.linux.org.uk>,
	Grant Likely <grant.likely@linaro.org>,
	Rob Herring <rob.herring@calxeda.com>,
	Rob Landley <rob@landley.net>, Arnd Bergmann <arnd@arndb.de>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Gregory Clement <gregory.clement@free-electrons.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	Maxime Ripard <maxime.ripard@free-electrons.com>,
	Jean-Francois Moine <moinejf@free.fr>,
	Gerlando Falauto <gerlando.falauto@keymile.com>,
	devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [RFC patch 7/8] genirq: generic chip: Add linear irq domain support
Date: Fri, 03 May 2013 21:50:53 -0000	[thread overview]
Message-ID: <20130503214629.810207749@linutronix.de> (raw)
In-Reply-To: 20130503212258.385818955@linutronix.de

[-- Attachment #1: genirq-add-linear-domain-support.patch --]
[-- Type: text/plain, Size: 11263 bytes --]

Provide infrastructure for irq chip implementations which work on
linear irq domains.

- Interface to allocate multiple generic chips which are associated to
  the irq domain.

- Interface to get the generic chip pointer for a particular hardware
  interrupt in the domain.

- irq domain mapping function to install the chip for a particular
  interrupt.

Note: This lacks a removal function for now, but this is a draft patch
the ARM folks to work on.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 include/linux/irq.h       |   30 +++++++
 include/linux/irqdomain.h |   12 +++
 kernel/irq/generic-chip.c |  179 ++++++++++++++++++++++++++++++++++++++++++++--
 kernel/irq/irqdomain.c    |    6 -
 4 files changed, 215 insertions(+), 12 deletions(-)

Index: linux-2.6/include/linux/irq.h
===================================================================
--- linux-2.6.orig/include/linux/irq.h
+++ linux-2.6/include/linux/irq.h
@@ -678,6 +678,8 @@ struct irq_chip_type {
  * @wake_active:	Interrupt is marked as an wakeup from suspend source
  * @num_ct:		Number of available irq_chip_type instances (usually 1)
  * @private:		Private data for non generic chip callbacks
+ * @installed:		bitfield to denote installed interrupts
+ * @domain:		irq domain pointer
  * @list:		List head for keeping track of instances
  * @chip_types:		Array of interrupt irq_chip_types
  *
@@ -699,6 +701,8 @@ struct irq_chip_generic {
 	u32			wake_active;
 	unsigned int		num_ct;
 	void			*private;
+	unsigned long		installed;
+	struct irq_domain	*domain;
 	struct list_head	list;
 	struct irq_chip_type	chip_types[0];
 };
@@ -719,6 +723,24 @@ enum irq_gc_flags {
 	IRQ_GC_NO_MASK			= 1 << 3,
 };
 
+/*
+ * struct irq_domain_chip_generic - Generic irq chip data structure for irq domains
+ * @irqs_per_chip:	Number of interrupts per chip
+ * @num_chips:		Number of chips
+ * @irq_flags_to_set:	IRQ* flags to set on irq setup
+ * @irq_flags_to_clear:	IRQ* flags to clear on irq setup
+ * @gc_flags:		Generic chip specific setup flags
+ * @gc:			Array of generic interrupt chips
+ */
+struct irq_domain_chip_generic {
+	unsigned int		irqs_per_chip;
+	unsigned int		num_chips;
+	unsigned int		irq_flags_to_clear;
+	unsigned int		irq_flags_to_set;
+	enum irq_gc_flags	gc_flags;
+	struct irq_chip_generic	gc[0];
+};
+
 /* Generic chip callback functions */
 void irq_gc_noop(struct irq_data *d);
 void irq_gc_mask_disable_reg(struct irq_data *d);
@@ -742,6 +764,14 @@ int irq_setup_alt_chip(struct irq_data *
 void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk,
 			     unsigned int clr, unsigned int set);
 
+struct irq_chip_generic *irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq);
+int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip,
+				   int num_ct, const char *name,
+				   irq_flow_handler_t handler,
+				   unsigned int clr, unsigned int set,
+				   enum irq_gc_flags flags);
+
+
 static inline struct irq_chip_type *irq_data_get_chip_type(struct irq_data *d)
 {
 	return container_of(d->chip, struct irq_chip_type, chip);
Index: linux-2.6/include/linux/irqdomain.h
===================================================================
--- linux-2.6.orig/include/linux/irqdomain.h
+++ linux-2.6/include/linux/irqdomain.h
@@ -66,6 +66,10 @@ struct irq_domain_ops {
 		     unsigned long *out_hwirq, unsigned int *out_type);
 };
 
+extern struct irq_domain_ops irq_generic_chip_ops;
+
+struct irq_domain_chip_generic;
+
 /**
  * struct irq_domain - Hardware interrupt number translation object
  * @link: Element in global irq_domain list.
@@ -109,8 +113,16 @@ struct irq_domain {
 
 	/* Optional device node pointer */
 	struct device_node *of_node;
+	/* Optional pointer to generic interrupt chips */
+	struct irq_domain_chip_generic *gc;
 };
 
+#define IRQ_DOMAIN_MAP_LEGACY 0 /* driver allocated fixed range of irqs.
+				 * ie. legacy 8259, gets irqs 1..15 */
+#define IRQ_DOMAIN_MAP_NOMAP 1 /* no fast reverse mapping */
+#define IRQ_DOMAIN_MAP_LINEAR 2 /* linear map of interrupts */
+#define IRQ_DOMAIN_MAP_TREE 3 /* radix tree */
+
 #ifdef CONFIG_IRQ_DOMAIN
 struct irq_domain *irq_domain_add_simple(struct device_node *of_node,
 					 unsigned int size,
Index: linux-2.6/kernel/irq/generic-chip.c
===================================================================
--- linux-2.6.orig/kernel/irq/generic-chip.c
+++ linux-2.6/kernel/irq/generic-chip.c
@@ -7,6 +7,7 @@
 #include <linux/irq.h>
 #include <linux/slab.h>
 #include <linux/export.h>
+#include <linux/irqdomain.h>
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
 #include <linux/syscore_ops.h>
@@ -226,6 +227,84 @@ irq_alloc_generic_chip(const char *name,
 }
 EXPORT_SYMBOL_GPL(irq_alloc_generic_chip);
 
+/**
+ * irq_alloc_domain_generic_chip - Allocate generic chips for an irq domain
+ * @d:			irq domain for which to allocate chips
+ * @irqs_per_chip:	Number of interrupts each chip handles
+ * @num_ct:		Number of irq_chip_type instances associated with this
+ * @name:		Name of the irq chip
+ * @handler:		Default flow handler associated with these chips
+ * @clr:		IRQ_* bits to clear in the mapping function
+ * @set:		IRQ_* bits to set in the mapping function
+ */
+int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip,
+				   int num_ct, const char *name,
+				   irq_flow_handler_t handler,
+				   unsigned int clr, unsigned int set,
+				   enum irq_gc_flags gcflags)
+{
+	struct irq_domain_chip_generic *dgc;
+	struct irq_chip_generic *gc;
+	int numchips, sz, i;
+	unsigned long flags;
+
+	if (d->gc)
+		return -EBUSY;
+
+	if (d->revmap_type != IRQ_DOMAIN_MAP_LINEAR)
+		return -EINVAL;
+
+	numchips = d->revmap_data.linear.size / irqs_per_chip;
+	if (!numchips)
+		return -EINVAL;
+
+	sz = sizeof(*gc) + num_ct * sizeof(struct irq_chip_type);
+	sz *= numchips;
+	sz += sizeof(*dgc);
+
+	dgc = kzalloc(sz, GFP_KERNEL);
+	if (!dgc)
+		return -ENOMEM;
+	dgc->irqs_per_chip = irqs_per_chip;
+	dgc->num_chips = numchips;
+	dgc->irq_flags_to_set = set;
+	dgc->irq_flags_to_clear = clr;
+	dgc->gc_flags = gcflags;
+	gc = dgc->gc;
+
+	for (i = 0; i < numchips; i++, gc++) {
+		irq_init_generic_chip(gc, name, num_ct, i * irqs_per_chip,
+				      NULL, handler);
+		gc->domain = d;
+		raw_spin_lock_irqsave(&gc_lock, flags);
+		list_add_tail(&gc->list, &gc_list);
+		raw_spin_unlock_irqrestore(&gc_lock, flags);
+	}
+	d->gc = dgc;
+	return 0;
+}
+EXPORT_SYMBOL_GPL(irq_alloc_domain_generic_chips);
+
+/**
+ * irq_get_domain_generic_chip - Get a pointer to the generic chip of a hw_irq
+ * @d:			irq domain pointer
+ * @hw_irq:		Hardware interrupt number
+ */
+struct irq_chip_generic *
+irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq)
+{
+	struct irq_domain_chip_generic *dgc = d->gc;
+	int idx;
+
+	if (!dgc)
+		return NULL;
+	idx = hw_irq / dgc->irqs_per_chip;
+	if (idx >= dgc->num_chips)
+		return NULL;
+	return &dgc->gc[idx];
+}
+EXPORT_SYMBOL_GPL(irq_get_domain_generic_chip);
+
 /*
  * Separate lockdep class for interrupt chip which can nest irq_desc
  * lock.
@@ -233,6 +312,64 @@ EXPORT_SYMBOL_GPL(irq_alloc_generic_chip
 static struct lock_class_key irq_nested_lock_class;
 
 /**
+ * irq_map_generic_chip - Map a generic chip for an irq domain
+ */
+static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
+{
+	struct irq_data *data = irq_get_irq_data(virq);
+	struct irq_domain_chip_generic *dgc = d->gc;
+	struct irq_chip_generic *gc;
+	struct irq_chip_type *ct;
+	struct irq_chip *chip;
+	unsigned long flags;
+	int idx;
+
+	if (!d->gc)
+		return -ENODEV;
+
+	idx = hw_irq / dgc->irqs_per_chip;
+	if (idx >= dgc->num_chips)
+		return -EINVAL;
+	gc = &dgc->gc[idx];
+
+	idx = hw_irq % dgc->irqs_per_chip;
+
+	if (test_bit(idx, &gc->installed))
+		return -EBUSY;
+
+	set_bit(idx, &gc->installed);
+	ct = gc->chip_types;
+	chip = &ct->chip;
+
+	/* Init mask cache ? */
+	if (dgc->gc_flags & IRQ_GC_INIT_MASK_CACHE) {
+		raw_spin_lock_irqsave(&gc->lock, flags);
+		gc->mask_cache = irq_reg_readl(gc->reg_base + ct->regs.mask);
+		raw_spin_unlock_irqrestore(&gc->lock, flags);
+	}
+
+	if (dgc->gc_flags & IRQ_GC_INIT_NESTED_LOCK)
+		irq_set_lockdep_class(virq, &irq_nested_lock_class);
+
+	if (chip->irq_calc_mask)
+		chip->irq_calc_mask(data);
+	else
+		data->mask = 1 << idx;
+
+	irq_set_chip_and_handler(virq, chip, ct->handler);
+	irq_set_chip_data(virq, gc);
+	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
+	return 0;
+}
+
+struct irq_domain_ops irq_generic_chip_ops = {
+	.map = irq_map_generic_chip,
+	.xlate = irq_domain_xlate_onecell,
+};
+EXPORT_SYMBOL_GPL(irq_generic_chip_ops);
+
+/**
  * irq_setup_generic_chip - Setup a range of interrupts with a generic chip
  * @gc:		Generic irq chip holding all data
  * @msk:	Bitmask holding the irqs to initialize relative to gc->irq_base
@@ -345,6 +482,24 @@ void irq_remove_generic_chip(struct irq_
 }
 EXPORT_SYMBOL_GPL(irq_remove_generic_chip);
 
+static struct irq_data *irq_gc_get_irq_data(struct irq_chip_generic *gc)
+{
+	unsigned int virq;
+
+	if (!gc->domain)
+		return irq_get_irq_data(gc->irq_base);
+
+	/*
+	 * We don't know which of the irqs has been actually
+	 * installed. Use the first one.
+	 */
+	if (!gc->installed)
+		return NULL;
+
+	virq = irq_find_mapping(gc->domain, gc->irq_base + __ffs(gc->installed));
+	return virq ? irq_get_irq_data(virq) : NULL;
+}
+
 #ifdef CONFIG_PM
 static int irq_gc_suspend(void)
 {
@@ -353,8 +508,12 @@ static int irq_gc_suspend(void)
 	list_for_each_entry(gc, &gc_list, list) {
 		struct irq_chip_type *ct = gc->chip_types;
 
-		if (ct->chip.irq_suspend)
-			ct->chip.irq_suspend(irq_get_irq_data(gc->irq_base));
+		if (ct->chip.irq_suspend) {
+			struct irq_data *data = irq_gc_get_irq_data(gc);
+
+			if (data)
+				ct->chip.irq_suspend(data);
+		}
 	}
 	return 0;
 }
@@ -366,8 +525,12 @@ static void irq_gc_resume(void)
 	list_for_each_entry(gc, &gc_list, list) {
 		struct irq_chip_type *ct = gc->chip_types;
 
-		if (ct->chip.irq_resume)
-			ct->chip.irq_resume(irq_get_irq_data(gc->irq_base));
+		if (ct->chip.irq_resume) {
+			struct irq_data *data = irq_gc_get_irq_data(gc);
+
+			if (data)
+				ct->chip.irq_resume(data);
+		}
 	}
 }
 #else
@@ -382,8 +545,12 @@ static void irq_gc_shutdown(void)
 	list_for_each_entry(gc, &gc_list, list) {
 		struct irq_chip_type *ct = gc->chip_types;
 
-		if (ct->chip.irq_pm_shutdown)
-			ct->chip.irq_pm_shutdown(irq_get_irq_data(gc->irq_base));
+		if (ct->chip.irq_pm_shutdown) {
+			struct irq_data *data = irq_gc_get_irq_data(gc);
+
+			if (data)
+				ct->chip.irq_pm_shutdown(data);
+		}
 	}
 }
 
Index: linux-2.6/kernel/irq/irqdomain.c
===================================================================
--- linux-2.6.orig/kernel/irq/irqdomain.c
+++ linux-2.6/kernel/irq/irqdomain.c
@@ -16,12 +16,6 @@
 #include <linux/smp.h>
 #include <linux/fs.h>
 
-#define IRQ_DOMAIN_MAP_LEGACY 0 /* driver allocated fixed range of irqs.
-				 * ie. legacy 8259, gets irqs 1..15 */
-#define IRQ_DOMAIN_MAP_NOMAP 1 /* no fast reverse mapping */
-#define IRQ_DOMAIN_MAP_LINEAR 2 /* linear map of interrupts */
-#define IRQ_DOMAIN_MAP_TREE 3 /* radix tree */
-
 static LIST_HEAD(irq_domain_list);
 static DEFINE_MUTEX(irq_domain_mutex);
 



  parent reply	other threads:[~2013-05-03 21:50 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-02 18:25 [PATCH] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
2013-05-02 21:34 ` Thomas Gleixner
2013-05-02 21:56   ` Sebastian Hesselbarth
2013-05-02 22:09     ` Arnd Bergmann
2013-05-02 22:37       ` Sebastian Hesselbarth
     [not found]         ` <5182EAA0.9070208-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-04 18:12           ` Jason Cooper
     [not found] ` <1367519104-19677-1-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-02 18:33   ` Sebastian Hesselbarth
2013-05-02 18:45     ` Russell King - ARM Linux
2013-05-02 18:54       ` Sebastian Hesselbarth
2013-05-02 18:56         ` Russell King - ARM Linux
2013-05-02 19:04           ` Sebastian Hesselbarth
2013-05-02 18:53   ` Jason Gunthorpe
2013-05-02 19:05     ` Sebastian Hesselbarth
2013-05-02 19:35       ` Jason Gunthorpe
2013-05-02 19:48         ` Sebastian Hesselbarth
2013-05-02 20:02           ` Andrew Lunn
2013-05-02 20:08             ` Gregory CLEMENT
     [not found]           ` <5182C322.3030304-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-04 17:58             ` Jason Cooper
2013-05-02 19:11     ` Arnd Bergmann
2013-05-02 19:34       ` Sebastian Hesselbarth
2013-05-02 19:37         ` Jason Gunthorpe
2013-05-02 19:39         ` Sebastian Hesselbarth
2013-05-02 19:22   ` Jason Cooper
2013-05-02 23:48   ` [PATCH v2 0/5] ARM: orion: add orion irqchip driver Sebastian Hesselbarth
     [not found]     ` <1367538519-23940-1-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-02 23:48       ` [PATCH v2 1/5] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
2013-05-03 12:55         ` Russell King - ARM Linux
2013-05-03 13:13           ` Sebastian Hesselbarth
2013-05-03 14:09             ` Thomas Gleixner
2013-05-03 21:50               ` [RFC patch 0/8] genirq: Support for irq domains in generic irq chip Thomas Gleixner
2013-05-03 21:50                 ` [RFC patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
     [not found]                   ` <20130503214629.397359626-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2013-05-27 13:38                     ` Grant Likely
2013-05-03 21:50                 ` [RFC patch 2/8] genirq: generic chip: Add support for per chip type mask cache Thomas Gleixner
2013-05-03 21:50                 ` [RFC patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-03 21:50                 ` [RFC patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-03 22:24                   ` Russell King - ARM Linux
2013-05-03 22:39                     ` Thomas Gleixner
2013-05-03 21:50                 ` [RFC patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-03 21:50                 ` [RFC patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-27 13:45                   ` Grant Likely
2013-05-03 21:50                 ` Thomas Gleixner [this message]
2013-05-03 22:23                   ` [RFC patch 7/8] genirq: generic chip: Add linear irq domain support Russell King - ARM Linux
2013-05-03 22:38                     ` Thomas Gleixner
2013-05-04  2:30                   ` Sebastian Hesselbarth
2013-05-04  8:04                     ` Thomas Gleixner
2013-05-06 12:32                   ` [RFC patch 7/8] fixup 1/2: " Sebastian Hesselbarth
2013-05-06 12:32                     ` [RFC patch 7/8] fixup 2/2: " Sebastian Hesselbarth
2013-05-06 13:31                       ` Thomas Gleixner
2013-05-06 13:25                     ` [RFC patch 7/8] fixup 1/2: " Thomas Gleixner
2013-05-03 21:50                 ` [RFC patch 8/8] irqchip: sun4i: Convert to generic irq chip Thomas Gleixner
2013-05-04  2:37                   ` Sebastian Hesselbarth
2013-05-06  9:48                 ` [RFC patch 0/8] genirq: Support for irq domains in " Uwe Kleine-König
     [not found]                 ` <20130503212258.385818955-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2013-05-06 14:30                   ` [patch 0/8] genirq: Support for irq domains in generic irq chip - V2 Thomas Gleixner
2013-05-06 14:30                     ` [patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
2013-05-06 14:30                     ` [patch 2/8] genirq: generic chip: Add support for per chip type mask cache Thomas Gleixner
2013-05-06 14:30                     ` [patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-06 14:30                     ` [patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-06 14:30                     ` [patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-06 14:30                     ` [patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-06 14:30                     ` [patch 7/8] genirq: generic chip: Add linear irq domain support Thomas Gleixner
2013-05-29  2:22                       ` Grant Likely
2013-05-29  8:23                         ` Thomas Gleixner
2013-05-06 14:30                     ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Thomas Gleixner
2013-05-06 15:18                       ` Rob Herring
2013-05-12 14:05                       ` [PATCH] irq-sun4i: Fix trivial build errors Maxime Ripard
2013-05-12 14:08                       ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Maxime Ripard
2013-05-12 14:14                         ` Maxime Ripard
2013-05-02 23:48       ` [PATCH v2 2/5] ARM: dove: add DT parsing for legacy mv643xx_eth Sebastian Hesselbarth
     [not found]         ` <1367538519-23940-3-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-03  5:06           ` Andrew Lunn
2013-05-03  9:58             ` Sebastian Hesselbarth
     [not found]             ` <20130503050632.GC24965-g2DYL2Zd6BY@public.gmane.org>
2013-05-04 18:29               ` Jason Cooper
     [not found]                 ` <20130504182935.GO31290-u4khhh1J0LxI1Ri9qeTfzeTW4wlIGRCZ@public.gmane.org>
2013-05-04 19:37                   ` Florian Fainelli
2013-05-02 23:48       ` [PATCH v2 3/5] ARM: dove: add DT parsing for legacy timer Sebastian Hesselbarth
2013-05-02 23:48     ` [PATCH v2 4/5] ARM: dove: move DT boards to orion irqchip driver Sebastian Hesselbarth
2013-05-02 23:48     ` [PATCH v2 5/5] ARM: dove: add DT nodes for irqchip conversion Sebastian Hesselbarth

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