From: "Heiko Stübner" <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Cc: Mike Turquette
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Seungwon Jeon <tgih.jun-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
Jaehoon Chung
<jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
Grant Likely
<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org>,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Subject: [PATCH v2 4/8] mmc: dw_mmc-pltfm: add Rockchip variant
Date: Thu, 6 Jun 2013 21:11:06 +0200 [thread overview]
Message-ID: <201306062111.06694.heiko@sntech.de> (raw)
In-Reply-To: <201306062107.58875.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Cortex-A9 SoCs from Rockchip use a slightly modified variant of dw_mmc
controllers that seems to require the SDMMC_CMD_USE_HOLD_REG bit to
always be set.
There also seem to be no other modifications (additional register etc)
present, so to keep the footprint low, add this small variant to the
pltfm driver.
Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
---
drivers/mmc/host/dw_mmc-pltfm.c | 48 +++++++++++++++++++++++++++-----------
1 files changed, 34 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index 0048da8..7d041b5 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -24,6 +24,16 @@
#include "dw_mmc.h"
+
+static void dw_mci_rockchip_prepare_command(struct dw_mci *host, u32 *cmdr)
+{
+ *cmdr |= SDMMC_CMD_USE_HOLD_REG;
+}
+
+static const struct dw_mci_drv_data rockchip_drv_data = {
+ .prepare_command = dw_mci_rockchip_prepare_command,
+};
+
int dw_mci_pltfm_register(struct platform_device *pdev,
const struct dw_mci_drv_data *drv_data)
{
@@ -63,20 +73,6 @@ int dw_mci_pltfm_register(struct platform_device *pdev,
}
EXPORT_SYMBOL_GPL(dw_mci_pltfm_register);
-static int dw_mci_pltfm_probe(struct platform_device *pdev)
-{
- return dw_mci_pltfm_register(pdev, NULL);
-}
-
-int dw_mci_pltfm_remove(struct platform_device *pdev)
-{
- struct dw_mci *host = platform_get_drvdata(pdev);
-
- dw_mci_remove(host);
- return 0;
-}
-EXPORT_SYMBOL_GPL(dw_mci_pltfm_remove);
-
#ifdef CONFIG_PM_SLEEP
/*
* TODO: we should probably disable the clock to the card in the suspend path.
@@ -114,10 +110,34 @@ EXPORT_SYMBOL_GPL(dw_mci_pltfm_pmops);
static const struct of_device_id dw_mci_pltfm_match[] = {
{ .compatible = "snps,dw-mshc", },
+ { .compatible = "rockchip,cortex-a9-dw-mshc",
+ .data = &rockchip_drv_data },
{},
};
MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);
+static int dw_mci_pltfm_probe(struct platform_device *pdev)
+{
+ const struct dw_mci_drv_data *drv_data = NULL;
+ const struct of_device_id *match;
+
+ if (pdev->dev.of_node) {
+ match = of_match_node(dw_mci_pltfm_match, pdev->dev.of_node);
+ drv_data = match->data;
+ }
+
+ return dw_mci_pltfm_register(pdev, drv_data);
+}
+
+int dw_mci_pltfm_remove(struct platform_device *pdev)
+{
+ struct dw_mci *host = platform_get_drvdata(pdev);
+
+ dw_mci_remove(host);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(dw_mci_pltfm_remove);
+
static struct platform_driver dw_mci_pltfm_driver = {
.probe = dw_mci_pltfm_probe,
.remove = dw_mci_pltfm_remove,
--
1.7.2.3
next prev parent reply other threads:[~2013-06-06 19:11 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-06 19:07 [PATCH v2 0/8] arm: add basic support for Rockchip Cortex-A9 SoCs Heiko Stübner
2013-06-06 19:08 ` [PATCH v2 1/8] clk: flag to use upper half of the register as change indicator Heiko Stübner
2013-06-07 11:46 ` Linus Walleij
2013-06-07 12:27 ` Heiko Stübner
2013-06-07 15:21 ` Haojian Zhuang
[not found] ` <201306062107.58875.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2013-06-06 19:09 ` [PATCH v2 2/8] clk: divider: add flag to limit possible dividers to even numbers Heiko Stübner
2013-06-06 19:10 ` [PATCH v2 3/8] mmc: dw_mmc-pltfm: remove static from dw_mci_pltfm_remove Heiko Stübner
2013-06-06 19:11 ` Heiko Stübner [this message]
2013-06-06 20:35 ` [PATCH v2 4/8] mmc: dw_mmc-pltfm: add Rockchip variant Andy Shevchenko
2013-06-06 19:11 ` [PATCH v2 5/8] pinctrl: add pinctrl driver for Rockchip SoCs Heiko Stübner
2013-06-07 12:53 ` Linus Walleij
[not found] ` <CACRpkdZ97poa5HOP4baDnsdq5OjwO5S2=+pPH9ey84r=ZW43nA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-06-07 23:13 ` Heiko Stübner
2013-06-07 23:53 ` Heiko Stübner
2013-06-06 19:12 ` [PATCH v2 6/8] clk: add basic Rockchip rk3066a clock support Heiko Stübner
2013-06-06 19:12 ` [PATCH v2 7/8] arm: add debug uarts for rockchip rk29xx and rk3xxx series Heiko Stübner
2013-06-06 19:13 ` [PATCH v2 8/8] arm: add basic support for Rockchip RK3066a boards Heiko Stübner
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