From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko =?iso-8859-1?q?St=FCbner?= Subject: Re: [PATCH v2 1/8] clk: flag to use upper half of the register as change indicator Date: Fri, 7 Jun 2013 14:27:20 +0200 Message-ID: <201306071427.20512.heiko@sntech.de> References: <201306062107.58875.heiko@sntech.de> <201306062108.38587.heiko@sntech.de> Mime-Version: 1.0 Content-Type: Text/Plain; charset=iso-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: Sender: linux-mmc-owner@vger.kernel.org To: Linus Walleij , Haojian Zhuang Cc: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Mike Turquette , Seungwon Jeon , Jaehoon Chung , Chris Ball , "linux-mmc@vger.kernel.org" , Grant Likely , Rob Herring , "devicetree-discuss@lists.ozlabs.org" , Russell King , Arnd Bergmann , Olof Johansson , Thomas Petazzoni List-Id: devicetree@vger.kernel.org Am Freitag, 7. Juni 2013, 13:46:32 schrieb Linus Walleij: > On Thu, Jun 6, 2013 at 9:08 PM, Heiko St=FCbner wro= te: > > There exist platforms, namely at least all Rockchip Cortex-A9 based= ones, > > that don't use the paradigm of reading-changing-writing the registe= r > > contents, but instead only write the changes to the register with a= mask > > that indicates the changed bits. > >=20 > > This patch adds flags and code to support the case where the lower = 16 bit > > of hold the information and the upper 16 bit are used as mask to > > indicate the written changes. > >=20 > > As hardware-specific flags should not be added to the common clk fl= ags, > > the flags are added to gate, mux and divider clocks individually. > >=20 > > Signed-off-by: Heiko Stuebner >=20 > (...) >=20 > > + if ((clk_gate_flags & CLK_GATE_MASK_UPPER_HALF) && bit_idx = > 15) > > { + pr_err("%s: bit_idx %d invalid\n", __func__, bit_= idx); > > + return ERR_PTR(-EINVAL); > > + } >=20 > Now this looks *EXTREMELY* familiar to a patch just sent by Haojian > for HiSilicon. >=20 > "[PATCH v2 3/6] clk: divider: add CLK_DIVIDER_HIWORD_MASK flag" > http://marc.info/?l=3Dlinux-arm-kernel&m=3D137035873916777&w=3D2 >=20 > What kind of coincidence is this? Are Rockchip and HiSilicon using > the same silicon IP or are they of a common origin? (It is a small > world after all.) Now this is really interesting :-) and the handling really seems to fol= low the=20 same pattern. > I think you two guys need to read each others patch sets closely > here. I'd like Haojian to look at Heiko's patches and Heiko to look > at Haojian's patches, just to make sure you're not actually writing > two drivers for the same hardware in the end. I'll take a look Heiko