From: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
To: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Cc: Olav Haugan <ohaugan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Andreas Herrmann
<andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 8/9] iommu: add support for ARM Ltd. System MMU architecture
Date: Thu, 20 Jun 2013 23:26:46 +0200 [thread overview]
Message-ID: <20130620212646.GG11309@8bytes.org> (raw)
In-Reply-To: <1370889285-22799-9-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
Hi Will,
On Mon, Jun 10, 2013 at 07:34:44PM +0100, Will Deacon wrote:
> This patch adds support for SMMUs implementing the ARM System MMU
> architecture versions 1 or 2. Both arm and arm64 are supported, although
> the v7s descriptor format is not used.
>
> Cc: Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Cc: Andreas Herrmann <andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
> Cc: Olav Haugan <ohaugan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> Cc: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
A few general questions:
How have you tested this code? Has it been run on real hardware? What
were the results?
The code looks good and clean in general, minus a few places mentioned
below were I have questions and/or suggestions:
> +static struct arm_smmu_device *find_parent_smmu(struct arm_smmu_device *smmu)
> +{
> + struct arm_smmu_device *parent, *tmp;
> +
> + if (!smmu->parent_of_node)
> + return NULL;
> +
> + list_for_each_entry_safe(parent, tmp, &arm_smmu_devices, list)
> + if (parent->dev->of_node == smmu->parent_of_node)
> + return parent;
Why do you need the _safe variant here? You are not changing the list in
this loop so you should be fine with list_for_each_entry().
> +
> + dev_warn(smmu->dev,
> + "Failed to find SMMU parent despite parent in DT\n");
> + return NULL;
> +}
> +/* Wait for any pending TLB invalidations to complete */
> +static void arm_smmu_tlb_sync(struct arm_smmu_device *smmu)
> +{
> + void __iomem *gr0_base = ARM_SMMU_GR0(smmu);
> +
> + writel_relaxed(0, gr0_base + ARM_SMMU_GR0_sTLBGSYNC);
> + while (readl_relaxed(gr0_base + ARM_SMMU_GR0_sTLBGSTATUS)
> + & sTLBGSTATUS_GSACTIVE)
> + cpu_relax();
Other IOMMU drivers have a timeout for this loop and report an error
when the state does not change. I think this makes sense here too so
that the kernel will not just stop spinning in that loop if something
goes wrong but prints an error instead.
> +}
> +static void arm_smmu_flush_pgtable(struct arm_smmu_device *smmu, void *addr,
> + size_t size)
> +{
> + unsigned long offset = (unsigned long)addr & ~PAGE_MASK;
> +
> + /*
> + * If the SMMU can't walk tables in the CPU caches, treat them
> + * like non-coherent DMA...
> + */
> + if (!(smmu->features & ARM_SMMU_FEAT_COHERENT_WALK))
> + dma_map_page(smmu->dev, virt_to_page(addr), offset, size,
> + DMA_TO_DEVICE);
Why can you call into DMA-API here? A DMA-API implementation may call
back into this IOMMU driver, no? So this looks a little bit like a
layering violation.
> +}
> +static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova,
> + phys_addr_t paddr, size_t size, int flags)
> +{
> + struct arm_smmu_domain *smmu_domain = domain->priv;
> + struct arm_smmu_device *smmu = smmu_domain->leaf_smmu;
> +
> + if (!smmu_domain || !smmu)
> + return -ENODEV;
> +
> + /*
> + * Check for silent address truncation up the SMMU chain.
> + */
> + do {
> + phys_addr_t output_mask = (1ULL << smmu->s2_output_size) - 1;
> + if ((phys_addr_t)iova & ~output_mask)
> + return -ERANGE;
> + } while ((smmu = find_parent_smmu(smmu)));
This looks a bit too expensive to have in the map path. How about saving
something like an effective_output_mask (or output_size) which contains
the logical OR of every mask up the path? This would make this check a
lot cheaper.
> +
> + return arm_smmu_create_mapping(smmu_domain, iova, paddr, size, flags);
> +}
> +
> +static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
> + size_t size)
> +{
> + int ret;
> + struct arm_smmu_domain *smmu_domain = domain->priv;
> + struct arm_smmu_cfg *root_cfg = &smmu_domain->root_cfg;
> + struct arm_smmu_device *smmu = root_cfg->smmu;
> + void __iomem *gr0_base = ARM_SMMU_GR0(smmu);
> +
> + ret = arm_smmu_create_mapping(smmu_domain, iova, 0, size, 0);
Since this function does also unmapping, how about renaming it to
arm_smmu_handle_mapping(). The 'create' part in there is misleading.
> + writel_relaxed(root_cfg->vmid, gr0_base + ARM_SMMU_GR0_TLBIVMID);
> + arm_smmu_tlb_sync(smmu);
> + return ret ? ret : size;
> +}
> +static int arm_smmu_add_device(struct device *dev)
> +{
> + struct arm_smmu_device *child, *parent, *smmu;
> + struct arm_smmu_device *tmp[2];
> + struct arm_smmu_master *master = NULL;
> +
> + list_for_each_entry_safe(parent, tmp[0], &arm_smmu_devices, list) {
Again, why do you use the _safe variant, you do not seem to change the
lists traversed here.
> + smmu = parent;
> +
> + /* Try to find a child of the current SMMU. */
> + list_for_each_entry_safe(child, tmp[1], &arm_smmu_devices, list) {
> + if (child->parent_of_node == parent->dev->of_node) {
> + /* Does the child sit above our master? */
> + master = find_smmu_master(child, dev->of_node);
> + if (master) {
> + smmu = NULL;
> + break;
> + }
> + }
> + }
> +
> + /* We found some children, so keep searching. */
> + if (!smmu) {
> + master = NULL;
> + continue;
> + }
> +
> + master = find_smmu_master(smmu, dev->of_node);
> + if (master)
> + break;
> + }
> +
> + if (!master)
> + return -ENODEV;
> +
> + dev->archdata.iommu = smmu;
> + return 0;
> +}
next prev parent reply other threads:[~2013-06-20 21:26 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-10 18:34 [PATCH 0/9] Add support for ARM SMMU architectures 1 and 2 Will Deacon
[not found] ` <1370889285-22799-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-10 18:34 ` [PATCH 1/9] dma: pl330: rip out broken, redundant ID probing Will Deacon
2013-06-11 4:40 ` Jassi Brar
[not found] ` <CAJe_Zhc1UoTC4q4oaW=dzyi_10Q7EoezoT=G8_v+yCmBxV75+A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-06-11 8:45 ` Will Deacon
[not found] ` <1370889285-22799-2-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-11 4:37 ` Jassi Brar
2013-06-11 22:31 ` Grant Likely
2013-06-12 5:31 ` Vinod Koul
2013-06-10 18:34 ` [PATCH 2/9] dma: pl330: use dma_addr_t for describing bus addresses Will Deacon
[not found] ` <1370889285-22799-3-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-11 4:37 ` Jassi Brar
[not found] ` <CAJe_ZheKMVQgq42Vx5N1TXXdgFJ2sp50ixU30A7beXhmSVHnZQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-06-12 5:31 ` Vinod Koul
2013-06-11 22:32 ` Grant Likely
2013-06-11 4:39 ` Jassi Brar
2013-06-10 18:34 ` [PATCH 3/9] ARM: dma-mapping: convert DMA direction into IOMMU protection attributes Will Deacon
2013-06-19 8:37 ` Marek Szyprowski
[not found] ` <51C16DAF.1090205-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2013-06-19 8:52 ` Will Deacon
[not found] ` <20130619085202.GC20351-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-19 8:57 ` Marek Szyprowski
[not found] ` <1370889285-22799-4-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-25 10:12 ` Hiroshi Doyu
[not found] ` <20130625131215.d3cea2a5668a3d41dbbeb064-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-25 11:37 ` Will Deacon
[not found] ` <20130625113714.GF31838-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-25 11:52 ` Hiroshi Doyu
[not found] ` <20130625.145226.1632119404634300971.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-25 12:34 ` Will Deacon
2013-06-10 18:34 ` [PATCH 4/9] ARM: dma-mapping: NULLify dev->archdata.mapping pointer on detach Will Deacon
[not found] ` <1370889285-22799-5-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-11 5:34 ` Hiroshi Doyu
[not found] ` <20130611.083455.1500863288897785600.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-11 8:50 ` Will Deacon
[not found] ` <20130611085015.GC24729-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-11 9:39 ` Hiroshi Doyu
[not found] ` <20130611123933.4d278ff4e056f395788ad060-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-19 8:59 ` Marek Szyprowski
2013-06-10 18:34 ` [PATCH 5/9] arm64: pgtable: use pte_index instead of __pte_index Will Deacon
2013-06-10 18:34 ` [PATCH 6/9] arm64: device: add iommu pointer to device archdata Will Deacon
2013-06-10 18:34 ` [PATCH 7/9] documentation: iommu: add description of ARM System MMU binding Will Deacon
[not found] ` <1370889285-22799-8-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-12 8:44 ` Grant Likely
2013-06-20 20:08 ` Joerg Roedel
[not found] ` <20130620200845.GF11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-06-21 9:57 ` Will Deacon
[not found] ` <20130621095729.GA7766-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-21 13:55 ` Joerg Roedel
[not found] ` <20130621135507.GI11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-06-21 16:41 ` Will Deacon
2013-06-25 19:18 ` Stuart Yoder
[not found] ` <CALRxmdBxFWoRKv+bUu8VEwNNcAJUej9jM2V8N0rrqrr_Vpe8fQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-06-26 13:39 ` Will Deacon
[not found] ` <20130626133941.GD7417-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-26 16:19 ` Stuart Yoder
[not found] ` <CALRxmdCycFK2wW=C4aU79mudSaT+2vU8nzXxepdstubg+YSdQg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-06-26 17:42 ` Will Deacon
[not found] ` <20130626174231.GH10333-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-27 18:22 ` Stuart Yoder
[not found] ` <CALRxmdD5fyp06xW+z=rWagJc_bcJmpr1H9Zbdf=xbg9cCzvVfw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-06-28 9:06 ` Will Deacon
[not found] ` <20130628090635.GB29002-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-28 16:03 ` Stuart Yoder
2013-06-10 18:34 ` [PATCH 8/9] iommu: add support for ARM Ltd. System MMU architecture Will Deacon
[not found] ` <1370889285-22799-9-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-20 21:26 ` Joerg Roedel [this message]
[not found] ` <20130620212646.GG11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-06-21 10:23 ` Will Deacon
[not found] ` <20130621102318.GB7766-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-21 14:13 ` Joerg Roedel
2013-06-21 15:00 ` Will Deacon
[not found] ` <20130621150006.GG7766-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-06-21 15:30 ` Joerg Roedel
[not found] ` <20130621153044.GL11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-06-21 16:40 ` Will Deacon
2013-06-10 18:34 ` [PATCH 9/9] MAINTAINERS: add entry for ARM system MMU driver Will Deacon
[not found] ` <1370889285-22799-10-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2013-06-12 8:45 ` Grant Likely
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