* [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer
[not found] ` <1371514129-22801-1-git-send-email-dinguyen-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org>
@ 2013-06-18 0:08 ` dinguyen-EIB2kfCEclfQT0dZR+AlfA
2013-06-18 13:11 ` Arnd Bergmann
0 siblings, 1 reply; 6+ messages in thread
From: dinguyen-EIB2kfCEclfQT0dZR+AlfA @ 2013-06-18 0:08 UTC (permalink / raw)
To: dinh.linux-Re5JQEeQqe8AvxtiuMwx3w
Cc: Pavel Machek, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
Rob Herring, John Stultz,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Grant Likely,
Jamie Iles
From: Dinh Nguyen <dinguyen-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org>
"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
DW APB timer, just fed by different clocks.
Signed-off-by: Dinh Nguyen <dinguyen-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org>
CC: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
Cc: Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
CC: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>
CC: Jamie Iles <jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
Cc: John Stultz <john.stultz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Pavel Machek <pavel-ynQEQJNshbs@public.gmane.org>
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
---
Documentation/devicetree/bindings/rtc/dw-apb.txt | 21 +++------------------
arch/arm/boot/dts/socfpga.dtsi | 12 ++++++++----
2 files changed, 11 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt
index eb2327b..0a1020e 100644
--- a/Documentation/devicetree/bindings/rtc/dw-apb.txt
+++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
@@ -1,7 +1,7 @@
* Designware APB timer
Required properties:
-- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
+- compatible: "snps,dw-apb-timer"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: IRQ line for the timer.
@@ -20,23 +20,8 @@ systems may use one.
Example:
-
- timer1: timer@ffc09000 {
- compatible = "snps,dw-apb-timer-sp";
- interrupts = <0 168 4>;
- clock-frequency = <200000000>;
- reg = <0xffc09000 0x1000>;
- };
-
- timer2: timer@ffd00000 {
- compatible = "snps,dw-apb-timer-osc";
- interrupts = <0 169 4>;
- clock-frequency = <200000000>;
- reg = <0xffd00000 0x1000>;
- };
-
- timer3: timer@ffe00000 {
- compatible = "snps,dw-apb-timer-osc";
+ timer1: timer@ffe00000 {
+ compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffe00000 0x1000>;
clocks = <&timer_clk>, <&timer_pclk>;
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index bee62a2..ede33ae 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -476,27 +476,31 @@
};
timer0: timer0@ffc08000 {
- compatible = "snps,dw-apb-timer-sp";
+ compatible = "snps,dw-apb-timer";
interrupts = <0 167 4>;
reg = <0xffc08000 0x1000>;
+ clocks = <&osc>;
};
timer1: timer1@ffc09000 {
- compatible = "snps,dw-apb-timer-sp";
+ compatible = "snps,dw-apb-timer";
interrupts = <0 168 4>;
reg = <0xffc09000 0x1000>;
+ clocks = <&osc>;
};
timer2: timer2@ffd00000 {
- compatible = "snps,dw-apb-timer-osc";
+ compatible = "snps,dw-apb-timer";
interrupts = <0 169 4>;
reg = <0xffd00000 0x1000>;
+ clocks = <&l4_sp_clk>;
};
timer3: timer3@ffd01000 {
- compatible = "snps,dw-apb-timer-osc";
+ compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffd01000 0x1000>;
+ clocks = <&l4_sp_clk>;
};
uart0: serial0@ffc02000 {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer
2013-06-18 0:08 ` [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer dinguyen-EIB2kfCEclfQT0dZR+AlfA
@ 2013-06-18 13:11 ` Arnd Bergmann
0 siblings, 0 replies; 6+ messages in thread
From: Arnd Bergmann @ 2013-06-18 13:11 UTC (permalink / raw)
To: dinguyen
Cc: dinh.linux, Pavel Machek, devicetree-discuss, Rob Herring,
Olof Johansson, John Stultz, Grant Likely, Jamie Iles,
linux-arm-kernel
On Tuesday 18 June 2013, dinguyen@altera.com wrote:
> @@ -476,27 +476,31 @@
> };
>
> timer0: timer0@ffc08000 {
> - compatible = "snps,dw-apb-timer-sp";
> + compatible = "snps,dw-apb-timer";
> interrupts = <0 167 4>;
> reg = <0xffc08000 0x1000>;
> + clocks = <&osc>;
> };
>
> timer1: timer1@ffc09000 {
> - compatible = "snps,dw-apb-timer-sp";
> + compatible = "snps,dw-apb-timer";
> interrupts = <0 168 4>;
> reg = <0xffc09000 0x1000>;
> + clocks = <&osc>;
> };
I think it would make sense to fix the device name as well, they should
all be named "timer", not "timer0", so I would add
- timer0: timer0@ffc08000 {
+ timer0: timer@ffc08000 {
for all the timers in the dts file here.
Arnd
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer
@ 2013-07-25 3:43 dinguyen
2013-07-29 18:25 ` Pavel Machek
2013-08-11 21:45 ` Olof Johansson
0 siblings, 2 replies; 6+ messages in thread
From: dinguyen @ 2013-07-25 3:43 UTC (permalink / raw)
To: dinh.linux
Cc: Heiko Stuebner, Arnd Bergmann, Pavel Machek, devicetree-discuss,
Rob Herring, Olof Johansson, John Stultz, linux-arm-kernel,
Grant Likely, Jamie Iles, Dinh Nguyen
From: Dinh Nguyen <dinguyen@altera.com>
"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
DW APB timer, just fed by different clocks.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
CC: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@linaro.org>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-arm-kernel@lists.infradead.org
---
Documentation/devicetree/bindings/rtc/dw-apb.txt | 21 +++----------------
arch/arm/boot/dts/rk3066a.dtsi | 6 +++---
arch/arm/boot/dts/socfpga.dtsi | 24 +++++++++++-----------
arch/arm/boot/dts/socfpga_cyclone5.dts | 8 ++++----
arch/arm/boot/dts/socfpga_vt.dts | 8 ++++----
5 files changed, 26 insertions(+), 41 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt
index eb2327b..0a1020e 100644
--- a/Documentation/devicetree/bindings/rtc/dw-apb.txt
+++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
@@ -1,7 +1,7 @@
* Designware APB timer
Required properties:
-- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
+- compatible: "snps,dw-apb-timer"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: IRQ line for the timer.
@@ -20,23 +20,8 @@ systems may use one.
Example:
-
- timer1: timer@ffc09000 {
- compatible = "snps,dw-apb-timer-sp";
- interrupts = <0 168 4>;
- clock-frequency = <200000000>;
- reg = <0xffc09000 0x1000>;
- };
-
- timer2: timer@ffd00000 {
- compatible = "snps,dw-apb-timer-osc";
- interrupts = <0 169 4>;
- clock-frequency = <200000000>;
- reg = <0xffd00000 0x1000>;
- };
-
- timer3: timer@ffe00000 {
- compatible = "snps,dw-apb-timer-osc";
+ timer1: timer@ffe00000 {
+ compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffe00000 0x1000>;
clocks = <&timer_clk>, <&timer_pclk>;
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 56bfac9..2dff468 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -71,7 +71,7 @@
};
timer@20038000 {
- compatible = "snps,dw-apb-timer-osc";
+ compatible = "snps,dw-apb-timer";
reg = <0x20038000 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates1 0>, <&clk_gates7 7>;
@@ -79,7 +79,7 @@
};
timer@2003a000 {
- compatible = "snps,dw-apb-timer-osc";
+ compatible = "snps,dw-apb-timer";
reg = <0x2003a000 0x100>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates1 1>, <&clk_gates7 8>;
@@ -87,7 +87,7 @@
};
timer@2000e000 {
- compatible = "snps,dw-apb-timer-osc";
+ compatible = "snps,dw-apb-timer";
reg = <0x2000e000 0x100>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates1 2>, <&clk_gates7 9>;
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 93ee655..4e8291b 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -26,10 +26,6 @@
ethernet1 = &gmac1;
serial0 = &uart0;
serial1 = &uart1;
- timer0 = &timer0;
- timer1 = &timer1;
- timer2 = &timer2;
- timer3 = &timer3;
};
cpus {
@@ -486,28 +482,32 @@
interrupts = <1 13 0xf04>;
};
- timer0: timer0@ffc08000 {
- compatible = "snps,dw-apb-timer-sp";
+ timer0: timer@ffc08000 {
+ compatible = "snps,dw-apb-timer";
interrupts = <0 167 4>;
reg = <0xffc08000 0x1000>;
+ clocks = <&osc>;
};
- timer1: timer1@ffc09000 {
- compatible = "snps,dw-apb-timer-sp";
+ timer1: timer@ffc09000 {
+ compatible = "snps,dw-apb-timer";
interrupts = <0 168 4>;
reg = <0xffc09000 0x1000>;
+ clocks = <&osc>;
};
- timer2: timer2@ffd00000 {
- compatible = "snps,dw-apb-timer-osc";
+ timer2: timer@ffd00000 {
+ compatible = "snps,dw-apb-timer";
interrupts = <0 169 4>;
reg = <0xffd00000 0x1000>;
+ clocks = <&l4_sp_clk>;
};
- timer3: timer3@ffd01000 {
- compatible = "snps,dw-apb-timer-osc";
+ timer3: timer@ffd01000 {
+ compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffd01000 0x1000>;
+ clocks = <&l4_sp_clk>;
};
uart0: serial0@ffc02000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
index 102c4d8..54b8483 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
@@ -67,19 +67,19 @@
};
};
- timer0@ffc08000 {
+ timer@ffc08000 {
clock-frequency = <100000000>;
};
- timer1@ffc09000 {
+ timer@ffc09000 {
clock-frequency = <100000000>;
};
- timer2@ffd00000 {
+ timer@ffd00000 {
clock-frequency = <25000000>;
};
- timer3@ffd01000 {
+ timer@ffd01000 {
clock-frequency = <25000000>;
};
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index d93deb0..6a1d8b7 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -58,19 +58,19 @@
};
};
- timer0@ffc08000 {
+ timer@ffc08000 {
clock-frequency = <7000000>;
};
- timer1@ffc09000 {
+ timer@ffc09000 {
clock-frequency = <7000000>;
};
- timer2@ffd00000 {
+ timer@ffd00000 {
clock-frequency = <7000000>;
};
- timer3@ffd01000 {
+ timer@ffd01000 {
clock-frequency = <7000000>;
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer
2013-07-25 3:43 [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer dinguyen
@ 2013-07-29 18:25 ` Pavel Machek
2013-08-11 21:45 ` Olof Johansson
1 sibling, 0 replies; 6+ messages in thread
From: Pavel Machek @ 2013-07-29 18:25 UTC (permalink / raw)
To: dinguyen
Cc: dinh.linux, Heiko Stuebner, Arnd Bergmann, devicetree-discuss,
Rob Herring, Olof Johansson, John Stultz, Grant Likely,
Jamie Iles, linux-arm-kernel
On Wed 2013-07-24 22:43:16, dinguyen@altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
>
> "dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
> DW APB timer, just fed by different clocks.
>
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> CC: Rob Herring <rob.herring@calxeda.com>
> Cc: Grant Likely <grant.likely@linaro.org>
> CC: Arnd Bergmann <arnd@arndb.de>
> Cc: Olof Johansson <olof@lixom.net>
> CC: Jamie Iles <jamie@jamieiles.com>
> Cc: John Stultz <john.stultz@linaro.org>
> Cc: Heiko Stuebner <heiko@sntech.de>
Looks good to me, thanks!
Pavel
Reviewed-by: Pavel Machek <pavel@denx.de>
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer
2013-07-25 3:43 [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer dinguyen
2013-07-29 18:25 ` Pavel Machek
@ 2013-08-11 21:45 ` Olof Johansson
2013-08-12 11:57 ` Pavel Machek
1 sibling, 1 reply; 6+ messages in thread
From: Olof Johansson @ 2013-08-11 21:45 UTC (permalink / raw)
To: dinguyen
Cc: dinh.linux, Heiko Stuebner, Arnd Bergmann, Pavel Machek,
devicetree-discuss, Rob Herring, John Stultz, Grant Likely,
Jamie Iles, linux-arm-kernel
On Wed, Jul 24, 2013 at 10:43:16PM -0500, dinguyen@altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
>
> "dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
> DW APB timer, just fed by different clocks.
>
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> CC: Rob Herring <rob.herring@calxeda.com>
> Cc: Grant Likely <grant.likely@linaro.org>
> CC: Arnd Bergmann <arnd@arndb.de>
> Cc: Olof Johansson <olof@lixom.net>
> CC: Jamie Iles <jamie@jamieiles.com>
> Cc: John Stultz <john.stultz@linaro.org>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: linux-arm-kernel@lists.infradead.org
> ---
> Documentation/devicetree/bindings/rtc/dw-apb.txt | 21 +++----------------
> arch/arm/boot/dts/rk3066a.dtsi | 6 +++---
> arch/arm/boot/dts/socfpga.dtsi | 24 +++++++++++-----------
> arch/arm/boot/dts/socfpga_cyclone5.dts | 8 ++++----
> arch/arm/boot/dts/socfpga_vt.dts | 8 ++++----
> 5 files changed, 26 insertions(+), 41 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt
> index eb2327b..0a1020e 100644
> --- a/Documentation/devicetree/bindings/rtc/dw-apb.txt
> +++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
> @@ -1,7 +1,7 @@
> * Designware APB timer
>
> Required properties:
> -- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
> +- compatible: "snps,dw-apb-timer"
> - reg: physical base address of the controller and length of memory mapped
> region.
> - interrupts: IRQ line for the timer.
Here's a classic example of where we will eventually need to keep the ABI. You
can add a comment that the preferred compatible value is the new one, but the
old ones still need to be handled by the drivers, and shouldn't be removed.
That is, of course, if people are happy with the current binding and want to
keep it instead of revising it before declaring it locked in.
-Olof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer
2013-08-11 21:45 ` Olof Johansson
@ 2013-08-12 11:57 ` Pavel Machek
0 siblings, 0 replies; 6+ messages in thread
From: Pavel Machek @ 2013-08-12 11:57 UTC (permalink / raw)
To: Olof Johansson
Cc: dinh.linux, Heiko Stuebner, Arnd Bergmann, devicetree-discuss,
Rob Herring, John Stultz, linux-arm-kernel, Grant Likely,
Jamie Iles, dinguyen
> > index eb2327b..0a1020e 100644
> > --- a/Documentation/devicetree/bindings/rtc/dw-apb.txt
> > +++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
> > @@ -1,7 +1,7 @@
> > * Designware APB timer
> >
> > Required properties:
> > -- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
> > +- compatible: "snps,dw-apb-timer"
> > - reg: physical base address of the controller and length of memory mapped
> > region.
> > - interrupts: IRQ line for the timer.
>
> Here's a classic example of where we will eventually need to keep the ABI. You
> can add a comment that the preferred compatible value is the new one, but the
> old ones still need to be handled by the drivers, and shouldn't be removed.
>
> That is, of course, if people are happy with the current binding and want to
> keep it instead of revising it before declaring it locked in.
The first -sp / -osc separation was bad idea from the start. It would
be better if we could get rid of it.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-08-12 11:57 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2013-07-25 3:43 [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer dinguyen
2013-07-29 18:25 ` Pavel Machek
2013-08-11 21:45 ` Olof Johansson
2013-08-12 11:57 ` Pavel Machek
-- strict thread matches above, loose matches on Subject: below --
2013-06-18 0:08 [PATCH 0/2] Fix potential merge conflict for dw_apb_timer_of dinguyen-EIB2kfCEclfQT0dZR+AlfA
[not found] ` <1371514129-22801-1-git-send-email-dinguyen-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org>
2013-06-18 0:08 ` [PATCH 1/2] ARM: dts: Change dw-apb-timer-osc and dw-apb-timer-sp to just dw-apb-timer dinguyen-EIB2kfCEclfQT0dZR+AlfA
2013-06-18 13:11 ` Arnd Bergmann
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