Re: [PATCH v7 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver

[Mark Rutland <mark.rutland@arm.com>]

On Mon, Aug 19, 2013 at 12:34:08PM +0100, Nicolin Chen wrote:
> On Mon, Aug 19, 2013 at 12:13:49PM +0100, Mark Rutland wrote:
> > > > > > > +       "rxtx<0-7>"     Clock source list for tx and rx clock.
> > > > > > > +                       This clock list should be identical to
> > > > > > > +                       the source list connecting to the spdif
> > > > > > > +                       clock mux in "SPDIF Transceiver Clock
> > > > > > > +                       Diagram" of SoC reference manual. It
> > > > > > > +                       can also be referred to TxClk_Source
> > > > > > > +                       bit of register SPDIF_STC.
> > > Actually there's a clock mux for TxClk and it's connecting with 8 clock 
> > > sources. So the TxClk_Source bit show the connection between its value
> > > with the correspond source on the clock mux:
> > > 
> > > TxClk_Source	000 XTAL clk input
> > > 		001 CCM spdif0_clk_root input
> > > 		010 asrc_clk input
> > > 		011 spdif_extclk input, from pads
> > > 		100 esai_hckt input
> > > 		101 frequency divided ipg_clk input
> > > 		110 mlb_clk input
> > > 		111 mlb phy clk input
> > 
> > Ah. So are these the actual input names on the mux, or the names of the
> > outputs that are wired up to the mux? If the former, these may be better
> > clock-names than rxtx<0-7>.
> 
> The clock names are actually different with different SoC. The list above
> is only for i.MX6Q. So we can't specify these names here, because the driver
> then would need to maintain a clock names list for different SoC as well.

Ok. I was working on the assumption there were some logical input names
on the mux that weren't just the names of the actual clocks wired into
them.

> 
> > Is there a similar Rx mux?
> 
> Both Tx and RX clocks can be derived from the Tx mux.

ok.

> 
> > Given the "rxtx<0-7>" names you've given these clocks, are there 8 clock
> > inputs that get duplicated within the spdif block and fed into both
> > muxes, or are there 16 external inputs that happen to be two groups of 8
> > identical sets of clocks in systems so far?
> 
> I think you can refer to the RM, since you just got it. The diagram doesn't
> show which one you mentioned is true. But I think we can understand in both
> ways. 
> 
> I'm going to send a v8. So I think I don't need to modify the description
> right?

>From the sounds of it, no.

Thanks,
Mark.