Re: [PATCH 0/5] Add Core Divider clock support for Armada 370/XP

[Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>]

Dear Ezequiel Garcia,

On Thu, 26 Sep 2013 12:26:52 -0300, Ezequiel Garcia wrote:

> 3. We hack the NAND driver to consume the NAND ECC, but use the rate
> as the half of it, and forget about the halved-rate NAND clock.
> This seems certainly hacky.

Is this really hacky? Since we can't change the rate of one without
changing the other, or gating the one without the other, we can also
see those two clocks as being an internal business of the NAND hardware
block. So instead of seeing things as:

                        -------------
 NAND ECC clk    ---->  |           | 
     ||                 |  NAND HW  |
     ||                 |   block   |
     \/                 |           |
 NAND clk        ---->  |           |
                        -------------

You can see things as follows:

                        -------------
                        |           | 
                        |  NAND HW  |
 NAND clk        ---->  |   block   |
                        |           |
                        |           |
                        -------------

and the ECC clock is actually some internal business of the NAND hw
block, and therefore handled internally by the NAND driver, as your
option (3) suggests.

Since the amount of details that we have about the exact hardware
architecture are pretty scarce, I believe this is probably the easiest
solution.

Best regards,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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