From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCHv3 14/19] iommu/tegra: smmu: Get "nvidia,memory-clients" from DT Date: Thu, 31 Oct 2013 19:21:04 +0000 Message-ID: <20131031192104.GA31516@mudshark.cambridge.arm.com> References: <1382092020-13170-1-git-send-email-hdoyu@nvidia.com> <1382092020-13170-15-git-send-email-hdoyu@nvidia.com> <52718BB4.4090007@wwwdotorg.org> <20131031.101808.1830527808656695540.hdoyu@nvidia.com> <20131031174028.GF3037@kartoffel> <20131031180212.GC31082@mudshark.cambridge.arm.com> <5272ABBD.4050505@wwwdotorg.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <5272ABBD.4050505-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Stephen Warren Cc: Mark Rutland , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Stephen Warren , "rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org" , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , "grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" List-Id: devicetree@vger.kernel.org On Thu, Oct 31, 2013 at 07:13:01PM +0000, Stephen Warren wrote: > On 10/31/2013 12:02 PM, Will Deacon wrote: > > On Thu, Oct 31, 2013 at 05:40:29PM +0000, Mark Rutland wrote: > >> For the ARM SMMU binding, each device has a #stream-id-cells property > >> describing how many IDs it has, and then the SMMU node has a phandle+args > >> linkage to each of the devices attached to it, describing their stream IDs. > >> While this does have some limitations (a device can't be plugged into multiple > >> SMMUs with a different number of IDs), it seems generally sane. > > > > If a device masters through two separate SMMUs, I think you need to describe > > it as two devices. Even if you could describe the thing in DT, the Linux > > driver/iommu model will quickly fall over. > > Isn't that an internal Linux driver model issue? If there's a single > logical HW block, it seems like it should have a single DT node. The > fact that the DT node then somehow needs to instantiate two struct > device objects within Linux seems like it shouldn't influence the DT design. Sure, I was just pointing out that you're going to need two struct devices for that scenario, which isn't how things would work in Linux today. Will