From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hiroshi Doyu Subject: Re: [PATCHv3 14/19] iommu/tegra: smmu: Get "nvidia,memory-clients" from DT Date: Fri, 1 Nov 2013 09:54:30 +0200 Message-ID: <20131101095430.4e37d15c385e87b7a379fc96@nvidia.com> References: <1382092020-13170-1-git-send-email-hdoyu@nvidia.com> <1382092020-13170-15-git-send-email-hdoyu@nvidia.com> <52718BB4.4090007@wwwdotorg.org> <20131031.101808.1830527808656695540.hdoyu@nvidia.com> <20131031174028.GF3037@kartoffel> <5272AC82.6080205@wwwdotorg.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <5272AC82.6080205-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Mark Rutland , Stephen Warren , Will Deacon Cc: "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Stephen Warren , "rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org" , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , "grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" List-Id: devicetree@vger.kernel.org On Thu, 31 Oct 2013 20:16:18 +0100 Stephen Warren wrote: > Hmm. That's interesting. I see that the ARM SMMU has a list of the > clients it affects, whereas this Tegra series puts information into each > client device about the SMMU(s) that affect it. Is it better to flip the > Tegra binding around to match the style of the ARM SMMU? That's better from consistency POV. Can this be used to control the device instanciation order? I'm considering the following scenario: If a device phandle is listed in mmu-masters, that device probe would be defered till IOMMU is instanciated. How does ARM SMMU deal with this issue now?