* [PATCH 1/4] ARM: tegra: add reset properties to Tegra124 DTs
@ 2013-11-25 22:39 Stephen Warren
[not found] ` <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Stephen Warren @ 2013-11-25 22:39 UTC (permalink / raw)
To: swarren-3lzwWm7+Weoh9ZMKESR00Q
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren
From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 936579b806d4..4ed6a3a8e2de 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -36,6 +36,7 @@
compatible = "nvidia,tegra124-car";
reg = <0x60006000 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
gpio: gpio@6000d000 {
@@ -69,6 +70,8 @@
reg-shift = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTA>;
+ resets = <&tegra_car 6>;
+ reset-names = "serial";
status = "disabled";
};
@@ -78,6 +81,8 @@
reg-shift = <2>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTB>;
+ resets = <&tegra_car 7>;
+ reset-names = "serial";
status = "disabled";
};
@@ -87,6 +92,8 @@
reg-shift = <2>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTC>;
+ resets = <&tegra_car 55>;
+ reset-names = "serial";
status = "disabled";
};
@@ -96,6 +103,8 @@
reg-shift = <2>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTD>;
+ resets = <&tegra_car 65>;
+ reset-names = "serial";
status = "disabled";
};
@@ -105,6 +114,8 @@
reg-shift = <2>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTE>;
+ resets = <&tegra_car 66>;
+ reset-names = "serial";
status = "disabled";
};
--
1.8.1.5
^ permalink raw reply related [flat|nested] 9+ messages in thread[parent not found: <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]
* [PATCH 2/4] ARM: tegra: add APB DMA controller to Tegra124 DT [not found] ` <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> @ 2013-11-25 22:39 ` Stephen Warren [not found] ` <1385419160-11511-2-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-25 22:39 ` [PATCH 3/4] ARM: tegra: add Tegra124 pinmux node to DT Stephen Warren ` (3 subsequent siblings) 4 siblings, 1 reply; 9+ messages in thread From: Stephen Warren @ 2013-11-25 22:39 UTC (permalink / raw) To: swarren-3lzwWm7+Weoh9ZMKESR00Q Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Instantiate the APB DMA controller in the Tegra124 DT, and add all DMA-related properties to other DT nodes that rely on (reference) the DMA controller's node. Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- arch/arm/boot/dts/tegra124.dtsi | 51 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 4ed6a3a8e2de..9a8b5b8d8397 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -56,6 +56,47 @@ interrupt-controller; }; + apbdma: dma@60020000 { + compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma"; + reg = <0x60020000 0x1400>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_APBDMA>; + resets = <&tegra_car 34>; + reset-names = "dma"; + #dma-cells = <1>; + }; + /* * There are two serial driver i.e. 8250 based simple serial * driver and APB DMA based serial driver for higher baudrate @@ -72,6 +113,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTA>; resets = <&tegra_car 6>; reset-names = "serial"; + dmas = <&apbdma 8>, <&apbdma 8>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -83,6 +126,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTB>; resets = <&tegra_car 7>; reset-names = "serial"; + dmas = <&apbdma 9>, <&apbdma 9>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -94,6 +139,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTC>; resets = <&tegra_car 55>; reset-names = "serial"; + dmas = <&apbdma 10>, <&apbdma 10>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -105,6 +152,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTD>; resets = <&tegra_car 65>; reset-names = "serial"; + dmas = <&apbdma 19>, <&apbdma 19>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -116,6 +165,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTE>; resets = <&tegra_car 66>; reset-names = "serial"; + dmas = <&apbdma 20>, <&apbdma 20>; + dma-names = "rx", "tx"; status = "disabled"; }; -- 1.8.1.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
[parent not found: <1385419160-11511-2-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]
* Re: [PATCH 2/4] ARM: tegra: add APB DMA controller to Tegra124 DT [not found] ` <1385419160-11511-2-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> @ 2013-11-29 15:59 ` Thierry Reding 0 siblings, 0 replies; 9+ messages in thread From: Thierry Reding @ 2013-11-29 15:59 UTC (permalink / raw) To: Stephen Warren Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren [-- Attachment #1: Type: text/plain, Size: 607 bytes --] On Mon, Nov 25, 2013 at 03:39:18PM -0700, Stephen Warren wrote: > From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > > Instantiate the APB DMA controller in the Tegra124 DT, and add all > DMA-related properties to other DT nodes that rely on (reference) the > DMA controller's node. > > Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > --- > arch/arm/boot/dts/tegra124.dtsi | 51 +++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 51 insertions(+) Reviewed-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/4] ARM: tegra: add Tegra124 pinmux node to DT [not found] ` <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-25 22:39 ` [PATCH 2/4] ARM: tegra: add APB DMA controller to Tegra124 DT Stephen Warren @ 2013-11-25 22:39 ` Stephen Warren [not found] ` <1385419160-11511-3-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-25 22:39 ` [PATCH 4/4] ARM: tegra: add MMC controllers to Tegra124 DT Stephen Warren ` (2 subsequent siblings) 4 siblings, 1 reply; 9+ messages in thread From: Stephen Warren @ 2013-11-25 22:39 UTC (permalink / raw) To: swarren-3lzwWm7+Weoh9ZMKESR00Q Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- arch/arm/boot/dts/tegra124.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 9a8b5b8d8397..96e051e13f76 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -97,6 +97,12 @@ #dma-cells = <1>; }; + pinmux: pinmux@70000868 { + compatible = "nvidia,tegra124-pinmux"; + reg = <0x70000868 0x148>, /* Pad control registers */ + <0x70003000 0x40c>; /* Mux registers */ + }; + /* * There are two serial driver i.e. 8250 based simple serial * driver and APB DMA based serial driver for higher baudrate -- 1.8.1.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
[parent not found: <1385419160-11511-3-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]
* Re: [PATCH 3/4] ARM: tegra: add Tegra124 pinmux node to DT [not found] ` <1385419160-11511-3-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> @ 2013-11-29 16:01 ` Thierry Reding 0 siblings, 0 replies; 9+ messages in thread From: Thierry Reding @ 2013-11-29 16:01 UTC (permalink / raw) To: Stephen Warren Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren [-- Attachment #1: Type: text/plain, Size: 567 bytes --] On Mon, Nov 25, 2013 at 03:39:19PM -0700, Stephen Warren wrote: > From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > > Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > --- > arch/arm/boot/dts/tegra124.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) Reviewed-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> And since I've been running my Venice2 with that patch for quite a while I guess also: Tested-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/4] ARM: tegra: add MMC controllers to Tegra124 DT [not found] ` <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-25 22:39 ` [PATCH 2/4] ARM: tegra: add APB DMA controller to Tegra124 DT Stephen Warren 2013-11-25 22:39 ` [PATCH 3/4] ARM: tegra: add Tegra124 pinmux node to DT Stephen Warren @ 2013-11-25 22:39 ` Stephen Warren [not found] ` <1385419160-11511-4-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2013-11-29 15:58 ` [PATCH 1/4] ARM: tegra: add reset properties to Tegra124 DTs Thierry Reding 2013-12-12 19:36 ` Stephen Warren 4 siblings, 1 reply; 9+ messages in thread From: Stephen Warren @ 2013-11-25 22:39 UTC (permalink / raw) To: swarren-3lzwWm7+Weoh9ZMKESR00Q Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Tegra124 has 4 MMC controllers just like previous versions of the SoC. Note that there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. Also enable the relevant controllers in the Venice2 board DT. Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- arch/arm/boot/dts/tegra124-venice2.dts | 11 ++++++++++ arch/arm/boot/dts/tegra124.dtsi | 40 ++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index a0b028384658..bc502112eb04 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -25,6 +25,17 @@ nvidia,sys-clock-req-active-high; }; + sdhci@700b0400 { + cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + status = "okay"; + bus-width = <4>; + }; + + sdhci@700b0600 { + status = "okay"; + bus-width = <8>; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 96e051e13f76..200373236aaa 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -190,6 +190,46 @@ clock-names = "pclk", "clk32k_in"; }; + sdhci@700b0000 { + compatible = "nvidia,tegra124-sdhci"; + reg = <0x700b0000 0x200>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_SDMMC1>; + resets = <&tegra_car 14>; + reset-names = "sdhci"; + status = "disable"; + }; + + sdhci@700b0200 { + compatible = "nvidia,tegra124-sdhci"; + reg = <0x700b0200 0x200>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_SDMMC2>; + resets = <&tegra_car 9>; + reset-names = "sdhci"; + status = "disable"; + }; + + sdhci@700b0400 { + compatible = "nvidia,tegra124-sdhci"; + reg = <0x700b0400 0x200>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_SDMMC3>; + resets = <&tegra_car 69>; + reset-names = "sdhci"; + status = "disable"; + }; + + sdhci@700b0600 { + compatible = "nvidia,tegra124-sdhci"; + reg = <0x700b0600 0x200>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_SDMMC4>; + resets = <&tegra_car 15>; + reset-names = "sdhci"; + status = "disable"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; -- 1.8.1.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
[parent not found: <1385419160-11511-4-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]
* Re: [PATCH 4/4] ARM: tegra: add MMC controllers to Tegra124 DT [not found] ` <1385419160-11511-4-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> @ 2013-11-29 16:04 ` Thierry Reding 0 siblings, 0 replies; 9+ messages in thread From: Thierry Reding @ 2013-11-29 16:04 UTC (permalink / raw) To: Stephen Warren Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren [-- Attachment #1: Type: text/plain, Size: 805 bytes --] On Mon, Nov 25, 2013 at 03:39:20PM -0700, Stephen Warren wrote: [...] > diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts > index a0b028384658..bc502112eb04 100644 > --- a/arch/arm/boot/dts/tegra124-venice2.dts > +++ b/arch/arm/boot/dts/tegra124-venice2.dts > @@ -25,6 +25,17 @@ > nvidia,sys-clock-req-active-high; > }; > > + sdhci@700b0400 { > + cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; I have a local patch which adds this here: power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; > + status = "okay"; > + bus-width = <4>; And: vmmc-supply = <&vddio_sdmmc3>; here. The latter doesn't probably matter because we don't have the PMIC node yet and the regulator seems to be on by default. Thierry [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] ARM: tegra: add reset properties to Tegra124 DTs [not found] ` <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> ` (2 preceding siblings ...) 2013-11-25 22:39 ` [PATCH 4/4] ARM: tegra: add MMC controllers to Tegra124 DT Stephen Warren @ 2013-11-29 15:58 ` Thierry Reding 2013-12-12 19:36 ` Stephen Warren 4 siblings, 0 replies; 9+ messages in thread From: Thierry Reding @ 2013-11-29 15:58 UTC (permalink / raw) To: Stephen Warren Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren [-- Attachment #1: Type: text/plain, Size: 562 bytes --] On Mon, Nov 25, 2013 at 03:39:17PM -0700, Stephen Warren wrote: > From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > > Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > --- > arch/arm/boot/dts/tegra124.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) A proper commit message would be nice, but it probably wouldn't be much more than a repetition of the subject, so perhaps it's not worth it. Either way: Reviewed-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] ARM: tegra: add reset properties to Tegra124 DTs [not found] ` <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> ` (3 preceding siblings ...) 2013-11-29 15:58 ` [PATCH 1/4] ARM: tegra: add reset properties to Tegra124 DTs Thierry Reding @ 2013-12-12 19:36 ` Stephen Warren 4 siblings, 0 replies; 9+ messages in thread From: Stephen Warren @ 2013-12-12 19:36 UTC (permalink / raw) To: swarren-3lzwWm7+Weoh9ZMKESR00Q Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren On 11/25/2013 03:39 PM, Stephen Warren wrote: > From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > > Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> I've applied this series to Tegra's for-3.14/dt branch, but used V2 for patch 3/4 and 4/4. ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2013-12-12 19:36 UTC | newest]
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2013-11-25 22:39 [PATCH 1/4] ARM: tegra: add reset properties to Tegra124 DTs Stephen Warren
[not found] ` <1385419160-11511-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-25 22:39 ` [PATCH 2/4] ARM: tegra: add APB DMA controller to Tegra124 DT Stephen Warren
[not found] ` <1385419160-11511-2-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-29 15:59 ` Thierry Reding
2013-11-25 22:39 ` [PATCH 3/4] ARM: tegra: add Tegra124 pinmux node to DT Stephen Warren
[not found] ` <1385419160-11511-3-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-29 16:01 ` Thierry Reding
2013-11-25 22:39 ` [PATCH 4/4] ARM: tegra: add MMC controllers to Tegra124 DT Stephen Warren
[not found] ` <1385419160-11511-4-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-29 16:04 ` Thierry Reding
2013-11-29 15:58 ` [PATCH 1/4] ARM: tegra: add reset properties to Tegra124 DTs Thierry Reding
2013-12-12 19:36 ` Stephen Warren
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