Re: [PATCH v6 15/15] usb: phy-mxs: Add sync time after controller clear phcd

[Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org>]

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On Fri, Dec 13, 2013 at 09:23:45AM +0800, Peter Chen wrote:
> After clear portsc.phcd, PHY needs 200us stable time for switch
> 32K clock to AHB clock.
> 
> Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
>  drivers/usb/phy/phy-mxs-usb.c |   11 +++++++++++
>  1 files changed, 11 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 885f8d9..68bd981 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -156,6 +156,15 @@ static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
>  	return mxs_phy->data == &imx6sl_phy_data;
>  }
>  
> +/*
> + * PHY needs some 32K cycles to switch from 32K clock to
> + * bus (such as AHB/AXI, etc) clock.
> + */
> +static void mxs_phy_clock_switch_delay(void)
> +{
> +	usleep_range(300, 400);
> +}

shouldn't this be handled by clk_set_parent() itself ?

-- 
balbi

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