From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Vincent Guittot <vincent.guittot@linaro.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
LAK <linux-arm-kernel@lists.infradead.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
Dave P Martin <Dave.Martin@arm.com>,
Mark Rutland <Mark.Rutland@arm.com>,
Sudeep Holla <Sudeep.Holla@arm.com>,
Charles Garcia-Tobin <Charles.Garcia-Tobin@arm.com>,
Nicolas Pitre <nico@linaro.org>, Rob Herring <robh+dt@kernel.org>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
"grant.likely@linaro.org" <grant.likely@linaro.org>,
Kumar Gala <galak@codeaurora.org>,
Santosh Shilimkar <santosh.shilimkar@ti.com>,
Mark Hambleton <mark.hambleton@broadcom.com>,
Hanjun Guo <hanjun.guo@linaro.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Amit Kucheria <amit.kucheria@linaro.org>,
Antti Miettinen <ananaza@iki.fi>,
Stephen Boyd <sboyd@codeaurora.org>,
Tomasz Figa <t.figa@samsung.com>,
Kevin Hilman <khilman@linaro.org>
Subject: Re: [PATCH RFC v2 2/2] Documentation: arm: define DT C-states bindings
Date: Wed, 29 Jan 2014 12:42:54 +0000 [thread overview]
Message-ID: <20140129124254.GB10396@e102568-lin.cambridge.arm.com> (raw)
In-Reply-To: <CAKfTPtAEekg_KHhLikJK=njC-b5F=MOmAmSP8P96+j_23-iu3Q@mail.gmail.com>
On Tue, Jan 28, 2014 at 08:24:54AM +0000, Vincent Guittot wrote:
> On 24 January 2014 18:58, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> wrote:
[...]
> >> Please look below, i have modified the rest of your example accordingly
> >>
> >> >
> >> > }:
> >> >
> >> > and then
> >> >
> >> > state0 {
> >> > index = <2>;
> >> > compatible = "arm,cpu-power-state";
> >> > latency = <...>;
> >> > /*
> >> > * This means that when the state is entered, the power
> >> > * controller should use register index 0 and state 0,
> >> > * whose meaning is power controller specific. Since we
> >> > * know all components affected (for every component
> >> > * we declare its power domain(s) and states so we
> >> > * know what components are affected by the state entry.
> >> > * Given the cache node above and this phandle, the state
> >> > * implies that the cache is retained, register index == 0 state == 0
> >> > /*
> >> > power-domain =<&foo_power_controller 0 0>;
> >>
> >> for retention state we need to set the power domain in state 1
> >> power-domain =<&foo_power_controller 0 1>;
> >>
> >> > };
> >> >
> >> > state1 {
> >> > index = <3>;
> >> > compatible = "arm,cpu-power-state";
> >> > latency = <...>;
> >> > /*
> >> > * This means that when the state is entered, the power
> >> > * controller should use register index 0 and state 1,
> >> > * whose meaning is power controller specific. Since we
> >> > * know all components affected (for every component
> >> > * we declare its power domain(s) and states so we
> >> > * know what components are affected by the state entry.
> >> > * Given the cache node above and this phandle, the state
> >> > * implies that the cache is lost, register index == 0 state == 1
> >> > /*
> >> > power-domain =<&foo_power_controller 0 1>;
> >>
> >> for power down mode, we need to set thge power domain in state 2
> >> power-domain =<&foo_power_controller 0 2>;
> >
> > Ok, what I meant was not what you got, but your approach looks sensible
> > too. What I do not like is that the power-domain specifier is power
>
> sorry for the misconception of your example
>
> > controller specific (that was true even for my example). In theory
> > we can achieve something identical by forcing every component in a power
> > domain to specify the max C-state index that allows it to retain its
>
> I'm not sure that we should force a component to set an opaque (for
> the component) max c-state. The device should describe its power
> domain requirements and the correlation of the latter with the
> description of the c-state binding should be enough to deduct the max
> c-state.
I agree, that was an option, I just loathe the idea of implementing it.
Using power domain specifiers is ways cleaner IMHO, the only drawback is
that, it is up to the power domain documentation to define what a state
means in terms of save/restore and cache behavior. I think that makes
perfect sense, at least for me.
> > state (through a specific property). Same logic to your example applies.
> > Nice thing is that we do not change the power domain specifiers, bad thing
> > is that it adds two properties to each device (c-state index and
> > power-domain-specifier - but we can make it hierarchical so that device
> > nodes can inherit the maximum operating C-state by inheriting the value
> > from a parent node providing a common value).
> >
> > In my example the third parameter was just a number that the power
> > controller would decode (eg 0 = cache retained, 1 = cache lost)
> > according to its implementation, it was not a "state index". The
> > power controller would know what to do with eg a cache component (that
> > declares to be in that power domain) when a C-state with that power
> > domain specifier was entered.
> >
> > Not very different from what you are saying, let's get to the nub:
> >
> > - Either we define it in a platform specific way through the power
> > domain specifier
> > - Or we force a max-c-state-supported property for every device,
> > possibly hierarchical
>
> As explained above, adding a max-cstate property for a device that
> only know the power-domain is not a good thing IMHO.
I agree, if nobody complains that's the way I will define the bindings.
Thank you,
Lorenzo
next prev parent reply other threads:[~2014-01-29 12:42 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-20 17:47 [PATCH RFC v2 0/2] ARM: defining power states DT bindings Lorenzo Pieralisi
2014-01-20 17:47 ` [PATCH RFC v2 1/2] Documentation: arm: add cache " Lorenzo Pieralisi
2014-01-21 11:49 ` Dave Martin
2014-01-21 14:47 ` Lorenzo Pieralisi
[not found] ` <20140121114845.GA2598-M5GwZQ6tE7x5pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2014-01-27 12:58 ` Russell King - ARM Linux
2014-01-27 18:10 ` Lorenzo Pieralisi
2014-01-20 17:47 ` [PATCH RFC v2 2/2] Documentation: arm: define DT C-states bindings Lorenzo Pieralisi
2014-01-21 11:16 ` Vincent Guittot
2014-01-21 13:31 ` Lorenzo Pieralisi
2014-01-21 14:35 ` Amit Kucheria
2014-01-21 15:23 ` Lorenzo Pieralisi
2014-01-22 11:52 ` Mark Brown
2014-01-22 16:23 ` Lorenzo Pieralisi
2014-01-22 18:17 ` Mark Brown
2014-01-22 11:42 ` Mark Brown
2014-01-22 16:33 ` Lorenzo Pieralisi
2014-01-22 18:11 ` Mark Brown
2014-01-22 19:20 ` Lorenzo Pieralisi
2014-01-24 8:40 ` Vincent Guittot
2014-01-24 17:58 ` Lorenzo Pieralisi
2014-01-28 8:24 ` Vincent Guittot
2014-01-29 12:42 ` Lorenzo Pieralisi [this message]
2014-01-25 8:15 ` Antti P Miettinen
2014-01-27 11:41 ` Lorenzo Pieralisi
2014-01-27 12:48 ` Antti P Miettinen
2014-01-27 18:22 ` Lorenzo Pieralisi
-- strict thread matches above, loose matches on Subject: below --
2014-01-27 15:59 Dave Martin
2014-01-29 12:33 ` Lorenzo Pieralisi
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