* [PATCH 01/12] phy: rename struct omap_control_usb to struct omap_control_phy
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-04 9:26 ` Kishon Vijay Abraham I
2014-03-03 15:07 ` [PATCH 02/12] phy: omap-control: Update DT binding information Roger Quadros
` (10 subsequent siblings)
11 siblings, 1 reply; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq
From: Kishon Vijay Abraham I <kishon@ti.com>
Rename struct omap_control_usb to struct omap_control_phy since it can
be used to control PHY of USB, SATA and PCIE. Also move the driver and
include files under *phy* and made the corresponding changes in the users
of phy-omap-control.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
drivers/phy/Kconfig | 14 +-
drivers/phy/Makefile | 1 +
drivers/phy/phy-omap-control.c | 320 +++++++++++++++++++++++++++++++++++
drivers/phy/phy-omap-usb2.c | 8 +-
drivers/phy/phy-ti-pipe3.c | 8 +-
drivers/usb/musb/omap2430.c | 2 +-
drivers/usb/phy/Kconfig | 10 --
drivers/usb/phy/Makefile | 1 -
drivers/usb/phy/phy-omap-control.c | 319 ----------------------------------
include/linux/phy/omap_control_phy.h | 89 ++++++++++
include/linux/usb/omap_control_usb.h | 89 ----------
11 files changed, 431 insertions(+), 430 deletions(-)
create mode 100644 drivers/phy/phy-omap-control.c
delete mode 100644 drivers/usb/phy/phy-omap-control.c
create mode 100644 include/linux/phy/omap_control_phy.h
delete mode 100644 include/linux/usb/omap_control_usb.h
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index bb238d4..2f02ec8 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -28,12 +28,22 @@ config PHY_MVEBU_SATA
depends on OF
select GENERIC_PHY
+config OMAP_CONTROL_PHY
+ tristate "OMAP CONTROL PHY Driver"
+ help
+ Enable this to add support for the PHY part present in the control
+ module. This driver has API to power on the USB2 PHY and to write to
+ the mailbox. The mailbox is present only in omap4 and the register to
+ power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
+ additional register to power on USB3 PHY/SATA PHY/PCIE PHY
+ (PIPE3 PHY).
+
config OMAP_USB2
tristate "OMAP USB2 PHY Driver"
depends on ARCH_OMAP2PLUS
depends on USB_PHY
select GENERIC_PHY
- select OMAP_CONTROL_USB
+ select OMAP_CONTROL_PHY
help
Enable this to support the transceiver that is part of SOC. This
driver takes care of all the PHY functionality apart from comparator.
@@ -44,7 +54,7 @@ config TI_PIPE3
tristate "TI PIPE3 PHY Driver"
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
- select OMAP_CONTROL_USB
+ select OMAP_CONTROL_PHY
help
Enable this to support the PIPE3 PHY that is part of TI SOCs. This
driver takes care of all the PHY functionality apart from comparator.
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 32e3f94..7518497 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o
obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
+obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
new file mode 100644
index 0000000..17fc200
--- /dev/null
+++ b/drivers/phy/phy-omap-control.c
@@ -0,0 +1,320 @@
+/*
+ * omap-control-phy.c - The PHY part of control module.
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: Kishon Vijay Abraham I <kishon@ti.com>
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/phy/omap_control_phy.h>
+
+/**
+ * omap_control_phy_power - power on/off the phy using control module reg
+ * @dev: the control module device
+ * @on: 0 or 1, based on powering on or off the PHY
+ */
+void omap_control_phy_power(struct device *dev, int on)
+{
+ u32 val;
+ unsigned long rate;
+ struct omap_control_phy *control_phy;
+
+ if (IS_ERR(dev) || !dev) {
+ pr_err("%s: invalid device\n", __func__);
+ return;
+ }
+
+ control_phy = dev_get_drvdata(dev);
+ if (!control_phy) {
+ dev_err(dev, "%s: invalid control phy device\n", __func__);
+ return;
+ }
+
+ if (control_phy->type == OMAP_CTRL_TYPE_OTGHS)
+ return;
+
+ val = readl(control_phy->power);
+
+ switch (control_phy->type) {
+ case OMAP_CTRL_TYPE_USB2:
+ if (on)
+ val &= ~OMAP_CTRL_DEV_PHY_PD;
+ else
+ val |= OMAP_CTRL_DEV_PHY_PD;
+ break;
+
+ case OMAP_CTRL_TYPE_PIPE3:
+ rate = clk_get_rate(control_phy->sys_clk);
+ rate = rate/1000000;
+
+ if (on) {
+ val &= ~(OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
+ OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK);
+ val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON <<
+ OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+ val |= rate <<
+ OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
+ } else {
+ val &= ~OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK;
+ val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF <<
+ OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+ }
+ break;
+
+ case OMAP_CTRL_TYPE_DRA7USB2:
+ if (on)
+ val &= ~OMAP_CTRL_USB2_PHY_PD;
+ else
+ val |= OMAP_CTRL_USB2_PHY_PD;
+ break;
+
+ case OMAP_CTRL_TYPE_AM437USB2:
+ if (on) {
+ val &= ~(AM437X_CTRL_USB2_PHY_PD |
+ AM437X_CTRL_USB2_OTG_PD);
+ val |= (AM437X_CTRL_USB2_OTGVDET_EN |
+ AM437X_CTRL_USB2_OTGSESSEND_EN);
+ } else {
+ val &= ~(AM437X_CTRL_USB2_OTGVDET_EN |
+ AM437X_CTRL_USB2_OTGSESSEND_EN);
+ val |= (AM437X_CTRL_USB2_PHY_PD |
+ AM437X_CTRL_USB2_OTG_PD);
+ }
+ break;
+ default:
+ dev_err(dev, "%s: type %d not recognized\n",
+ __func__, control_phy->type);
+ break;
+ }
+
+ writel(val, control_phy->power);
+}
+EXPORT_SYMBOL_GPL(omap_control_phy_power);
+
+/**
+ * omap_control_usb_host_mode - set AVALID, VBUSVALID and ID pin in grounded
+ * @ctrl_phy: struct omap_control_phy *
+ *
+ * Writes to the mailbox register to notify the usb core that a usb
+ * device has been connected.
+ */
+static void omap_control_usb_host_mode(struct omap_control_phy *ctrl_phy)
+{
+ u32 val;
+
+ val = readl(ctrl_phy->otghs_control);
+ val &= ~(OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND);
+ val |= OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID;
+ writel(val, ctrl_phy->otghs_control);
+}
+
+/**
+ * omap_control_usb_device_mode - set AVALID, VBUSVALID and ID pin in high
+ * impedance
+ * @ctrl_phy: struct omap_control_phy *
+ *
+ * Writes to the mailbox register to notify the usb core that it has been
+ * connected to a usb host.
+ */
+static void omap_control_usb_device_mode(struct omap_control_phy *ctrl_phy)
+{
+ u32 val;
+
+ val = readl(ctrl_phy->otghs_control);
+ val &= ~OMAP_CTRL_DEV_SESSEND;
+ val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_AVALID |
+ OMAP_CTRL_DEV_VBUSVALID;
+ writel(val, ctrl_phy->otghs_control);
+}
+
+/**
+ * omap_control_usb_set_sessionend - Enable SESSIONEND and IDIG to high
+ * impedance
+ * @ctrl_phy: struct omap_control_phy *
+ *
+ * Writes to the mailbox register to notify the usb core it's now in
+ * disconnected state.
+ */
+static void omap_control_usb_set_sessionend(struct omap_control_phy *ctrl_phy)
+{
+ u32 val;
+
+ val = readl(ctrl_phy->otghs_control);
+ val &= ~(OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID);
+ val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND;
+ writel(val, ctrl_phy->otghs_control);
+}
+
+/**
+ * omap_control_usb_set_mode - Calls to functions to set USB in one of host mode
+ * or device mode or to denote disconnected state
+ * @dev: the control module device
+ * @mode: The mode to which usb should be configured
+ *
+ * This is an API to write to the mailbox register to notify the usb core that
+ * a usb device has been connected.
+ */
+void omap_control_usb_set_mode(struct device *dev,
+ enum omap_control_usb_mode mode)
+{
+ struct omap_control_phy *ctrl_phy;
+
+ if (IS_ERR(dev) || !dev)
+ return;
+
+ ctrl_phy = dev_get_drvdata(dev);
+
+ if (!ctrl_phy) {
+ dev_err(dev, "Invalid control phy device\n");
+ return;
+ }
+
+ if (ctrl_phy->type != OMAP_CTRL_TYPE_OTGHS)
+ return;
+
+ switch (mode) {
+ case USB_MODE_HOST:
+ omap_control_usb_host_mode(ctrl_phy);
+ break;
+ case USB_MODE_DEVICE:
+ omap_control_usb_device_mode(ctrl_phy);
+ break;
+ case USB_MODE_DISCONNECT:
+ omap_control_usb_set_sessionend(ctrl_phy);
+ break;
+ default:
+ dev_vdbg(dev, "invalid omap control usb mode\n");
+ }
+}
+EXPORT_SYMBOL_GPL(omap_control_usb_set_mode);
+
+#ifdef CONFIG_OF
+
+static const enum omap_control_phy_type otghs_data = OMAP_CTRL_TYPE_OTGHS;
+static const enum omap_control_phy_type usb2_data = OMAP_CTRL_TYPE_USB2;
+static const enum omap_control_phy_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
+static const enum omap_control_phy_type dra7usb2_data = OMAP_CTRL_TYPE_DRA7USB2;
+static const enum omap_control_phy_type am437usb2_data = OMAP_CTRL_TYPE_AM437USB2;
+
+static const struct of_device_id omap_control_phy_id_table[] = {
+ {
+ .compatible = "ti,control-phy-otghs",
+ .data = &otghs_data,
+ },
+ {
+ .compatible = "ti,control-phy-usb2",
+ .data = &usb2_data,
+ },
+ {
+ .compatible = "ti,control-phy-pipe3",
+ .data = &pipe3_data,
+ },
+ {
+ .compatible = "ti,control-phy-dra7usb2",
+ .data = &dra7usb2_data,
+ },
+ {
+ .compatible = "ti,control-phy-am437usb2",
+ .data = &am437usb2_data,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, omap_control_phy_id_table);
+#endif
+
+
+static int omap_control_phy_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ const struct of_device_id *of_id;
+ struct omap_control_phy *control_phy;
+
+ of_id = of_match_device(of_match_ptr(omap_control_phy_id_table),
+ &pdev->dev);
+ if (!of_id)
+ return -EINVAL;
+
+ control_phy = devm_kzalloc(&pdev->dev, sizeof(*control_phy),
+ GFP_KERNEL);
+ if (!control_phy) {
+ dev_err(&pdev->dev, "unable to alloc memory for control phy\n");
+ return -ENOMEM;
+ }
+
+ control_phy->dev = &pdev->dev;
+ control_phy->type = *(enum omap_control_phy_type *)of_id->data;
+
+ if (control_phy->type == OMAP_CTRL_TYPE_OTGHS) {
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "otghs_control");
+ control_phy->otghs_control = devm_ioremap_resource(
+ &pdev->dev, res);
+ if (IS_ERR(control_phy->otghs_control))
+ return PTR_ERR(control_phy->otghs_control);
+ } else {
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "power");
+ control_phy->power = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(control_phy->power)) {
+ dev_err(&pdev->dev, "Couldn't get power register\n");
+ return PTR_ERR(control_phy->power);
+ }
+ }
+
+ if (control_phy->type == OMAP_CTRL_TYPE_PIPE3) {
+ control_phy->sys_clk = devm_clk_get(control_phy->dev,
+ "sys_clkin");
+ if (IS_ERR(control_phy->sys_clk)) {
+ pr_err("%s: unable to get sys_clkin\n", __func__);
+ return -EINVAL;
+ }
+ }
+
+ dev_set_drvdata(control_phy->dev, control_phy);
+
+ return 0;
+}
+
+static struct platform_driver omap_control_phy_driver = {
+ .probe = omap_control_phy_probe,
+ .driver = {
+ .name = "omap-control-phy",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(omap_control_phy_id_table),
+ },
+};
+
+static int __init omap_control_phy_init(void)
+{
+ return platform_driver_register(&omap_control_phy_driver);
+}
+subsys_initcall(omap_control_phy_init);
+
+static void __exit omap_control_phy_exit(void)
+{
+ platform_driver_unregister(&omap_control_phy_driver);
+}
+module_exit(omap_control_phy_exit);
+
+MODULE_ALIAS("platform: omap_control_phy");
+MODULE_AUTHOR("Texas Instruments Inc.");
+MODULE_DESCRIPTION("OMAP Control Module PHY Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index d738dc3..f6174cc 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -27,7 +27,7 @@
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <linux/delay.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/phy/omap_control_phy.h>
#include <linux/phy/phy.h>
#include <linux/of_platform.h>
@@ -102,7 +102,7 @@ static int omap_usb_power_off(struct phy *x)
{
struct omap_usb *phy = phy_get_drvdata(x);
- omap_control_usb_phy_power(phy->control_dev, 0);
+ omap_control_phy_power(phy->control_dev, 0);
return 0;
}
@@ -111,7 +111,7 @@ static int omap_usb_power_on(struct phy *x)
{
struct omap_usb *phy = phy_get_drvdata(x);
- omap_control_usb_phy_power(phy->control_dev, 1);
+ omap_control_phy_power(phy->control_dev, 1);
return 0;
}
@@ -172,7 +172,7 @@ static int omap_usb2_probe(struct platform_device *pdev)
}
phy->control_dev = &control_pdev->dev;
- omap_control_usb_phy_power(phy->control_dev, 0);
+ omap_control_phy_power(phy->control_dev, 0);
otg->set_host = omap_usb_set_host;
otg->set_peripheral = omap_usb_set_peripheral;
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 67b189d..54859fc 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -26,7 +26,7 @@
#include <linux/io.h>
#include <linux/pm_runtime.h>
#include <linux/delay.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/phy/omap_control_phy.h>
#include <linux/of_platform.h>
#define PLL_STATUS 0x00000004
@@ -134,7 +134,7 @@ static int ti_pipe3_power_off(struct phy *x)
return -EBUSY;
}
- omap_control_usb_phy_power(phy->control_dev, 0);
+ omap_control_phy_power(phy->control_dev, 0);
return 0;
}
@@ -232,7 +232,7 @@ static int ti_pipe3_init(struct phy *x)
if (ret)
return ret;
- omap_control_usb_phy_power(phy->control_dev, 1);
+ omap_control_phy_power(phy->control_dev, 1);
return 0;
}
@@ -304,7 +304,7 @@ static int ti_pipe3_probe(struct platform_device *pdev)
phy->control_dev = &control_pdev->dev;
- omap_control_usb_phy_power(phy->control_dev, 0);
+ omap_control_phy_power(phy->control_dev, 0);
platform_set_drvdata(pdev, phy);
pm_runtime_enable(phy->dev);
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 2a408cd..c19b1c49 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -37,7 +37,7 @@
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/usb/musb-omap.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/phy/omap_control_phy.h>
#include <linux/of_platform.h>
#include "musb_core.h"
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index c337ba2..416e0c8 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -75,16 +75,6 @@ config NOP_USB_XCEIV
built-in with usb ip or which are autonomous and doesn't require any
phy programming such as ISP1x04 etc.
-config OMAP_CONTROL_USB
- tristate "OMAP CONTROL USB Driver"
- depends on ARCH_OMAP2PLUS || COMPILE_TEST
- help
- Enable this to add support for the USB part present in the control
- module. This driver has API to power on the USB2 PHY and to write to
- the mailbox. The mailbox is present only in omap4 and the register to
- power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
- additional register to power on USB3 PHY.
-
config AM335X_CONTROL_USB
tristate
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 15f1878..f8fa719 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_ISP1301_OMAP) += phy-isp1301-omap.o
obj-$(CONFIG_MV_U3D_PHY) += phy-mv-u3d-usb.o
obj-$(CONFIG_NOP_USB_XCEIV) += phy-generic.o
obj-$(CONFIG_TAHVO_USB) += phy-tahvo.o
-obj-$(CONFIG_OMAP_CONTROL_USB) += phy-omap-control.o
obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o
obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o
obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
diff --git a/drivers/usb/phy/phy-omap-control.c b/drivers/usb/phy/phy-omap-control.c
deleted file mode 100644
index e725318..0000000
--- a/drivers/usb/phy/phy-omap-control.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/*
- * omap-control-usb.c - The USB part of control module.
- *
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * Author: Kishon Vijay Abraham I <kishon@ti.com>
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/clk.h>
-#include <linux/usb/omap_control_usb.h>
-
-/**
- * omap_control_usb_phy_power - power on/off the phy using control module reg
- * @dev: the control module device
- * @on: 0 or 1, based on powering on or off the PHY
- */
-void omap_control_usb_phy_power(struct device *dev, int on)
-{
- u32 val;
- unsigned long rate;
- struct omap_control_usb *control_usb;
-
- if (IS_ERR(dev) || !dev) {
- pr_err("%s: invalid device\n", __func__);
- return;
- }
-
- control_usb = dev_get_drvdata(dev);
- if (!control_usb) {
- dev_err(dev, "%s: invalid control usb device\n", __func__);
- return;
- }
-
- if (control_usb->type == OMAP_CTRL_TYPE_OTGHS)
- return;
-
- val = readl(control_usb->power);
-
- switch (control_usb->type) {
- case OMAP_CTRL_TYPE_USB2:
- if (on)
- val &= ~OMAP_CTRL_DEV_PHY_PD;
- else
- val |= OMAP_CTRL_DEV_PHY_PD;
- break;
-
- case OMAP_CTRL_TYPE_PIPE3:
- rate = clk_get_rate(control_usb->sys_clk);
- rate = rate/1000000;
-
- if (on) {
- val &= ~(OMAP_CTRL_USB_PWRCTL_CLK_CMD_MASK |
- OMAP_CTRL_USB_PWRCTL_CLK_FREQ_MASK);
- val |= OMAP_CTRL_USB3_PHY_TX_RX_POWERON <<
- OMAP_CTRL_USB_PWRCTL_CLK_CMD_SHIFT;
- val |= rate << OMAP_CTRL_USB_PWRCTL_CLK_FREQ_SHIFT;
- } else {
- val &= ~OMAP_CTRL_USB_PWRCTL_CLK_CMD_MASK;
- val |= OMAP_CTRL_USB3_PHY_TX_RX_POWEROFF <<
- OMAP_CTRL_USB_PWRCTL_CLK_CMD_SHIFT;
- }
- break;
-
- case OMAP_CTRL_TYPE_DRA7USB2:
- if (on)
- val &= ~OMAP_CTRL_USB2_PHY_PD;
- else
- val |= OMAP_CTRL_USB2_PHY_PD;
- break;
-
- case OMAP_CTRL_TYPE_AM437USB2:
- if (on) {
- val &= ~(AM437X_CTRL_USB2_PHY_PD |
- AM437X_CTRL_USB2_OTG_PD);
- val |= (AM437X_CTRL_USB2_OTGVDET_EN |
- AM437X_CTRL_USB2_OTGSESSEND_EN);
- } else {
- val &= ~(AM437X_CTRL_USB2_OTGVDET_EN |
- AM437X_CTRL_USB2_OTGSESSEND_EN);
- val |= (AM437X_CTRL_USB2_PHY_PD |
- AM437X_CTRL_USB2_OTG_PD);
- }
- break;
- default:
- dev_err(dev, "%s: type %d not recognized\n",
- __func__, control_usb->type);
- break;
- }
-
- writel(val, control_usb->power);
-}
-EXPORT_SYMBOL_GPL(omap_control_usb_phy_power);
-
-/**
- * omap_control_usb_host_mode - set AVALID, VBUSVALID and ID pin in grounded
- * @ctrl_usb: struct omap_control_usb *
- *
- * Writes to the mailbox register to notify the usb core that a usb
- * device has been connected.
- */
-static void omap_control_usb_host_mode(struct omap_control_usb *ctrl_usb)
-{
- u32 val;
-
- val = readl(ctrl_usb->otghs_control);
- val &= ~(OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND);
- val |= OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID;
- writel(val, ctrl_usb->otghs_control);
-}
-
-/**
- * omap_control_usb_device_mode - set AVALID, VBUSVALID and ID pin in high
- * impedance
- * @ctrl_usb: struct omap_control_usb *
- *
- * Writes to the mailbox register to notify the usb core that it has been
- * connected to a usb host.
- */
-static void omap_control_usb_device_mode(struct omap_control_usb *ctrl_usb)
-{
- u32 val;
-
- val = readl(ctrl_usb->otghs_control);
- val &= ~OMAP_CTRL_DEV_SESSEND;
- val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_AVALID |
- OMAP_CTRL_DEV_VBUSVALID;
- writel(val, ctrl_usb->otghs_control);
-}
-
-/**
- * omap_control_usb_set_sessionend - Enable SESSIONEND and IDIG to high
- * impedance
- * @ctrl_usb: struct omap_control_usb *
- *
- * Writes to the mailbox register to notify the usb core it's now in
- * disconnected state.
- */
-static void omap_control_usb_set_sessionend(struct omap_control_usb *ctrl_usb)
-{
- u32 val;
-
- val = readl(ctrl_usb->otghs_control);
- val &= ~(OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID);
- val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND;
- writel(val, ctrl_usb->otghs_control);
-}
-
-/**
- * omap_control_usb_set_mode - Calls to functions to set USB in one of host mode
- * or device mode or to denote disconnected state
- * @dev: the control module device
- * @mode: The mode to which usb should be configured
- *
- * This is an API to write to the mailbox register to notify the usb core that
- * a usb device has been connected.
- */
-void omap_control_usb_set_mode(struct device *dev,
- enum omap_control_usb_mode mode)
-{
- struct omap_control_usb *ctrl_usb;
-
- if (IS_ERR(dev) || !dev)
- return;
-
- ctrl_usb = dev_get_drvdata(dev);
-
- if (!ctrl_usb) {
- dev_err(dev, "Invalid control usb device\n");
- return;
- }
-
- if (ctrl_usb->type != OMAP_CTRL_TYPE_OTGHS)
- return;
-
- switch (mode) {
- case USB_MODE_HOST:
- omap_control_usb_host_mode(ctrl_usb);
- break;
- case USB_MODE_DEVICE:
- omap_control_usb_device_mode(ctrl_usb);
- break;
- case USB_MODE_DISCONNECT:
- omap_control_usb_set_sessionend(ctrl_usb);
- break;
- default:
- dev_vdbg(dev, "invalid omap control usb mode\n");
- }
-}
-EXPORT_SYMBOL_GPL(omap_control_usb_set_mode);
-
-#ifdef CONFIG_OF
-
-static const enum omap_control_usb_type otghs_data = OMAP_CTRL_TYPE_OTGHS;
-static const enum omap_control_usb_type usb2_data = OMAP_CTRL_TYPE_USB2;
-static const enum omap_control_usb_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
-static const enum omap_control_usb_type dra7usb2_data = OMAP_CTRL_TYPE_DRA7USB2;
-static const enum omap_control_usb_type am437usb2_data = OMAP_CTRL_TYPE_AM437USB2;
-
-static const struct of_device_id omap_control_usb_id_table[] = {
- {
- .compatible = "ti,control-phy-otghs",
- .data = &otghs_data,
- },
- {
- .compatible = "ti,control-phy-usb2",
- .data = &usb2_data,
- },
- {
- .compatible = "ti,control-phy-pipe3",
- .data = &pipe3_data,
- },
- {
- .compatible = "ti,control-phy-dra7usb2",
- .data = &dra7usb2_data,
- },
- {
- .compatible = "ti,control-phy-am437usb2",
- .data = &am437usb2_data,
- },
- {},
-};
-MODULE_DEVICE_TABLE(of, omap_control_usb_id_table);
-#endif
-
-
-static int omap_control_usb_probe(struct platform_device *pdev)
-{
- struct resource *res;
- const struct of_device_id *of_id;
- struct omap_control_usb *control_usb;
-
- of_id = of_match_device(of_match_ptr(omap_control_usb_id_table),
- &pdev->dev);
- if (!of_id)
- return -EINVAL;
-
- control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),
- GFP_KERNEL);
- if (!control_usb) {
- dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
- return -ENOMEM;
- }
-
- control_usb->dev = &pdev->dev;
- control_usb->type = *(enum omap_control_usb_type *)of_id->data;
-
- if (control_usb->type == OMAP_CTRL_TYPE_OTGHS) {
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
- "otghs_control");
- control_usb->otghs_control = devm_ioremap_resource(
- &pdev->dev, res);
- if (IS_ERR(control_usb->otghs_control))
- return PTR_ERR(control_usb->otghs_control);
- } else {
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
- "power");
- control_usb->power = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(control_usb->power)) {
- dev_err(&pdev->dev, "Couldn't get power register\n");
- return PTR_ERR(control_usb->power);
- }
- }
-
- if (control_usb->type == OMAP_CTRL_TYPE_PIPE3) {
- control_usb->sys_clk = devm_clk_get(control_usb->dev,
- "sys_clkin");
- if (IS_ERR(control_usb->sys_clk)) {
- pr_err("%s: unable to get sys_clkin\n", __func__);
- return -EINVAL;
- }
- }
-
- dev_set_drvdata(control_usb->dev, control_usb);
-
- return 0;
-}
-
-static struct platform_driver omap_control_usb_driver = {
- .probe = omap_control_usb_probe,
- .driver = {
- .name = "omap-control-usb",
- .owner = THIS_MODULE,
- .of_match_table = of_match_ptr(omap_control_usb_id_table),
- },
-};
-
-static int __init omap_control_usb_init(void)
-{
- return platform_driver_register(&omap_control_usb_driver);
-}
-subsys_initcall(omap_control_usb_init);
-
-static void __exit omap_control_usb_exit(void)
-{
- platform_driver_unregister(&omap_control_usb_driver);
-}
-module_exit(omap_control_usb_exit);
-
-MODULE_ALIAS("platform: omap_control_usb");
-MODULE_AUTHOR("Texas Instruments Inc.");
-MODULE_DESCRIPTION("OMAP Control Module USB Driver");
-MODULE_LICENSE("GPL v2");
diff --git a/include/linux/phy/omap_control_phy.h b/include/linux/phy/omap_control_phy.h
new file mode 100644
index 0000000..5450403
--- /dev/null
+++ b/include/linux/phy/omap_control_phy.h
@@ -0,0 +1,89 @@
+/*
+ * omap_control_phy.h - Header file for the PHY part of control module.
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: Kishon Vijay Abraham I <kishon@ti.com>
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __OMAP_CONTROL_PHY_H__
+#define __OMAP_CONTROL_PHY_H__
+
+enum omap_control_phy_type {
+ OMAP_CTRL_TYPE_OTGHS = 1, /* Mailbox OTGHS_CONTROL */
+ OMAP_CTRL_TYPE_USB2, /* USB2_PHY, power down in CONTROL_DEV_CONF */
+ OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & seperate Rx/Tx power */
+ OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */
+ OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
+};
+
+struct omap_control_phy {
+ struct device *dev;
+
+ u32 __iomem *otghs_control;
+ u32 __iomem *power;
+ u32 __iomem *power_aux;
+
+ struct clk *sys_clk;
+
+ enum omap_control_phy_type type;
+};
+
+enum omap_control_usb_mode {
+ USB_MODE_UNDEFINED = 0,
+ USB_MODE_HOST,
+ USB_MODE_DEVICE,
+ USB_MODE_DISCONNECT,
+};
+
+#define OMAP_CTRL_DEV_PHY_PD BIT(0)
+
+#define OMAP_CTRL_DEV_AVALID BIT(0)
+#define OMAP_CTRL_DEV_BVALID BIT(1)
+#define OMAP_CTRL_DEV_VBUSVALID BIT(2)
+#define OMAP_CTRL_DEV_SESSEND BIT(3)
+#define OMAP_CTRL_DEV_IDDIG BIT(4)
+
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 0xE
+
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC00000
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT 0x16
+
+#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON 0x3
+#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF 0x0
+
+#define OMAP_CTRL_USB2_PHY_PD BIT(28)
+
+#define AM437X_CTRL_USB2_PHY_PD BIT(0)
+#define AM437X_CTRL_USB2_OTG_PD BIT(1)
+#define AM437X_CTRL_USB2_OTGVDET_EN BIT(19)
+#define AM437X_CTRL_USB2_OTGSESSEND_EN BIT(20)
+
+#if IS_ENABLED(CONFIG_OMAP_CONTROL_PHY)
+void omap_control_phy_power(struct device *dev, int on);
+void omap_control_usb_set_mode(struct device *dev,
+ enum omap_control_usb_mode mode);
+#else
+
+static inline void omap_control_phy_power(struct device *dev, int on)
+{
+}
+
+static inline void omap_control_usb_set_mode(struct device *dev,
+ enum omap_control_usb_mode mode)
+{
+}
+#endif
+
+#endif /* __OMAP_CONTROL_PHY_H__ */
diff --git a/include/linux/usb/omap_control_usb.h b/include/linux/usb/omap_control_usb.h
deleted file mode 100644
index 69ae383..0000000
--- a/include/linux/usb/omap_control_usb.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * omap_control_usb.h - Header file for the USB part of control module.
- *
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * Author: Kishon Vijay Abraham I <kishon@ti.com>
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __OMAP_CONTROL_USB_H__
-#define __OMAP_CONTROL_USB_H__
-
-enum omap_control_usb_type {
- OMAP_CTRL_TYPE_OTGHS = 1, /* Mailbox OTGHS_CONTROL */
- OMAP_CTRL_TYPE_USB2, /* USB2_PHY, power down in CONTROL_DEV_CONF */
- OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & seperate Rx/Tx power */
- OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */
- OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
-};
-
-struct omap_control_usb {
- struct device *dev;
-
- u32 __iomem *otghs_control;
- u32 __iomem *power;
- u32 __iomem *power_aux;
-
- struct clk *sys_clk;
-
- enum omap_control_usb_type type;
-};
-
-enum omap_control_usb_mode {
- USB_MODE_UNDEFINED = 0,
- USB_MODE_HOST,
- USB_MODE_DEVICE,
- USB_MODE_DISCONNECT,
-};
-
-#define OMAP_CTRL_DEV_PHY_PD BIT(0)
-
-#define OMAP_CTRL_DEV_AVALID BIT(0)
-#define OMAP_CTRL_DEV_BVALID BIT(1)
-#define OMAP_CTRL_DEV_VBUSVALID BIT(2)
-#define OMAP_CTRL_DEV_SESSEND BIT(3)
-#define OMAP_CTRL_DEV_IDDIG BIT(4)
-
-#define OMAP_CTRL_USB_PWRCTL_CLK_CMD_MASK 0x003FC000
-#define OMAP_CTRL_USB_PWRCTL_CLK_CMD_SHIFT 0xE
-
-#define OMAP_CTRL_USB_PWRCTL_CLK_FREQ_MASK 0xFFC00000
-#define OMAP_CTRL_USB_PWRCTL_CLK_FREQ_SHIFT 0x16
-
-#define OMAP_CTRL_USB3_PHY_TX_RX_POWERON 0x3
-#define OMAP_CTRL_USB3_PHY_TX_RX_POWEROFF 0x0
-
-#define OMAP_CTRL_USB2_PHY_PD BIT(28)
-
-#define AM437X_CTRL_USB2_PHY_PD BIT(0)
-#define AM437X_CTRL_USB2_OTG_PD BIT(1)
-#define AM437X_CTRL_USB2_OTGVDET_EN BIT(19)
-#define AM437X_CTRL_USB2_OTGSESSEND_EN BIT(20)
-
-#if IS_ENABLED(CONFIG_OMAP_CONTROL_USB)
-extern void omap_control_usb_phy_power(struct device *dev, int on);
-extern void omap_control_usb_set_mode(struct device *dev,
- enum omap_control_usb_mode mode);
-#else
-
-static inline void omap_control_usb_phy_power(struct device *dev, int on)
-{
-}
-
-static inline void omap_control_usb_set_mode(struct device *dev,
- enum omap_control_usb_mode mode)
-{
-}
-#endif
-
-#endif /* __OMAP_CONTROL_USB_H__ */
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH 01/12] phy: rename struct omap_control_usb to struct omap_control_phy
2014-03-03 15:07 ` [PATCH 01/12] phy: rename struct omap_control_usb to struct omap_control_phy Roger Quadros
@ 2014-03-04 9:26 ` Kishon Vijay Abraham I
0 siblings, 0 replies; 24+ messages in thread
From: Kishon Vijay Abraham I @ 2014-03-04 9:26 UTC (permalink / raw)
To: Roger Quadros
Cc: devicetree, george.cherian, balajitk, linux-ide, tony, linux-usb,
linux-kernel, balbi, hdegoede, linux-omap, linux-arm-kernel
Roger,
On Monday 03 March 2014 08:37 PM, Roger Quadros wrote:
> From: Kishon Vijay Abraham I <kishon@ti.com>
>
> Rename struct omap_control_usb to struct omap_control_phy since it can
> be used to control PHY of USB, SATA and PCIE. Also move the driver and
> include files under *phy* and made the corresponding changes in the users
> of phy-omap-control.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
> drivers/phy/Kconfig | 14 +-
> drivers/phy/Makefile | 1 +
> drivers/phy/phy-omap-control.c | 320 +++++++++++++++++++++++++++++++++++
> drivers/phy/phy-omap-usb2.c | 8 +-
> drivers/phy/phy-ti-pipe3.c | 8 +-
> drivers/usb/musb/omap2430.c | 2 +-
> drivers/usb/phy/Kconfig | 10 --
> drivers/usb/phy/Makefile | 1 -
> drivers/usb/phy/phy-omap-control.c | 319 ----------------------------------
> include/linux/phy/omap_control_phy.h | 89 ++++++++++
> include/linux/usb/omap_control_usb.h | 89 ----------
> 11 files changed, 431 insertions(+), 430 deletions(-)
> create mode 100644 drivers/phy/phy-omap-control.c
> delete mode 100644 drivers/usb/phy/phy-omap-control.c
> create mode 100644 include/linux/phy/omap_control_phy.h
> delete mode 100644 include/linux/usb/omap_control_usb.h
you can use git format-patch -M if a file is moved from one place to
another. The diff count will be less in that case and reviewing will be
easier ;-)
Cheers
Kishon
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 02/12] phy: omap-control: Update DT binding information
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
2014-03-03 15:07 ` [PATCH 01/12] phy: rename struct omap_control_usb to struct omap_control_phy Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 19:02 ` Tony Lindgren
2014-03-03 15:07 ` [PATCH 03/12] phy: ti-pipe3: cleanup clock handling Roger Quadros
` (9 subsequent siblings)
11 siblings, 1 reply; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq
Move omap-control binding information to the right location.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 25 ++++++++++++++++++++++
Documentation/devicetree/bindings/usb/omap-usb.txt | 24 ---------------------
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 207e14c..41dc132 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -1,5 +1,30 @@
TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
+OMAP CONTROL PHY
+
+Required properties:
+ - compatible: Should be one of
+ "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
+ "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
+ e.g. USB2_PHY on OMAP5.
+ "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
+ e.g. USB3 PHY and SATA PHY on OMAP5.
+ "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
+ DRA7 platform.
+ "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
+ AM437 platform.
+ - reg : Address and length of the register set for the device. It contains
+ the address of "otghs_control" for control-phy-otghs or "power" register
+ for other types.
+ - reg-names: should be "otghs_control" control-phy-otghs and "power" for
+ other types.
+
+omap_control_usb: omap-control-usb@4a002300 {
+ compatible = "ti,control-phy-otghs";
+ reg = <0x4a00233c 0x4>;
+ reg-names = "otghs_control";
+};
+
OMAP USB2 PHY
Required properties:
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt b/Documentation/devicetree/bindings/usb/omap-usb.txt
index c495135..38b2fae 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -76,27 +76,3 @@ omap_dwc3 {
ranges;
};
-OMAP CONTROL USB
-
-Required properties:
- - compatible: Should be one of
- "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
- "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
- e.g. USB2_PHY on OMAP5.
- "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
- e.g. USB3 PHY and SATA PHY on OMAP5.
- "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
- DRA7 platform.
- "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
- AM437 platform.
- - reg : Address and length of the register set for the device. It contains
- the address of "otghs_control" for control-phy-otghs or "power" register
- for other types.
- - reg-names: should be "otghs_control" control-phy-otghs and "power" for
- other types.
-
-omap_control_usb: omap-control-usb@4a002300 {
- compatible = "ti,control-phy-otghs";
- reg = <0x4a00233c 0x4>;
- reg-names = "otghs_control";
-};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH 02/12] phy: omap-control: Update DT binding information
2014-03-03 15:07 ` [PATCH 02/12] phy: omap-control: Update DT binding information Roger Quadros
@ 2014-03-03 19:02 ` Tony Lindgren
2014-03-04 9:14 ` Roger Quadros
0 siblings, 1 reply; 24+ messages in thread
From: Tony Lindgren @ 2014-03-03 19:02 UTC (permalink / raw)
To: Roger Quadros
Cc: kishon, balbi, george.cherian, balajitk, hdegoede, linux-omap,
linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-ide
* Roger Quadros <rogerq@ti.com> [140303 07:10]:
> Move omap-control binding information to the right location.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
> Documentation/devicetree/bindings/phy/ti-phy.txt | 25 ++++++++++++++++++++++
> Documentation/devicetree/bindings/usb/omap-usb.txt | 24 ---------------------
> 2 files changed, 25 insertions(+), 24 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
> index 207e14c..41dc132 100644
> --- a/Documentation/devicetree/bindings/phy/ti-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
> @@ -1,5 +1,30 @@
> TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
>
> +OMAP CONTROL PHY
> +
> +Required properties:
> + - compatible: Should be one of
> + "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
> + "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
> + e.g. USB2_PHY on OMAP5.
> + "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
> + e.g. USB3 PHY and SATA PHY on OMAP5.
> + "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
> + DRA7 platform.
> + "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
> + AM437 platform.
To me it seems that you can leave out all the above. You can set these falgs
flags directly in the driver based on the compatible flag. Then just initialize
the .data in the driver based on the compatible flag.
> + - reg : Address and length of the register set for the device. It contains
> + the address of "otghs_control" for control-phy-otghs or "power" register
> + for other types.
> + - reg-names: should be "otghs_control" control-phy-otghs and "power" for
> + other types.
> +
> +omap_control_usb: omap-control-usb@4a002300 {
> + compatible = "ti,control-phy-otghs";
> + reg = <0x4a00233c 0x4>;
> + reg-names = "otghs_control";
> +};
Then you would instead have something like this:
compatible = "ti,am347-control-phy-otghs";
That way you can initialize things without a need for custom bindings.
Regards,
Tony
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH 02/12] phy: omap-control: Update DT binding information
2014-03-03 19:02 ` Tony Lindgren
@ 2014-03-04 9:14 ` Roger Quadros
[not found] ` <5315995F.5050206-l0cyMroinI0@public.gmane.org>
0 siblings, 1 reply; 24+ messages in thread
From: Roger Quadros @ 2014-03-04 9:14 UTC (permalink / raw)
To: Tony Lindgren
Cc: devicetree, george.cherian, balajitk, linux-ide, linux-usb,
linux-kernel, balbi, kishon, hdegoede, linux-omap,
linux-arm-kernel
Hi Tony,
On 03/03/2014 09:02 PM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [140303 07:10]:
>> Move omap-control binding information to the right location.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>> Documentation/devicetree/bindings/phy/ti-phy.txt | 25 ++++++++++++++++++++++
>> Documentation/devicetree/bindings/usb/omap-usb.txt | 24 ---------------------
>> 2 files changed, 25 insertions(+), 24 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
>> index 207e14c..41dc132 100644
>> --- a/Documentation/devicetree/bindings/phy/ti-phy.txt
>> +++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
>> @@ -1,5 +1,30 @@
>> TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
>>
>> +OMAP CONTROL PHY
>> +
>> +Required properties:
>> + - compatible: Should be one of
>> + "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
>> + "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
>> + e.g. USB2_PHY on OMAP5.
>> + "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
>> + e.g. USB3 PHY and SATA PHY on OMAP5.
>> + "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
>> + DRA7 platform.
>> + "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
>> + AM437 platform.
>
> To me it seems that you can leave out all the above. You can set these falgs
> flags directly in the driver based on the compatible flag. Then just initialize
> the .data in the driver based on the compatible flag.
I'm not sure if I got you. A single platform can have different type of phys.
e.g. OMAP5 has both usb2 and pipe3 PHYs,
DRA7 has both pipe3 and usb2 PHYs, but this usb2 PHY is not compatible with OMAP5 one
so we need a new compatible id for that.
To add to the woes, the designers were creative enough to make another mutation to
the USB2 PHY for AM437x, :(
What do you suggest the compatible ids should look like for these 5 types of PHY control?
OTGHS (OMAP4 & 5)
USB2 (OMAP5)
PIPE3 (OMAP5 & DRA7)
USB2x (DRA7)
USB2y (AM437)
cheers,
-roger
>
>> + - reg : Address and length of the register set for the device. It contains
>> + the address of "otghs_control" for control-phy-otghs or "power" register
>> + for other types.
>> + - reg-names: should be "otghs_control" control-phy-otghs and "power" for
>> + other types.
>> +
>> +omap_control_usb: omap-control-usb@4a002300 {
>> + compatible = "ti,control-phy-otghs";
>> + reg = <0x4a00233c 0x4>;
>> + reg-names = "otghs_control";
>> +};
>
> Then you would instead have something like this:
>
> compatible = "ti,am347-control-phy-otghs";
>
> That way you can initialize things without a need for custom bindings.
>
> Regards,
>
> Tony
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 03/12] phy: ti-pipe3: cleanup clock handling
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
2014-03-03 15:07 ` [PATCH 01/12] phy: rename struct omap_control_usb to struct omap_control_phy Roger Quadros
2014-03-03 15:07 ` [PATCH 02/12] phy: omap-control: Update DT binding information Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-04 9:29 ` Kishon Vijay Abraham I
2014-03-03 15:07 ` [PATCH 04/12] ARM: dts: omap5: Add clocks to usb3_phy node Roger Quadros
` (8 subsequent siblings)
11 siblings, 1 reply; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: devicetree, george.cherian, balajitk, linux-ide, linux-usb,
linux-kernel, hdegoede, linux-omap, linux-arm-kernel, rogerq
As this driver is no longer USB specific, use generic clock names.
- Fix PLL_SD_SHIFT from 9 to 10
- As optclk and wkupclk may not be always required, don't bail out
if they aren't available.
- Don't separate prepare/unprepare clock from enable/disable. This
ensures optimal power savings.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
drivers/phy/phy-ti-pipe3.c | 57 ++++++++++++++++++++++------------------------
1 file changed, 27 insertions(+), 30 deletions(-)
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 54859fc..3662e28 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -45,7 +45,7 @@
#define PLL_SELFREQDCO_MASK 0x0000000E
#define PLL_SELFREQDCO_SHIFT 0x1
#define PLL_SD_MASK 0x0003FC00
-#define PLL_SD_SHIFT 0x9
+#define PLL_SD_SHIFT 10
#define SET_PLL_GO 0x1
#define PLL_TICOPWDN 0x10000
#define PLL_LOCK 0x2
@@ -270,23 +270,17 @@ static int ti_pipe3_probe(struct platform_device *pdev)
phy->dev = &pdev->dev;
- phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k");
- if (IS_ERR(phy->wkupclk)) {
- dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n");
- return PTR_ERR(phy->wkupclk);
- }
- clk_prepare(phy->wkupclk);
+ phy->wkupclk = devm_clk_get(phy->dev, "wkupclk");
+ if (IS_ERR(phy->wkupclk))
+ dev_dbg(&pdev->dev, "unable to get wkupclk\n");
- phy->optclk = devm_clk_get(phy->dev, "usb_otg_ss_refclk960m");
- if (IS_ERR(phy->optclk)) {
- dev_err(&pdev->dev, "unable to get usb_otg_ss_refclk960m\n");
- return PTR_ERR(phy->optclk);
- }
- clk_prepare(phy->optclk);
+ phy->optclk = devm_clk_get(phy->dev, "optclk");
+ if (IS_ERR(phy->optclk))
+ dev_dbg(&pdev->dev, "unable to get optclk\n");
- phy->sys_clk = devm_clk_get(phy->dev, "sys_clkin");
+ phy->sys_clk = devm_clk_get(phy->dev, "sysclk");
if (IS_ERR(phy->sys_clk)) {
- pr_err("%s: unable to get sys_clkin\n", __func__);
+ dev_err(&pdev->dev, "unable to get sysclk\n");
return -EINVAL;
}
@@ -326,10 +320,6 @@ static int ti_pipe3_probe(struct platform_device *pdev)
static int ti_pipe3_remove(struct platform_device *pdev)
{
- struct ti_pipe3 *phy = platform_get_drvdata(pdev);
-
- clk_unprepare(phy->wkupclk);
- clk_unprepare(phy->optclk);
if (!pm_runtime_suspended(&pdev->dev))
pm_runtime_put(&pdev->dev);
pm_runtime_disable(&pdev->dev);
@@ -343,8 +333,10 @@ static int ti_pipe3_runtime_suspend(struct device *dev)
{
struct ti_pipe3 *phy = dev_get_drvdata(dev);
- clk_disable(phy->wkupclk);
- clk_disable(phy->optclk);
+ if (!IS_ERR(phy->wkupclk))
+ clk_disable_unprepare(phy->wkupclk);
+ if (!IS_ERR(phy->optclk))
+ clk_disable_unprepare(phy->optclk);
return 0;
}
@@ -354,22 +346,27 @@ static int ti_pipe3_runtime_resume(struct device *dev)
u32 ret = 0;
struct ti_pipe3 *phy = dev_get_drvdata(dev);
- ret = clk_enable(phy->optclk);
- if (ret) {
- dev_err(phy->dev, "Failed to enable optclk %d\n", ret);
- goto err1;
+ if (!IS_ERR(phy->optclk)) {
+ ret = clk_prepare_enable(phy->optclk);
+ if (ret) {
+ dev_err(phy->dev, "Failed to enable optclk %d\n", ret);
+ goto err1;
+ }
}
- ret = clk_enable(phy->wkupclk);
- if (ret) {
- dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);
- goto err2;
+ if (!IS_ERR(phy->wkupclk)) {
+ ret = clk_prepare_enable(phy->wkupclk);
+ if (ret) {
+ dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);
+ goto err2;
+ }
}
return 0;
err2:
- clk_disable(phy->optclk);
+ if (!IS_ERR(phy->optclk))
+ clk_disable_unprepare(phy->optclk);
err1:
return ret;
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH 03/12] phy: ti-pipe3: cleanup clock handling
2014-03-03 15:07 ` [PATCH 03/12] phy: ti-pipe3: cleanup clock handling Roger Quadros
@ 2014-03-04 9:29 ` Kishon Vijay Abraham I
2014-03-04 9:33 ` Roger Quadros
0 siblings, 1 reply; 24+ messages in thread
From: Kishon Vijay Abraham I @ 2014-03-04 9:29 UTC (permalink / raw)
To: Roger Quadros
Cc: balbi, tony, george.cherian, balajitk, hdegoede, linux-omap,
linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-ide
Hi,
On Monday 03 March 2014 08:37 PM, Roger Quadros wrote:
> As this driver is no longer USB specific, use generic clock names.
> - Fix PLL_SD_SHIFT from 9 to 10
> - As optclk and wkupclk may not be always required, don't bail out
> if they aren't available.
I think here too we face the same problem as for PHY. What if a
particular platform needs a clock but is not available. I don't want
this to be blocking though.
Thanks
Kishon
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 03/12] phy: ti-pipe3: cleanup clock handling
2014-03-04 9:29 ` Kishon Vijay Abraham I
@ 2014-03-04 9:33 ` Roger Quadros
0 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-04 9:33 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: devicetree, george.cherian, balajitk, linux-ide, tony, linux-usb,
linux-kernel, balbi, hdegoede, linux-omap, linux-arm-kernel
On 03/04/2014 11:29 AM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Monday 03 March 2014 08:37 PM, Roger Quadros wrote:
>> As this driver is no longer USB specific, use generic clock names.
>> - Fix PLL_SD_SHIFT from 9 to 10
>> - As optclk and wkupclk may not be always required, don't bail out
>> if they aren't available.
>
> I think here too we face the same problem as for PHY. What if a particular platform needs a clock but is not available. I don't want this to be blocking though.
Since we know for sure what clocks the different TI PHYs need, we could do the checks based on compatible id and always fail on clock error.
cheers,
-roger
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 04/12] ARM: dts: omap5: Add clocks to usb3_phy node
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (2 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 03/12] phy: ti-pipe3: cleanup clock handling Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 15:07 ` [PATCH 05/12] phy: ti-pipe3: Add SATA DPLL support Roger Quadros
` (7 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq,
Benoît Cousson
The pipe3-phy driver expects certain named clocks.
Provide the necessary clocks.
CC: Benoît Cousson <bcousson@baylibre.com>
CC: Tony Lindgren <tony@atomide.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 1c68558..a7f5930 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -760,6 +760,8 @@
<0x4a084c00 0x40>;
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
ctrl-module = <&omap_control_usb3phy>;
+ clocks = <&usb_phy_cm_clk32k>, <&sys_clkin>;
+ clock-names = "wkupclk", "sysclk";
#phy-cells = <0>;
};
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 05/12] phy: ti-pipe3: Add SATA DPLL support
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (3 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 04/12] ARM: dts: omap5: Add clocks to usb3_phy node Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 15:07 ` [PATCH 06/12] phy: omap: Select OMAP_OCP2SCP bus driver Roger Quadros
` (6 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: devicetree, george.cherian, balajitk, linux-ide, linux-usb,
linux-kernel, hdegoede, linux-omap, linux-arm-kernel, rogerq
USB and SATA DPLLs need different settings. Provide
the SATA DPLL settings and use the proper DPLL settings
based on device tree node's compatible_id.
Update the DT binding information.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 3 +-
drivers/phy/phy-ti-pipe3.c | 76 +++++++++++++++++-------
2 files changed, 57 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 41dc132..6a65081 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -49,7 +49,8 @@ usb2phy@4a0ad080 {
TI PIPE3 PHY
Required properties:
- - compatible: Should be "ti,phy-usb3". "ti,omap-usb3" is deprecated.
+ - compatible: Should be "ti,phy-usb3" or "ti,phy-pipe3-sata".
+ "ti,omap-usb3" is deprecated.
- reg : Address and length of the register set for the device.
- reg-names: The names of the register addresses corresponding to the registers
filled in "reg".
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 3662e28..ee8871d 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -66,6 +66,11 @@ struct pipe3_dpll_params {
u32 mf;
};
+struct pipe3_dpll_map {
+ unsigned long rate;
+ struct pipe3_dpll_params params;
+};
+
struct ti_pipe3 {
void __iomem *pll_ctrl_base;
struct device *dev;
@@ -73,20 +78,27 @@ struct ti_pipe3 {
struct clk *wkupclk;
struct clk *sys_clk;
struct clk *optclk;
+ struct pipe3_dpll_map *dpll_map;
};
-struct pipe3_dpll_map {
- unsigned long rate;
- struct pipe3_dpll_params params;
-};
-
-static struct pipe3_dpll_map dpll_map[] = {
+static struct pipe3_dpll_map dpll_map_usb[] = {
{12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */
{16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */
{19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */
{20000000, {1000, 7, 4, 10, 0} }, /* 20 MHz */
{26000000, {1250, 12, 4, 20, 0} }, /* 26 MHz */
{38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */
+ { }, /* Terminator */
+};
+
+static struct pipe3_dpll_map dpll_map_sata[] = {
+ {12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */
+ {16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
+ {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
+ {20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */
+ {26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */
+ {38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
+ { }, /* Terminator */
};
static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
@@ -100,15 +112,20 @@ static inline void ti_pipe3_writel(void __iomem *addr, unsigned offset,
__raw_writel(data, addr + offset);
}
-static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
+static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
{
- int i;
+ unsigned long rate;
+ struct pipe3_dpll_map *dpll_map = phy->dpll_map;
- for (i = 0; i < ARRAY_SIZE(dpll_map); i++) {
- if (rate == dpll_map[i].rate)
- return &dpll_map[i].params;
+ rate = clk_get_rate(phy->sys_clk);
+
+ for (; dpll_map->rate; dpll_map++) {
+ if (rate == dpll_map->rate)
+ return &dpll_map->params;
}
+ dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);
+
return NULL;
}
@@ -182,16 +199,11 @@ static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
{
u32 val;
- unsigned long rate;
struct pipe3_dpll_params *dpll_params;
- rate = clk_get_rate(phy->sys_clk);
- dpll_params = ti_pipe3_get_dpll_params(rate);
- if (!dpll_params) {
- dev_err(phy->dev,
- "No DPLL configuration for %lu Hz SYS CLK\n", rate);
+ dpll_params = ti_pipe3_get_dpll_params(phy);
+ if (!dpll_params)
return -EINVAL;
- }
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
val &= ~PLL_REGN_MASK;
@@ -244,6 +256,10 @@ static struct phy_ops ops = {
.owner = THIS_MODULE,
};
+#ifdef CONFIG_OF
+static const struct of_device_id ti_pipe3_id_table[];
+#endif
+
static int ti_pipe3_probe(struct platform_device *pdev)
{
struct ti_pipe3 *phy;
@@ -253,8 +269,10 @@ static int ti_pipe3_probe(struct platform_device *pdev)
struct device_node *node = pdev->dev.of_node;
struct device_node *control_node;
struct platform_device *control_pdev;
+ const struct of_device_id *match;
- if (!node)
+ match = of_match_device(of_match_ptr(ti_pipe3_id_table), &pdev->dev);
+ if (!match)
return -EINVAL;
phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
@@ -263,6 +281,12 @@ static int ti_pipe3_probe(struct platform_device *pdev)
return -ENOMEM;
}
+ phy->dpll_map = (struct pipe3_dpll_map *)match->data;
+ if (!phy->dpll_map) {
+ dev_err(&pdev->dev, "no DPLL data\n");
+ return -EINVAL;
+ }
+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pll_ctrl");
phy->pll_ctrl_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(phy->pll_ctrl_base))
@@ -384,8 +408,18 @@ static const struct dev_pm_ops ti_pipe3_pm_ops = {
#ifdef CONFIG_OF
static const struct of_device_id ti_pipe3_id_table[] = {
- { .compatible = "ti,phy-usb3" },
- { .compatible = "ti,omap-usb3" },
+ {
+ .compatible = "ti,phy-usb3",
+ .data = dpll_map_usb,
+ },
+ {
+ .compatible = "ti,omap-usb3",
+ .data = dpll_map_usb,
+ },
+ {
+ .compatible = "ti,phy-pipe3-sata",
+ .data = dpll_map_sata,
+ },
{}
};
MODULE_DEVICE_TABLE(of, ti_pipe3_id_table);
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 06/12] phy: omap: Select OMAP_OCP2SCP bus driver
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (4 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 05/12] phy: ti-pipe3: Add SATA DPLL support Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 18:52 ` Tony Lindgren
2014-03-03 15:07 ` [PATCH 07/12] ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods Roger Quadros
` (5 subsequent siblings)
11 siblings, 1 reply; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq
The OMAP_USB2 and OMAP_PIP3 phy devices will not be
detected if the OMAP_OCP2SCP driver is not present.
So select it.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
drivers/phy/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 2f02ec8..afdab3e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -44,6 +44,7 @@ config OMAP_USB2
depends on USB_PHY
select GENERIC_PHY
select OMAP_CONTROL_PHY
+ select OMAP_OCP2SCP
help
Enable this to support the transceiver that is part of SOC. This
driver takes care of all the PHY functionality apart from comparator.
@@ -55,6 +56,7 @@ config TI_PIPE3
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
select OMAP_CONTROL_PHY
+ select OMAP_OCP2SCP
help
Enable this to support the PIPE3 PHY that is part of TI SOCs. This
driver takes care of all the PHY functionality apart from comparator.
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH 06/12] phy: omap: Select OMAP_OCP2SCP bus driver
2014-03-03 15:07 ` [PATCH 06/12] phy: omap: Select OMAP_OCP2SCP bus driver Roger Quadros
@ 2014-03-03 18:52 ` Tony Lindgren
2014-03-04 9:21 ` Roger Quadros
0 siblings, 1 reply; 24+ messages in thread
From: Tony Lindgren @ 2014-03-03 18:52 UTC (permalink / raw)
To: Roger Quadros
Cc: kishon, balbi, george.cherian, balajitk, hdegoede, linux-omap,
linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-ide
* Roger Quadros <rogerq@ti.com> [140303 07:11]:
> The OMAP_USB2 and OMAP_PIP3 phy devices will not be
> detected if the OMAP_OCP2SCP driver is not present.
> So select it.
Selecting drivers like this will easily lead into missing
dependencies. Especially it's bad for tristate driver
options that people may want to have as loadable modules.
How about instead depends on OMAP_OCP2SCP?
Regards,
Tony
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
> drivers/phy/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 2f02ec8..afdab3e 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -44,6 +44,7 @@ config OMAP_USB2
> depends on USB_PHY
> select GENERIC_PHY
> select OMAP_CONTROL_PHY
> + select OMAP_OCP2SCP
> help
> Enable this to support the transceiver that is part of SOC. This
> driver takes care of all the PHY functionality apart from comparator.
> @@ -55,6 +56,7 @@ config TI_PIPE3
> depends on ARCH_OMAP2PLUS || COMPILE_TEST
> select GENERIC_PHY
> select OMAP_CONTROL_PHY
> + select OMAP_OCP2SCP
> help
> Enable this to support the PIPE3 PHY that is part of TI SOCs. This
> driver takes care of all the PHY functionality apart from comparator.
> --
> 1.8.3.2
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 06/12] phy: omap: Select OMAP_OCP2SCP bus driver
2014-03-03 18:52 ` Tony Lindgren
@ 2014-03-04 9:21 ` Roger Quadros
0 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-04 9:21 UTC (permalink / raw)
To: Tony Lindgren
Cc: kishon, balbi, george.cherian, balajitk, hdegoede, linux-omap,
linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-ide
On 03/03/2014 08:52 PM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [140303 07:11]:
>> The OMAP_USB2 and OMAP_PIP3 phy devices will not be
>> detected if the OMAP_OCP2SCP driver is not present.
>> So select it.
>
> Selecting drivers like this will easily lead into missing
> dependencies. Especially it's bad for tristate driver
> options that people may want to have as loadable modules.
>
> How about instead depends on OMAP_OCP2SCP?
OK, 'depends' seems fine.
cheers,
-roger
>
>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>> drivers/phy/Kconfig | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
>> index 2f02ec8..afdab3e 100644
>> --- a/drivers/phy/Kconfig
>> +++ b/drivers/phy/Kconfig
>> @@ -44,6 +44,7 @@ config OMAP_USB2
>> depends on USB_PHY
>> select GENERIC_PHY
>> select OMAP_CONTROL_PHY
>> + select OMAP_OCP2SCP
>> help
>> Enable this to support the transceiver that is part of SOC. This
>> driver takes care of all the PHY functionality apart from comparator.
>> @@ -55,6 +56,7 @@ config TI_PIPE3
>> depends on ARCH_OMAP2PLUS || COMPILE_TEST
>> select GENERIC_PHY
>> select OMAP_CONTROL_PHY
>> + select OMAP_OCP2SCP
>> help
>> Enable this to support the PIPE3 PHY that is part of TI SOCs. This
>> driver takes care of all the PHY functionality apart from comparator.
>> --
>> 1.8.3.2
>>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 07/12] ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (5 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 06/12] phy: omap: Select OMAP_OCP2SCP bus driver Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 15:07 ` [PATCH 08/12] ARM: dts: omap5: add sata node Roger Quadros
` (4 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq,
Benoit Cousson, Paul Walmsley
From: Keshava Munegowda <keshava_mgowda@ti.com>
Create hwmods for ocp2scp3 and sata modules.
[Roger Q] Clean up.
CC: Benoit Cousson <bcousson@baylibre.com>
CC: Paul Walmsley <paul@pwsan.com>
CC: Tony Lindgren <tony@atomide.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 73 ++++++++++++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index e297d62..227a69f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1726,6 +1726,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
},
};
+/*
+ * 'ocp2scp' class
+ * bridge to transform ocp interface protocol to scp (serial control port)
+ * protocol
+ */
+/* ocp2scp3 */
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
+/* l4_cfg -> ocp2scp3 */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
+ .master = &omap54xx_l4_cfg_hwmod,
+ .slave = &omap54xx_ocp2scp3_hwmod,
+ .clk = "l4_root_clk_div",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
+ .name = "ocp2scp3",
+ .class = &omap54xx_ocp2scp_hwmod_class,
+ .clkdm_name = "l3init_clkdm",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+ .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
+ },
+ },
+};
+
+/*
+ * 'sata' class
+ * sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
+ */
+
+static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
+ .sysc_offs = 0x0000,
+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+ .sysc_fields = &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
+ .name = "sata",
+ .sysc = &omap54xx_sata_sysc,
+};
+
+/* sata */
+static struct omap_hwmod omap54xx_sata_hwmod = {
+ .name = "sata",
+ .class = &omap54xx_sata_hwmod_class,
+ .clkdm_name = "l3init_clkdm",
+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+ .main_clk = "func_48m_fclk",
+ .mpu_rt_idx = 1,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
+ .context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/* l4_cfg -> sata */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
+ .master = &omap54xx_l4_cfg_hwmod,
+ .slave = &omap54xx_sata_hwmod,
+ .clk = "l3_iclk_div",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
/*
* Interfaces
@@ -2399,6 +2470,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
&omap54xx_l4_cfg__usb_tll_hs,
&omap54xx_l4_cfg__usb_otg_ss,
&omap54xx_l4_wkup__wd_timer2,
+ &omap54xx_l4_cfg__ocp2scp3,
+ &omap54xx_l4_cfg__sata,
NULL,
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 08/12] ARM: dts: omap5: add sata node
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (6 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 07/12] ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 15:07 ` [PATCH 09/12] phy: ti-pipe3: streamline PHY operations Roger Quadros
` (3 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq,
Benoit Cousson
From: Balaji T K <balajitk@ti.com>
Add support for sata.
[Roger Q] Clean up.
CC: Benoit Cousson <bcousson@baylibre.com>
CC: Tony Lindgren <tony@atomide.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index a7f5930..8e55e97 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -806,6 +806,46 @@
#thermal-sensor-cells = <1>;
};
+
+ omap_control_sata: control-phy@4a002374 {
+ compatible = "ti,control-phy-pipe3";
+ reg = <0x4a002374 0x4>;
+ reg-names = "power";
+ clocks = <&sys_clkin>;
+ clock-names = "sysclk";
+ };
+
+ /* OCP2SCP3 */
+ ocp2scp@4a090000 {
+ compatible = "ti,omap-ocp2scp";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x4a090000 0x20>;
+ ranges;
+ ti,hwmods = "ocp2scp3";
+ sata_phy: phy@4a096000 {
+ compatible = "ti,phy-pipe3-sata";
+ reg = <0x4A096000 0x80>, /* phy_rx */
+ <0x4A096400 0x64>, /* phy_tx */
+ <0x4A096800 0x40>; /* pll_ctrl */
+ reg-names = "phy_rx", "phy_tx", "pll_ctrl";
+ ctrl-module = <&omap_control_sata>;
+ clocks = <&sys_clkin>;
+ clock-names = "sysclk";
+ #phy-cells = <0>;
+ };
+ };
+
+ sata: sata@4a141100 {
+ compatible = "snps,dwc-ahci";
+ reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&sata_phy>;
+ phy-names = "sata-phy";
+ clocks = <&sata_ref_clk>;
+ ti,hwmods = "sata";
+ };
+
};
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 09/12] phy: ti-pipe3: streamline PHY operations
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (7 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 08/12] ARM: dts: omap5: add sata node Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 15:07 ` [PATCH 10/12] phy: ti-pipe3: Fix suspend/resume and module reload Roger Quadros
` (2 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq
Limit .power_on() and .power_off() to just control the
PHY power and not the DPLL. The DPLL will be enabled
in .init() and idled in .exit().
Don't reprogram the DPLL if it has been already locked
by the bootloader. This fixes a problem with SATA, where
it fails if SATA was used by the bootloader.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
drivers/phy/phy-ti-pipe3.c | 114 +++++++++++++++++++++++++--------------------
1 file changed, 63 insertions(+), 51 deletions(-)
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index ee8871d..d3c085a 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -47,7 +47,8 @@
#define PLL_SD_MASK 0x0003FC00
#define PLL_SD_SHIFT 10
#define SET_PLL_GO 0x1
-#define PLL_TICOPWDN 0x10000
+#define PLL_LDOPWDN BIT(15)
+#define PLL_TICOPWDN BIT(16)
#define PLL_LOCK 0x2
#define PLL_IDLE 0x1
@@ -56,7 +57,8 @@
* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
* to be correctly reflected in the PIPE3PHY_PLL_STATUS register.
*/
-# define PLL_IDLE_TIME 100;
+#define PLL_IDLE_TIME 100 /* in milliseconds */
+#define PLL_LOCK_TIME 100 /* in milliseconds */
struct pipe3_dpll_params {
u16 m;
@@ -132,24 +134,6 @@ static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
static int ti_pipe3_power_off(struct phy *x)
{
struct ti_pipe3 *phy = phy_get_drvdata(x);
- int val;
- int timeout = PLL_IDLE_TIME;
-
- val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- val |= PLL_IDLE;
- ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
-
- do {
- val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if (val & PLL_TICOPWDN)
- break;
- udelay(5);
- } while (--timeout);
-
- if (!timeout) {
- dev_err(phy->dev, "power off failed\n");
- return -EBUSY;
- }
omap_control_phy_power(phy->control_dev, 0);
@@ -159,44 +143,34 @@ static int ti_pipe3_power_off(struct phy *x)
static int ti_pipe3_power_on(struct phy *x)
{
struct ti_pipe3 *phy = phy_get_drvdata(x);
- int val;
- int timeout = PLL_IDLE_TIME;
-
- val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- val &= ~PLL_IDLE;
- ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
- do {
- val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if (!(val & PLL_TICOPWDN))
- break;
- udelay(5);
- } while (--timeout);
-
- if (!timeout) {
- dev_err(phy->dev, "power on failed\n");
- return -EBUSY;
- }
+ omap_control_phy_power(phy->control_dev, 1);
return 0;
}
-static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
+static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)
{
u32 val;
unsigned long timeout;
- ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
-
- timeout = jiffies + msecs_to_jiffies(20);
+ timeout = jiffies + msecs_to_jiffies(PLL_LOCK_TIME);
do {
+ cpu_relax();
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
if (val & PLL_LOCK)
break;
- } while (!WARN_ON(time_after(jiffies, timeout)));
+ } while (!time_after(jiffies, timeout));
+
+ if (!(val & PLL_LOCK)) {
+ dev_err(phy->dev, "DPLL failed to lock\n");
+ return -EBUSY;
+ }
+
+ return 0;
}
-static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
+static int ti_pipe3_dpll_program(struct ti_pipe3 *phy)
{
u32 val;
struct pipe3_dpll_params *dpll_params;
@@ -230,27 +204,65 @@ static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
val |= dpll_params->sd << PLL_SD_SHIFT;
ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);
- ti_pipe3_dpll_relock(phy);
+ ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
- return 0;
+ return ti_pipe3_dpll_wait_lock(phy);
}
static int ti_pipe3_init(struct phy *x)
{
struct ti_pipe3 *phy = phy_get_drvdata(x);
- int ret;
+ u32 val;
+ int ret = 0;
- ret = ti_pipe3_dpll_lock(phy);
- if (ret)
- return ret;
+ /* Bring it out of IDLE if it is IDLE */
+ val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
+ if (val & PLL_IDLE) {
+ val &= ~PLL_IDLE;
+ ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
+ ret = ti_pipe3_dpll_wait_lock(phy);
+ }
- omap_control_phy_power(phy->control_dev, 1);
+ /* Program the DPLL only if not locked */
+ val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
+ if (!(val & PLL_LOCK))
+ if (ti_pipe3_dpll_program(phy))
+ return -EINVAL;
- return 0;
+ return ret;
}
+static int ti_pipe3_exit(struct phy *x)
+{
+ struct ti_pipe3 *phy = phy_get_drvdata(x);
+ u32 val;
+ unsigned long timeout;
+
+ /* Put DPLL in IDLE mode */
+ val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
+ val |= PLL_IDLE;
+ ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
+
+ /* wait for LDO and Oscillator to power down */
+ timeout = jiffies + msecs_to_jiffies(PLL_IDLE_TIME);
+ do {
+ cpu_relax();
+ val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
+ if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN))
+ break;
+ } while (!time_after(jiffies, timeout));
+
+ if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
+ dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n",
+ val);
+ return -EBUSY;
+ }
+
+ return 0;
+}
static struct phy_ops ops = {
.init = ti_pipe3_init,
+ .exit = ti_pipe3_exit,
.power_on = ti_pipe3_power_on,
.power_off = ti_pipe3_power_off,
.owner = THIS_MODULE,
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 10/12] phy: ti-pipe3: Fix suspend/resume and module reload
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (8 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 09/12] phy: ti-pipe3: streamline PHY operations Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 15:07 ` [PATCH 11/12] ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods Roger Quadros
2014-03-03 15:07 ` [PATCH 12/12] ARM: dts: dra7: add OCP2SCP3 and SATA nodes Roger Quadros
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq
Due to Errata i783, SATA breaks if its DPLL is idled. The recommeded
workaround to issue a softreset to the SATA controller doesn't seem to
work. Here we just prevent SATA DPLL from Idling and hence avoid
the issue altogether.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
drivers/phy/phy-ti-pipe3.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index d3c085a..611f7c3 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -238,6 +238,10 @@ static int ti_pipe3_exit(struct phy *x)
u32 val;
unsigned long timeout;
+ /* SATA DPLL can't be powered down due to Errata i783 */
+ if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata"))
+ return 0;
+
/* Put DPLL in IDLE mode */
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
val |= PLL_IDLE;
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 11/12] ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (9 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 10/12] phy: ti-pipe3: Fix suspend/resume and module reload Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
2014-03-03 15:07 ` [PATCH 12/12] ARM: dts: dra7: add OCP2SCP3 and SATA nodes Roger Quadros
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq,
Benoit Cousson, Paul Walmsley, Nikhil Devshatwar
From: Nikhil Devshatwar <nikhil.nd@ti.com>
Add hwmods for ocp2scp3 and sata modules.
[Roger Q] Clean up.
CC: Benoit Cousson <bcousson@baylibre.com>
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 41 +++++++++++++++++++++++++++----
1 file changed, 36 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 18f333c..c180b54 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,40 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
},
};
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
+static struct omap_hwmod_addr_space dra7xx_ocp2scp3_addrs[] = {
+ {
+ .name = "ocp2scp3",
+ .pa_start = 0x4a090000,
+ .pa_end = 0x4a09001f,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+/* l4_cfg -> ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+ .master = &dra7xx_l4_cfg_hwmod,
+ .slave = &dra7xx_ocp2scp3_hwmod,
+ .clk = "l4_root_clk_div",
+ .addr = dra7xx_ocp2scp3_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+ .name = "ocp2scp3",
+ .class = &dra7xx_ocp2scp_hwmod_class,
+ .clkdm_name = "l3init_clkdm",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+ .context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
+ },
+ },
+};
+
/*
* 'qspi' class
*
@@ -1268,9 +1302,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
};
/* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
- { .role = "ref_clk", .clk = "sata_ref_clk" },
-};
static struct omap_hwmod dra7xx_sata_hwmod = {
.name = "sata",
@@ -1278,6 +1309,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.clkdm_name = "l3init_clkdm",
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = "func_48m_fclk",
+ .mpu_rt_idx = 1,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1317,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
- .opt_clks = sata_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks),
};
/*
@@ -2683,6 +2713,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per1__mmc4,
&dra7xx_l4_cfg__mpu,
&dra7xx_l4_cfg__ocp2scp1,
+ &dra7xx_l4_cfg__ocp2scp3,
&dra7xx_l3_main_1__qspi,
&dra7xx_l4_cfg__sata,
&dra7xx_l4_cfg__smartreflex_core,
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 12/12] ARM: dts: dra7: add OCP2SCP3 and SATA nodes
2014-03-03 15:07 [PATCH 00/12] ARM: OMAP: SATA support for OMAP5 & DRA7 Roger Quadros
` (10 preceding siblings ...)
2014-03-03 15:07 ` [PATCH 11/12] ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods Roger Quadros
@ 2014-03-03 15:07 ` Roger Quadros
11 siblings, 0 replies; 24+ messages in thread
From: Roger Quadros @ 2014-03-03 15:07 UTC (permalink / raw)
To: kishon, balbi, tony
Cc: george.cherian, balajitk, hdegoede, linux-omap, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-ide, rogerq,
Benoit Cousson
From: Balaji T K <balajitk@ti.com>
Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.
[Roger Q] Clean up.
CC: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1fd75aa..74e44bc 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -621,6 +621,45 @@
dma-names = "tx0", "rx0";
status = "disabled";
};
+
+ omap_control_sata: control-phy@4a002374 {
+ compatible = "ti,control-phy-pipe3";
+ reg = <0x4a002374 0x4>;
+ reg-names = "power";
+ clocks = <&sys_clkin1>;
+ clock-names = "sysclk";
+ };
+
+ /* OCP2SCP3 */
+ ocp2scp@4a090000 {
+ compatible = "ti,omap-ocp2scp";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ reg = <0x4a090000 0x20>;
+ ti,hwmods = "ocp2scp3";
+ sata_phy: phy@4A096000 {
+ compatible = "ti,phy-pipe3-sata";
+ reg = <0x4A096000 0x80>, /* phy_rx */
+ <0x4A096400 0x64>, /* phy_tx */
+ <0x4A096800 0x40>; /* pll_ctrl */
+ reg-names = "phy_rx", "phy_tx", "pll_ctrl";
+ ctrl-module = <&omap_control_sata>;
+ clocks = <&sys_clkin1>;
+ clock-names = "sysclk";
+ #phy-cells = <0>;
+ };
+ };
+
+ sata: sata@4a141100 {
+ compatible = "snps,dwc-ahci";
+ reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&sata_phy>;
+ phy-names = "sata-phy";
+ clocks = <&sata_ref_clk>;
+ ti,hwmods = "sata";
+ };
};
};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 24+ messages in thread