From: Lee Jones <lee.jones@linaro.org>
To: Maxime Coquelin <maxime.coquelin@st.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Russell King <linux@arm.linux.org.uk>,
kernel@stlinux.com, Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Linus Walleij <linus.walleij@linaro.org>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>, Rob Landley <rob@landley.net>,
Kumar Gala <galak@codeaurora.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/5] pinctrl: st: Enhance the controller to manage unavailable registers
Date: Tue, 11 Mar 2014 11:13:26 +0000 [thread overview]
Message-ID: <20140311111326.GB21216@lee--X1> (raw)
In-Reply-To: <531EEBB9.1050405@st.com>
> >>>From: Giuseppe Cavallaro <peppe.cavallaro@st.com>
> >>>
> >>>This patch adds a new logic inside the st pinctrl to manage
> >>>an unsupported scenario: some sysconfig are not available!
> >>>
> >>>This is the case of STiH407 where, although documented, the
> >>>following registers from SYSCFG_FLASH have been removed from the SoC.
> >>>
> >>>SYSTEM_CONFIG3040
> >>> Output Enable pad control for all PIO Alternate Functions
> >>>and
> >>>SYSTEM_ CONFIG3050
> >>> Pull Up pad control for all PIO Alternate Functions
> >>>
> >>>Without managing this condition an imprecise external abort
> >>>will be detect.
> >>>
> >>>To do this the patch also reviews the st_parse_syscfgs
> >>>and other routines to manipulate the registers only if
> >>>actually available.
> >>>In any case, for example the st_parse_syscfgs detected
> >>>an error condition but no action was made in the
> >>>st_pctl_probe_dt.
> >>>
> >>>Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
> >>>Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
> >>>+
> >>>+static struct regmap_field *st_pc_get_value(struct device *dev,
> >>>+ struct regmap *regmap, int bank,
> >>>+ int data, int lsb, int msb)
> >>>+{
> >>>+ struct reg_field reg = REG_FIELD((data + bank) * 4, lsb, msb);
> >>>+
> >>>+ if (data < 0)
> >>>+ return NULL;
> >>
> >>What happens is data < 0 and it's used in REG_FIELD?
> >Nothing bad, but I agree this is not crystal clear.
> >
> >>Would it make more sense to make this check before calling REG_FIELD?
> >Yes, it will be done in the v4.
>
> Finally, I have to keep it as it was if I want this patch to compile.
Ah, why's that?
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
next prev parent reply other threads:[~2014-03-11 11:13 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-07 14:40 [PATCH v3 0/5] Add STiH407 SoC and reference board support Maxime COQUELIN
2014-03-07 14:40 ` [PATCH v3 1/5] ARM: STi: Add STiH407 SoC support Maxime COQUELIN
[not found] ` <1394203251-25361-2-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2014-03-10 12:34 ` Lee Jones
2014-03-11 13:56 ` Maxime Coquelin
2014-03-07 14:40 ` [PATCH v3 2/5] pinctrl: st: Enhance the controller to manage unavailable registers Maxime COQUELIN
2014-03-07 15:37 ` srinivas kandagatla
2014-03-10 9:17 ` Lee Jones
2014-03-11 8:18 ` Maxime Coquelin
2014-03-11 10:55 ` Maxime Coquelin
2014-03-11 11:13 ` Lee Jones [this message]
2014-03-11 11:12 ` Lee Jones
2014-03-07 14:40 ` [PATCH v3 3/5] pinctrl: st: add pinctrl support for the STiH407 SoC Maxime COQUELIN
2014-03-07 15:36 ` srinivas kandagatla
2014-03-10 14:44 ` Lee Jones
2014-03-11 8:52 ` Maxime Coquelin
[not found] ` <1394203251-25361-1-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2014-03-07 14:40 ` [PATCH v3 4/5] ARM: dts: Add STiH407 SoC support Maxime COQUELIN
[not found] ` <1394203251-25361-5-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2014-03-10 12:28 ` Lee Jones
2014-03-10 16:16 ` Lee Jones
2014-03-11 10:09 ` Maxime Coquelin
2014-03-07 14:40 ` [PATCH v3 5/5] ARM: dts: STiH407: Add B2120 board support Maxime COQUELIN
2014-03-10 12:37 ` Lee Jones
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