From mboxrd@z Thu Jan  1 00:00:00 1970
From: Liviu Dudau <Liviu.Dudau@arm.com>
Subject: Re: [PATCH v7 3/3] arm64: Add architecture support for PCI
Date: Mon, 17 Mar 2014 16:22:11 +0000
Message-ID: <20140317162211.GH6457@e106497-lin.cambridge.arm.com>
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To: Rob Herring <robherring2@gmail.com>
Cc: linux-pci <linux-pci@vger.kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Catalin Marinas <Catalin.Marinas@arm.com>, Will Deacon <Will.Deacon@arm.com>, Benjamin Herrenschmidt <benh@kernel.crashing.org>, linaro-kernel <linaro-kernel@lists.linaro.org>, Arnd Bergmann <arnd@arndb.de>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>, LAKML <linux-arm-kernel@lists.infradead.org>, Tanmay Inamdar <tinamdar@apm.com>
List-Id: devicetree@vger.kernel.org

On Mon, Mar 17, 2014 at 04:05:38PM +0000, Rob Herring wrote:
> On Fri, Mar 14, 2014 at 10:34 AM, Liviu Dudau <Liviu.Dudau@arm.com> w=
rote:
> > Use the generic host bridge functions to provide support for
> > PCI Express on arm64. There is no support for ISA memory.
> >
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > Tested-by: Tanmay Inamdar <tinamdar@apm.com>
> > ---
> >  arch/arm64/Kconfig            |  19 +++-
> >  arch/arm64/include/asm/Kbuild |   1 +
> >  arch/arm64/include/asm/io.h   |   3 +-
> >  arch/arm64/include/asm/pci.h  |  51 ++++++++++
> >  arch/arm64/kernel/Makefile    |   1 +
> >  arch/arm64/kernel/pci.c       | 173 ++++++++++++++++++++++++++++++=
++
> >  6 files changed, 246 insertions(+), 2 deletions(-)
> >  create mode 100644 arch/arm64/include/asm/pci.h
> >  create mode 100644 arch/arm64/kernel/pci.c
>=20
> [snip]
>=20
> > +#endif
> > +
> > +extern unsigned long pci_ioremap_io(const struct resource *res, ph=
ys_addr_t phys_addr);
>=20
> Can we at least align the function definition across architectures if
> not the implementation.

The choice of names is unfortunate. We are trying to follow the spirit =
of the
arch/arm function, not the implementation, and for RFC that served the =
purpose.

I'll come up with a better name as I don't intend to share the implemen=
tation
with arch/arm here.

Best regards,
Liviu

>=20
>=20
> > +int pci_register_io_range(phys_addr_t address, resource_size_t siz=
e)
> > +{
> > +       struct ioresource *res;
> > +       resource_size_t allocated_size =3D 0;
> > +
> > +       /* find if the range has not been already allocated */
> > +       list_for_each_entry(res, &io_list, list) {
> > +               if (address >=3D res->start &&
> > +                       address + size <=3D res->start + size)
> > +                       return 0;
> > +               allocated_size +=3D res->size;
> > +       }
> > +
> > +       /* range not already registered, check for space */
> > +       if (allocated_size + size > IO_SPACE_LIMIT)
>=20
> I believe this needs to be "allocated_size + size - 1".
>=20
> > +               return -E2BIG;
> > +
>=20

--=20
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    =C2=AF\_(=E3=83=84)_/=C2=AF