[PATCH 0/4] clk: dt: add support for default rate/parent

[PATCH 0/4] clk: dt: add support for default rate/parent

[Tero Kristo]

Hi,

This set is a mix-match of new DT properties for generic and TI specific
clock drivers. Basically provided for commenting purposes. The patches
provide a way to configure clock parents / rates during boot through DT.

"default-rate" : sets rate of a clock during boot, supported for any DT
		 clock type (through generic clock driver)
"ti,default-parent" : selects a default parent for a multiplexer clock,
		      only supported for TI specific mux clock for now,
		      as generic mux clock does not support DT clocks

Patch #4 provided as a reference how to move the default rates / parents
from kernel code to DT.

Default-rate logic in patch #2 looks somewhat complicated, as the clocks
need to be sorted based on their parents to avoid cases where a child clock
would set its rate first, just to be overridden by its parent changing
rate later and resulting in incorrect rate for the child clock.

If the default-rate generic property is not going to fly, it can be moved
to TI only drivers also.

-Tero

[PATCH 1/4] clk: ti: mux: add support for default-parenting

[Tero Kristo]

ti,mux-clock now supports ti,default-parent property, which can be used
to configure the default parent of the clock during boot. This property
can be added to board specific files, or under the clock data itself.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 Documentation/devicetree/bindings/clock/ti/mux.txt |    7 ++++++
 drivers/clk/ti/mux.c                               |   24 ++++++++++++++++++--
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/ti/mux.txt b/Documentation/devicetree/bindings/clock/ti/mux.txt
index 2d0d170..4e291eb 100644
--- a/Documentation/devicetree/bindings/clock/ti/mux.txt
+++ b/Documentation/devicetree/bindings/clock/ti/mux.txt
@@ -48,6 +48,8 @@ Optional properties:
   zero
 - ti,set-rate-parent : clk_set_rate is propagated to parent clock,
   not supported by the composite-mux-clock subtype
+- ti,default-parent : configures mux parent during boot to be the provided
+  phandle clock
 
 Examples:
 
@@ -65,6 +67,7 @@ abe_dpll_bypass_clk_mux_ck: abe_dpll_bypass_clk_mux_ck@4a306108 {
 	clocks = <&sys_clkin_ck>, <&sys_32k_ck>;
 	ti,bit-shift = <24>;
 	reg = <0x0108>;
+	ti,default-parent = <&sys_32k_ck>;
 };
 
 mcbsp5_mux_fck: mcbsp5_mux_fck {
@@ -74,3 +77,7 @@ mcbsp5_mux_fck: mcbsp5_mux_fck {
 	ti,bit-shift = <4>;
 	reg = <0x02d8>;
 };
+
+&mcbsp5_mux_fck {
+	ti,default-parent = <&mcbsp_clks>;
+};
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index 0197a47..557a7ce 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -108,7 +108,8 @@ static struct clk *_register_mux(struct device *dev, const char *name,
 				 const char **parent_names, u8 num_parents,
 				 unsigned long flags, void __iomem *reg,
 				 u8 shift, u32 mask, u8 clk_mux_flags,
-				 u32 *table, spinlock_t *lock)
+				 u32 *table, int default_parent,
+				 spinlock_t *lock)
 {
 	struct clk_mux *mux;
 	struct clk *clk;
@@ -136,6 +137,9 @@ static struct clk *_register_mux(struct device *dev, const char *name,
 	mux->table = table;
 	mux->hw.init = &init;
 
+	if (default_parent >= 0)
+		ti_clk_mux_set_parent(&mux->hw, default_parent);
+
 	clk = clk_register(dev, &mux->hw);
 
 	if (IS_ERR(clk))
@@ -161,6 +165,8 @@ static void of_mux_clk_setup(struct device_node *node)
 	u32 mask = 0;
 	u32 shift = 0;
 	u32 flags = 0;
+	struct device_node *default_parent;
+	int default_parent_idx = -1;
 
 	num_parents = of_clk_get_parent_count(node);
 	if (num_parents < 2) {
@@ -174,6 +180,19 @@ static void of_mux_clk_setup(struct device_node *node)
 	for (i = 0; i < num_parents; i++)
 		parent_names[i] = of_clk_get_parent_name(node, i);
 
+	default_parent = of_parse_phandle(node, "ti,default-parent", 0);
+
+	if (default_parent) {
+		for (i = 0; i < num_parents; i++) {
+			struct device_node *tmp;
+			tmp = of_parse_phandle(node, "clocks", i);
+			if (tmp == default_parent) {
+				default_parent_idx = i;
+				break;
+			}
+		}
+	}
+
 	reg = ti_clk_get_reg_addr(node, 0);
 
 	if (!reg)
@@ -195,7 +214,8 @@ static void of_mux_clk_setup(struct device_node *node)
 	mask = (1 << fls(mask)) - 1;
 
 	clk = _register_mux(NULL, node->name, parent_names, num_parents, flags,
-			    reg, shift, mask, clk_mux_flags, NULL, NULL);
+			    reg, shift, mask, clk_mux_flags, NULL,
+			    default_parent_idx, NULL);
 
 	if (!IS_ERR(clk))
 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
-- 
1.7.9.5

[PATCH 2/4] clk: add support for default-rate

[Tero Kristo]

default-rate property can now be used to set initial rates for clocks.
This is added by default for all clocks which get initialized through
of_clk_init().

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 .../devicetree/bindings/clock/clock-bindings.txt   |    9 ++
 drivers/clk/clk.c                                  |   86 ++++++++++++++++++++
 include/linux/clk-provider.h                       |    2 +
 3 files changed, 97 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt
index 7c52c29..d676112 100644
--- a/Documentation/devicetree/bindings/clock/clock-bindings.txt
+++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt
@@ -44,6 +44,15 @@ For example:
   clocks by index. The names should reflect the clock output signal
   names for the device.
 
+default-rate:	Sets the rate of the clock during boot to the provided
+		rate.
+
+For example:
+
+    clk-divider {
+        default-rate = <1000000>;
+    };
+
 ==Clock consumers==
 
 Required properties:
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 5517944..cb144e4 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2526,6 +2526,89 @@ const char *of_clk_get_parent_name(struct device_node *np, int index)
 }
 EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
 
+static LIST_HEAD(clk_init_info_list);
+
+struct clk_init_info {
+	struct device_node *node;
+	struct clk *clk;
+	u32 rate;
+	struct list_head link;
+	struct list_head sort_link;
+};
+
+int __init of_clk_parse_init_rate(struct device_node *node, struct clk *clk)
+{
+	u32 rate;
+	struct clk_init_info *cinfo;
+
+	if (of_property_read_u32(node, "default-rate", &rate))
+		return 0;
+
+	cinfo = kzalloc(sizeof(*cinfo), GFP_KERNEL);
+	if (!cinfo)
+		return -ENOMEM;
+
+	cinfo->node = node;
+	cinfo->clk = clk;
+	cinfo->rate = rate;
+	list_add(&cinfo->link, &clk_init_info_list);
+	INIT_LIST_HEAD(&cinfo->sort_link);
+
+	return 0;
+}
+
+int __init of_clk_set_init_rates(void)
+{
+	struct clk_init_info *cinfo, *tmp;
+	struct of_phandle_args clkspec;
+	int ret = 0;
+	struct list_head sorted_list;
+	struct clk *clk;
+
+	INIT_LIST_HEAD(&sorted_list);
+
+	list_for_each_entry(cinfo, &clk_init_info_list, link) {
+		/* Get missing clk pointers */
+		if (!cinfo->clk) {
+			clkspec.np = cinfo->node;
+			cinfo->clk = of_clk_get_from_provider(&clkspec);
+		}
+
+		/* Check if we are the parent of any of the sorted clocks */
+		list_for_each_entry(tmp, &sorted_list, sort_link) {
+			clk = tmp->clk;
+			while (clk && clk != cinfo->clk)
+				clk = clk->parent;
+
+			if (clk == cinfo->clk) {
+				/* Add us before this node in the list */
+				list_add_tail(&cinfo->sort_link,
+					      &tmp->sort_link);
+				break;
+			}
+		}
+
+		if (list_empty(&cinfo->sort_link))
+			list_add_tail(&cinfo->sort_link, &sorted_list);
+	}
+
+	/* Process sorted list and set clk rates */
+	list_for_each_entry_safe(cinfo, tmp, &sorted_list, sort_link) {
+		int r = clk_set_rate(cinfo->clk, cinfo->rate);
+		if (r) {
+			pr_err("%s: clk_set_rate for %s failed: %d\n", __func__,
+			       cinfo->node->name, ret);
+			ret = r;
+		}
+
+		/* Clean up the static list */
+		list_del(&cinfo->link);
+		kfree(cinfo);
+	}
+
+	return ret;
+}
+
 /**
  * of_clk_init() - Scan and init clock providers from the DT
  * @matches: array of compatible values and init functions for providers.
@@ -2544,6 +2627,9 @@ void __init of_clk_init(const struct of_device_id *matches)
 	for_each_matching_node_and_match(np, matches, &match) {
 		of_clk_init_cb_t clk_init_cb = match->data;
 		clk_init_cb(np);
+		of_clk_parse_init_rate(np, NULL);
 	}
+
+	of_clk_set_init_rates();
 }
 #endif
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 939533d..1bbd194 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -506,6 +506,8 @@ struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data);
 int of_clk_get_parent_count(struct device_node *np);
 const char *of_clk_get_parent_name(struct device_node *np, int index);
+int of_clk_parse_init_rate(struct device_node *node, struct clk *clk);
+int of_clk_set_init_rates(void);
 
 void of_clk_init(const struct of_device_id *matches);
 
-- 
1.7.9.5

[PATCH 3/4] clk: ti: add support for default-rate property from DT

[Tero Kristo]

default-rate property can now be used to define default rates for clocks,
which get configured during boot.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm_common.c |    2 ++
 drivers/clk/ti/clk.c             |    1 +
 2 files changed, 3 insertions(+)

diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index b4c4ab9..4703545 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -528,5 +528,7 @@ int __init of_prcm_init(void)
 
 	ti_dt_clockdomains_setup();
 
+	of_clk_set_init_rates();
+
 	return 0;
 }
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index b1a6f71..23998b7 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -156,6 +156,7 @@ void ti_dt_clk_init_provider(struct device_node *parent, int index)
 		clk_init_cb = (of_clk_init_cb_t)match->data;
 		pr_debug("%s: initializing: %s\n", __func__, np->name);
 		clk_init_cb(np);
+		of_clk_parse_init_rate(np, NULL);
 	}
 
 	list_for_each_entry_safe(retry, tmp, &retry_list, link) {
-- 
1.7.9.5

Re: [PATCH 3/4] clk: ti: add support for default-rate property from DT

[Tony Lindgren]

* Tero Kristo <t-kristo@ti.com> [140213 01:04]:
> default-rate property can now be used to define default rates for clocks,
> which get configured during boot.
> 
> Signed-off-by: Tero Kristo <t-kristo@ti.com>

This can go with the drivers/clk patches as far as I'm concerned:

Acked-by: Tony Lindgren <tony@atomide.com>

> ---
>  arch/arm/mach-omap2/prm_common.c |    2 ++
>  drivers/clk/ti/clk.c             |    1 +
>  2 files changed, 3 insertions(+)
> 
> diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
> index b4c4ab9..4703545 100644
> --- a/arch/arm/mach-omap2/prm_common.c
> +++ b/arch/arm/mach-omap2/prm_common.c
> @@ -528,5 +528,7 @@ int __init of_prcm_init(void)
>  
>  	ti_dt_clockdomains_setup();
>  
> +	of_clk_set_init_rates();
> +
>  	return 0;
>  }
> diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
> index b1a6f71..23998b7 100644
> --- a/drivers/clk/ti/clk.c
> +++ b/drivers/clk/ti/clk.c
> @@ -156,6 +156,7 @@ void ti_dt_clk_init_provider(struct device_node *parent, int index)
>  		clk_init_cb = (of_clk_init_cb_t)match->data;
>  		pr_debug("%s: initializing: %s\n", __func__, np->name);
>  		clk_init_cb(np);
> +		of_clk_parse_init_rate(np, NULL);
>  	}
>  
>  	list_for_each_entry_safe(retry, tmp, &retry_list, link) {
> -- 
> 1.7.9.5
> 
> --
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> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 4/4] clk: ti: omap4: set default-parents and default-rates using DT

[Tero Kristo]

Setup dpll_usb_ck and dpll_abe_ck using DT properties instead of hardcoding
the parents and rates in kernel.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap4.dtsi |   12 ++++++++++++
 drivers/clk/ti/clk-44xx.c    |   42 ------------------------------------------
 2 files changed, 12 insertions(+), 42 deletions(-)

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index d3f8a6e..282ce66 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -761,3 +761,15 @@
 };
 
 /include/ "omap44xx-clocks.dtsi"
+
+&dpll_usb_ck {
+	default-rate = <960000000>;
+};
+
+&dpll_abe_ck {
+	default-rate = <98304000>;
+};
+
+&abe_dpll_refclk_mux_ck {
+	ti,default-parent = <&sys_32k_ck>;
+};
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index ae00218..bc14a49 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -16,21 +16,6 @@
 #include <linux/clkdev.h>
 #include <linux/clk/ti.h>
 
-/*
- * OMAP4 ABE DPLL default frequency. In OMAP4460 TRM version V, section
- * "3.6.3.2.3 CM1_ABE Clock Generator" states that the "DPLL_ABE_X2_CLK
- * must be set to 196.608 MHz" and hence, the DPLL locked frequency is
- * half of this value.
- */
-#define OMAP4_DPLL_ABE_DEFFREQ				98304000
-
-/*
- * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
- * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
- * locked frequency for the USB DPLL is 960MHz.
- */
-#define OMAP4_DPLL_USB_DEFFREQ				960000000
-
 static struct ti_dt_clk omap44xx_clks[] = {
 	DT_CLK(NULL, "extalt_clkin_ck", "extalt_clkin_ck"),
 	DT_CLK(NULL, "pad_clks_src_ck", "pad_clks_src_ck"),
@@ -281,36 +266,9 @@ static struct ti_dt_clk omap44xx_clks[] = {
 
 int __init omap4xxx_dt_clk_init(void)
 {
-	int rc;
-	struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
-
 	ti_dt_clocks_register(omap44xx_clks);
 
 	omap2_clk_disable_autoidle_all();
 
-	/*
-	 * Lock USB DPLL on OMAP4 devices so that the L3INIT power
-	 * domain can transition to retention state when not in use.
-	 */
-	usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
-	rc = clk_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
-	if (rc)
-		pr_err("%s: failed to configure USB DPLL!\n", __func__);
-
-	/*
-	 * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
-	 * state when turning the ABE clock domain. Workaround this by
-	 * locking the ABE DPLL on boot.
-	 * Lock the ABE DPLL in any case to avoid issues with audio.
-	 */
-	abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_refclk_mux_ck");
-	sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
-	rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
-	abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
-	if (!rc)
-		rc = clk_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
-	if (rc)
-		pr_err("%s: failed to configure ABE DPLL!\n", __func__);
-
 	return 0;
 }
-- 
1.7.9.5

Re: [PATCH 0/4] clk: dt: add support for default rate/parent

[Tero Kristo]

Ping.

Mike, any feedback on this?

-Tero

On 02/13/2014 11:00 AM, Tero Kristo wrote:
> Hi,
>
> This set is a mix-match of new DT properties for generic and TI specific
> clock drivers. Basically provided for commenting purposes. The patches
> provide a way to configure clock parents / rates during boot through DT.
>
> "default-rate" : sets rate of a clock during boot, supported for any DT
> 		 clock type (through generic clock driver)
> "ti,default-parent" : selects a default parent for a multiplexer clock,
> 		      only supported for TI specific mux clock for now,
> 		      as generic mux clock does not support DT clocks
>
> Patch #4 provided as a reference how to move the default rates / parents
> from kernel code to DT.
>
> Default-rate logic in patch #2 looks somewhat complicated, as the clocks
> need to be sorted based on their parents to avoid cases where a child clock
> would set its rate first, just to be overridden by its parent changing
> rate later and resulting in incorrect rate for the child clock.
>
> If the default-rate generic property is not going to fly, it can be moved
> to TI only drivers also.
>
> -Tero
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

Re: [PATCH 0/4] clk: dt: add support for default rate/parent

[Mike Turquette]

Quoting Tero Kristo (2014-03-05 05:10:17)
> Ping.
> 
> Mike, any feedback on this?

Hi Tero,

Have you seen Sylwester's approach[1]? I prefer it since it is more
device-oriented and less "centralized". The clock consumer enumerates
the default parent or rate of a consumed clock. This can be made to work
like your approach by having the clock driver consume these clocks and
set them up with default rates or parents. What do you think?

Regards,
Mike

[1] https://lkml.org/lkml/2014/3/3/324

> 
> -Tero
> 
> On 02/13/2014 11:00 AM, Tero Kristo wrote:
> > Hi,
> >
> > This set is a mix-match of new DT properties for generic and TI specific
> > clock drivers. Basically provided for commenting purposes. The patches
> > provide a way to configure clock parents / rates during boot through DT.
> >
> > "default-rate" : sets rate of a clock during boot, supported for any DT
> >                clock type (through generic clock driver)
> > "ti,default-parent" : selects a default parent for a multiplexer clock,
> >                     only supported for TI specific mux clock for now,
> >                     as generic mux clock does not support DT clocks
> >
> > Patch #4 provided as a reference how to move the default rates / parents
> > from kernel code to DT.
> >
> > Default-rate logic in patch #2 looks somewhat complicated, as the clocks
> > need to be sorted based on their parents to avoid cases where a child clock
> > would set its rate first, just to be overridden by its parent changing
> > rate later and resulting in incorrect rate for the child clock.
> >
> > If the default-rate generic property is not going to fly, it can be moved
> > to TI only drivers also.
> >
> > -Tero
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >
> 

Re: [PATCH 0/4] clk: dt: add support for default rate/parent

[Tero Kristo]

On 03/20/2014 11:23 PM, Mike Turquette wrote:
> Quoting Tero Kristo (2014-03-05 05:10:17)
>> Ping.
>>
>> Mike, any feedback on this?
>
> Hi Tero,
>
> Have you seen Sylwester's approach[1]? I prefer it since it is more
> device-oriented and less "centralized". The clock consumer enumerates
> the default parent or rate of a consumed clock. This can be made to work
> like your approach by having the clock driver consume these clocks and
> set them up with default rates or parents. What do you think?

Just saw the patches yesterday. I think that approach would work in most 
cases, however I guess there might be cases where you need to setup the 
rate/parent of a clock very early in boot (basically when you are 
registering the clock itself) to avoid any race issues with drivers (or 
the clock framework itself) coming in and using a clock that is not 
properly setup yet. But well, I guess these can be handled by some init 
time tweaks.

I just converted the OMAP4 code to the format provided by Sylwester's 
patches and it seems to work fine. The patch should be changed 
eventually to probe at the time when the CM/PRM instances are probed. 
Inlined here as reference:

 From 1b05e03bbd3fb5a4f5192444e7d4365f177c1756 Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Fri, 21 Mar 2014 09:52:47 +0200
Subject: [PATCH] CLK: TI: OMAP4: setup default clocks / rates using the 
clock
  consumer approach

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
  arch/arm/boot/dts/omap4.dtsi |    8 ++++++++
  drivers/clk/ti/clk-44xx.c    |   44 
------------------------------------------
  drivers/clk/ti/clk.c         |   41 
+++++++++++++++++++++++++++++++++++++++
  3 files changed, 49 insertions(+), 44 deletions(-)

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index d3f8a6e..4826168 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -88,6 +88,14 @@
  		};
  	};

+	default-clocks {
+		compatible = "ti,default-clocks";
+		clocks = <&abe_dpll_refclk_mux_ck>, <&dpll_usb_ck>,
+			<&dpll_abe_ck>;
+		clock-parents = <&sys_32k_ck>;
+		clock-rates = <0>, <960000000>, <98304000>;
+	};
+
  	/*
  	 * XXX: Use a flat representation of the OMAP4 interconnect.
  	 * The real OMAP interconnect network is quite complex.
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index ae00218..dfafb96 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -16,21 +16,6 @@
  #include <linux/clkdev.h>
  #include <linux/clk/ti.h>

-/*
- * OMAP4 ABE DPLL default frequency. In OMAP4460 TRM version V, section
- * "3.6.3.2.3 CM1_ABE Clock Generator" states that the "DPLL_ABE_X2_CLK
- * must be set to 196.608 MHz" and hence, the DPLL locked frequency is
- * half of this value.
- */
-#define OMAP4_DPLL_ABE_DEFFREQ				98304000
-
-/*
- * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
- * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
- * locked frequency for the USB DPLL is 960MHz.
- */
-#define OMAP4_DPLL_USB_DEFFREQ				960000000
-
  static struct ti_dt_clk omap44xx_clks[] = {
  	DT_CLK(NULL, "extalt_clkin_ck", "extalt_clkin_ck"),
  	DT_CLK(NULL, "pad_clks_src_ck", "pad_clks_src_ck"),
@@ -281,36 +266,7 @@ static struct ti_dt_clk omap44xx_clks[] = {

  int __init omap4xxx_dt_clk_init(void)
  {
-	int rc;
-	struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
-
  	ti_dt_clocks_register(omap44xx_clks);
-
  	omap2_clk_disable_autoidle_all();
-
-	/*
-	 * Lock USB DPLL on OMAP4 devices so that the L3INIT power
-	 * domain can transition to retention state when not in use.
-	 */
-	usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
-	rc = clk_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
-	if (rc)
-		pr_err("%s: failed to configure USB DPLL!\n", __func__);
-
-	/*
-	 * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
-	 * state when turning the ABE clock domain. Workaround this by
-	 * locking the ABE DPLL on boot.
-	 * Lock the ABE DPLL in any case to avoid issues with audio.
-	 */
-	abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_refclk_mux_ck");
-	sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
-	rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
-	abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
-	if (!rc)
-		rc = clk_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
-	if (rc)
-		pr_err("%s: failed to configure ABE DPLL!\n", __func__);
-
  	return 0;
  }
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index b1a6f71..469fd4e 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -21,6 +21,8 @@
  #include <linux/of.h>
  #include <linux/of_address.h>
  #include <linux/list.h>
+#include <linux/of_platform.h>
+#include <linux/module.h>

  #undef pr_fmt
  #define pr_fmt(fmt) "%s: " fmt, __func__
@@ -165,3 +167,41 @@ void ti_dt_clk_init_provider(struct device_node 
*parent, int index)
  		kfree(retry);
  	}
  }
+
+static int ti_clk_probe(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static int ti_clk_remove(struct platform_device *dev)
+{
+	return 0;
+}
+
+static const struct of_device_id ti_clk_match[] = {
+	{ .compatible = "ti,default-clocks" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, ti_clk_match);
+
+static struct platform_driver ti_clk_driver = {
+	.probe		= ti_clk_probe,
+	.remove		= ti_clk_remove,
+	.driver		= {
+		.name	= "ti-clk",
+		.of_match_table = of_match_ptr(ti_clk_match),
+	},
+};
+
+static int __init ti_clk_init(void)
+{
+	return platform_driver_register(&ti_clk_driver);
+}
+
+static void __exit ti_clk_exit(void)
+{
+	platform_driver_unregister(&ti_clk_driver);
+}
+
+module_init(ti_clk_init);
+module_exit(ti_clk_exit);
-- 
1.7.9.5

Re: [PATCH 0/4] clk: dt: add support for default rate/parent

[Peter De Schrijver]

On Thu, Mar 20, 2014 at 10:23:08PM +0100, Mike Turquette wrote:
> Quoting Tero Kristo (2014-03-05 05:10:17)
> > Ping.
> > 
> > Mike, any feedback on this?
> 
> Hi Tero,
> 
> Have you seen Sylwester's approach[1]? I prefer it since it is more
> device-oriented and less "centralized". The clock consumer enumerates
> the default parent or rate of a consumed clock. This can be made to work

That assumes driver writers are aware of the clock tree topology. IME that's
seldomly the case.

Cheers,

Peter.

Re: [PATCH 0/4] clk: dt: add support for default rate/parent

[Mike Turquette]

Quoting Peter De Schrijver (2014-03-21 01:12:17)
> On Thu, Mar 20, 2014 at 10:23:08PM +0100, Mike Turquette wrote:
> > Quoting Tero Kristo (2014-03-05 05:10:17)
> > > Ping.
> > > 
> > > Mike, any feedback on this?
> > 
> > Hi Tero,
> > 
> > Have you seen Sylwester's approach[1]? I prefer it since it is more
> > device-oriented and less "centralized". The clock consumer enumerates
> > the default parent or rate of a consumed clock. This can be made to work
> 
> That assumes driver writers are aware of the clock tree topology. IME that's
> seldomly the case.

It assumes no such thing.

The point of Sylwester's patch is that if a driver consumes a clock and
needs to do the very typical setup regarding that clock's rate or
parent, then we now have a sensible way to express that in DT.

One of the strengths of DT is that the C code does not have to know all
of the details about topology or how things are hooked up. We can hide
some of those cute embedded nonsense hacks in DTS and the device
integrator can manage it there.

Regards,
Mike

> 
> Cheers,
> 
> Peter.

Re: [PATCH 0/4] clk: dt: add support for default rate/parent

[Peter De Schrijver]

On Tue, Mar 25, 2014 at 01:38:47AM +0100, Mike Turquette wrote:
> Quoting Peter De Schrijver (2014-03-21 01:12:17)
> > On Thu, Mar 20, 2014 at 10:23:08PM +0100, Mike Turquette wrote:
> > > Quoting Tero Kristo (2014-03-05 05:10:17)
> > > > Ping.
> > > > 
> > > > Mike, any feedback on this?
> > > 
> > > Hi Tero,
> > > 
> > > Have you seen Sylwester's approach[1]? I prefer it since it is more
> > > device-oriented and less "centralized". The clock consumer enumerates
> > > the default parent or rate of a consumed clock. This can be made to work
> > 
> > That assumes driver writers are aware of the clock tree topology. IME that's
> > seldomly the case.
> 
> It assumes no such thing.
> 
> The point of Sylwester's patch is that if a driver consumes a clock and
> needs to do the very typical setup regarding that clock's rate or
> parent, then we now have a sensible way to express that in DT.
> 
> One of the strengths of DT is that the C code does not have to know all
> of the details about topology or how things are hooked up. We can hide
> some of those cute embedded nonsense hacks in DTS and the device
> integrator can manage it there.

It would be much better to specify this as part of the clock provider binding
though, as the person writing those, generally knows what topology needs to be
setup. The driver writer writing the consumer node often doesn't.

Cheers,

Peter.