From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Boris BREZILLON
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: "Randy Dunlap" <rdunlap-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
"Emilio López" <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
"Mike Turquette"
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Linus Walleij"
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Chen-Yu Tsai" <wens-jdAy2FN1RRM@public.gmane.org>,
"Hans de Goede"
<hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
Shuge <shuge-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org>,
kevin-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dev-3kdeTeqwOZ9EV1b7eY7vFQ@public.gmane.org
Subject: Re: [PATCH v2 5/5] ARM: sunxi: update the default ARCH_NR_GPIO for sunxi arch
Date: Thu, 10 Apr 2014 14:47:05 +0200 [thread overview]
Message-ID: <20140410124705.GT28585@lukather> (raw)
In-Reply-To: <1397132747-13917-6-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
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On Thu, Apr 10, 2014 at 02:25:47PM +0200, Boris BREZILLON wrote:
> The A31 SoC has PL and PM banks, we thus need to increase the default
> ARCH_NR_GPIO when building for the sunxi architecture.
>
> Signed-off-by: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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prev parent reply other threads:[~2014-04-10 12:47 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-10 12:25 [PATCH v2 0/5] ARM: sunxi: add multi pin controller support Boris BREZILLON
2014-04-10 12:25 ` [PATCH v2 1/5] pinctrl: sunxi: add PL and PM pin definitions Boris BREZILLON
2014-04-10 12:34 ` Maxime Ripard
2014-04-10 12:25 ` [PATCH v2 2/5] pinctrl: sunxi: support multiple pin controller Boris BREZILLON
[not found] ` <1397132747-13917-3-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-04-10 12:39 ` Maxime Ripard
[not found] ` <1397132747-13917-1-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-04-10 12:25 ` [PATCH v2 3/5] pinctrl: sunxi: define A31 R_PIO pin functions Boris BREZILLON
[not found] ` <1397132747-13917-4-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-04-10 12:43 ` Maxime Ripard
2014-04-10 12:25 ` [PATCH v2 4/5] pinctrl: sunxi: add reset control support Boris BREZILLON
[not found] ` <1397132747-13917-5-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-04-10 12:46 ` Maxime Ripard
2014-04-10 12:25 ` [PATCH v2 5/5] ARM: sunxi: update the default ARCH_NR_GPIO for sunxi arch Boris BREZILLON
[not found] ` <1397132747-13917-6-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-04-10 12:47 ` Maxime Ripard [this message]
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