From: Josh Cartwright <joshc@codeaurora.org>
To: Andy Gross <agross@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, Kumar Gala <galak@codeaurora.org>,
Santosh Shilimkar <santosh.shilimkar@ti.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: Re: [PATCH 2/4] soc: qcom: Add GSBI driver
Date: Mon, 21 Apr 2014 12:26:06 -0500 [thread overview]
Message-ID: <20140421172606.GB11778@joshc.qualcomm.com> (raw)
In-Reply-To: <20140421171117.GB32485@qualcomm.com>
On Mon, Apr 21, 2014 at 12:11:18PM -0500, Andy Gross wrote:
> On Mon, Apr 21, 2014 at 11:54:00AM -0500, Josh Cartwright wrote:
> > > + if (of_property_read_u32(node, "qcom,mode", &mode)) {
> > > + dev_err(gsbi->dev, "missing mode configuration\n");
> > > + return -EINVAL;
> > > + }
> >
> > I'm wondering if you should really be a (very simple) pinctrl driver
> > proper.
>
> Perhaps. But how would i reconcile more than one device node that uses the same
> GSBI? One could still trounce the other unless I only allow one setting of the
> GSBI.
>
I don't understand, as long as the pins/functions have been specified
properly to the pinctrl core, I would expect a conflicting configuration
to be rejected.
Anyway, I wouldn't expect the subnodes to be consuming the GSBI pin
configuration anyway (although that could probably be done), instead, I
would expect the GSBI node to consume it's own pin configuration.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2014-04-21 17:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-21 5:30 [PATCH 0/4] Introduce drivers/soc and add QCOM GSBI driver Andy Gross
2014-04-21 5:30 ` [PATCH 1/4] soc: Placeholder files for drivers/soc Andy Gross
2014-04-21 5:30 ` [PATCH 2/4] soc: qcom: Add GSBI driver Andy Gross
2014-04-21 16:54 ` Josh Cartwright
2014-04-21 17:11 ` Andy Gross
2014-04-21 17:26 ` Josh Cartwright [this message]
2014-04-21 5:30 ` [PATCH 3/4] soc: qcom: Add device tree binding for GSBI Andy Gross
2014-04-21 16:55 ` Kumar Gala
2014-04-21 5:30 ` [PATCH 4/4] tty: serial: msm: Remove direct access to GSBI Andy Gross
2014-04-21 13:48 ` [PATCH 0/4] Introduce drivers/soc and add QCOM GSBI driver Christopher Covington
2014-04-21 16:21 ` Andy Gross
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20140421172606.GB11778@joshc.qualcomm.com \
--to=joshc@codeaurora.org \
--cc=agross@codeaurora.org \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=gregkh@linuxfoundation.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=santosh.shilimkar@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).