* [PATCH v2] ARM: dts: OMAP5: add pmu node
@ 2014-03-19 15:45 Nathan Lynch
2014-05-05 19:56 ` Tony Lindgren
0 siblings, 1 reply; 2+ messages in thread
From: Nathan Lynch @ 2014-03-19 15:45 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, devicetree, bcousson
Expose the PMU on OMAP5.
Tested with perf on OMAP5 uEVM.
Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
---
Changes since v1:
- Use symbolic constants.
arch/arm/boot/dts/omap5.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index a72813a9663e..ccb38944c85a 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -76,6 +76,12 @@
<GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
};
+ pmu {
+ compatible = "arm,cortex-a15-pmu";
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
gic: interrupt-controller@48211000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] ARM: dts: OMAP5: add pmu node
2014-03-19 15:45 [PATCH v2] ARM: dts: OMAP5: add pmu node Nathan Lynch
@ 2014-05-05 19:56 ` Tony Lindgren
0 siblings, 0 replies; 2+ messages in thread
From: Tony Lindgren @ 2014-05-05 19:56 UTC (permalink / raw)
To: Nathan Lynch; +Cc: linux-omap, linux-arm-kernel, devicetree, bcousson
* Nathan Lynch <nathan_lynch@mentor.com> [140319 08:50]:
> Expose the PMU on OMAP5.
>
> Tested with perf on OMAP5 uEVM.
>
> Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Applying into omap-for-v3.16/dt thanks.
Tony
> ---
>
> Changes since v1:
> - Use symbolic constants.
>
> arch/arm/boot/dts/omap5.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index a72813a9663e..ccb38944c85a 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -76,6 +76,12 @@
> <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> + pmu {
> + compatible = "arm,cortex-a15-pmu";
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> gic: interrupt-controller@48211000 {
> compatible = "arm,cortex-a15-gic";
> interrupt-controller;
> --
> 1.8.3.1
>
> --
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