From: Andrew Lunn <andrew@lunn.ch>
To: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com>,
thomas.petazzoni@free-electrons.com, zmxu@marvell.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
kishon@ti.com, linux-ide@vger.kernel.org,
alexandre.belloni@free-electrons.com, jszhang@marvell.com,
tj@kernel.org, linux-arm-kernel@lists.infradead.org,
sebastian.hesselbarth@gmail.com
Subject: Re: [PATCH v4 1/7] phy: add a driver for the Berlin SATA PHY
Date: Tue, 20 May 2014 15:49:42 +0200 [thread overview]
Message-ID: <20140520134942.GC9873@lunn.ch> (raw)
In-Reply-To: <1821771.zFvTDGF2Ae@amdc1032>
On Tue, May 20, 2014 at 02:34:20PM +0200, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> Few minor issues below..
>
> On Tuesday, May 20, 2014 11:04:29 AM Antoine Ténart wrote:
> > The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
> >
> > The mode selection can let us think this PHY can be configured to fit
> > other purposes. But there are reasons to think the SATA mode will be
> > the only one usable: the PHY registers are only accessible indirectly
> > through two registers in the SATA range, the PHY seems to be integrated
> > and no information tells us the contrary. For these reasons, make the
> > driver a SATA PHY driver.
> >
> > Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
> > ---
> > drivers/phy/Kconfig | 5 +
> > drivers/phy/Makefile | 1 +
> > drivers/phy/phy-berlin-sata.c | 230 ++++++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 236 insertions(+)
> > create mode 100644 drivers/phy/phy-berlin-sata.c
> >
> > diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> > index 4906c27fa3bd..b31b1986fda4 100644
> > --- a/drivers/phy/Kconfig
> > +++ b/drivers/phy/Kconfig
> > @@ -15,6 +15,11 @@ config GENERIC_PHY
> > phy users can obtain reference to the PHY. All the users of this
> > framework should select this config.
> >
> > +config PHY_BERLIN_SATA
> > + bool
>
> Is there any real reason why this cannot be tristate?
What we have seen with SATA drivers and phys, is there is link time
breakage if the SATA driver is built in and the phy is modular.
Maybe this has been fixed now?
Andrew
next prev parent reply other threads:[~2014-05-20 13:49 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-20 9:04 [PATCH v4 0/7] ARM: berlin: add AHCI support Antoine Ténart
2014-05-20 9:04 ` [PATCH v4 1/7] phy: add a driver for the Berlin SATA PHY Antoine Ténart
2014-05-20 9:11 ` Sebastian Hesselbarth
[not found] ` <537B1C35.20107-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-05-20 9:15 ` Antoine Ténart
2014-05-20 12:34 ` Bartlomiej Zolnierkiewicz
2014-05-20 13:49 ` Andrew Lunn [this message]
2014-05-20 14:03 ` Antoine Ténart
2014-05-20 14:06 ` Andrew Lunn
2014-05-20 14:40 ` Antoine Ténart
2014-05-20 14:06 ` Antoine Ténart
2014-05-20 14:40 ` Antoine Ténart
2014-05-20 9:04 ` [PATCH v4 2/7] Documentation: bindings: add " Antoine Ténart
2014-05-20 9:04 ` [PATCH v4 3/7] ata: libahci: allow to use multiple PHYs Antoine Ténart
2014-05-20 9:04 ` [PATCH v4 4/7] ata: ahci_platform: add the Marvell Berlin AHCI compatible Antoine Ténart
2014-05-20 9:18 ` Sebastian Hesselbarth
2014-05-20 9:23 ` Antoine Ténart
[not found] ` <1400576675-25265-1-git-send-email-antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-05-20 9:04 ` [PATCH v4 5/7] Documentation: bindings: document the sub-nodes AHCI bindings Antoine Ténart
2014-05-20 9:04 ` [PATCH v4 6/7] ARM: berlin: add the AHCI node for the BG2Q Antoine Ténart
2014-05-20 9:04 ` [PATCH v4 7/7] ARM: berlin: enable the eSATA interface on the BG2Q DMP Antoine Ténart
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