From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCH v2] devicetree: Add generic IOMMU device tree bindings Date: Wed, 4 Jun 2014 14:56:01 +0100 Message-ID: <20140604135600.GD6644@arm.com> References: <1400877218-4113-1-git-send-email-thierry.reding@gmail.com> <4545972.cM7IP1qTXQ@wuerfel> <87tx87rrp2.fsf@nvidia.com> <4462924.8iRbdkOPp7@wuerfel> <20140604134400.GE28484@ulmo> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <20140604134400.GE28484@ulmo> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Thierry Reding Cc: Mark Rutland , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Arnd Bergmann , Pawel Moll , Ian Campbell , Grant Grundler , Stephen Warren , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Marc Zyngier , Linux IOMMU , Rob Herring , Rob Herring , Kumar Gala , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Cho KyongHo , Dave P Martin , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" List-Id: devicetree@vger.kernel.org On Wed, Jun 04, 2014 at 02:44:03PM +0100, Thierry Reding wrote: > On Fri, May 30, 2014 at 09:54:37PM +0200, Arnd Bergmann wrote: > > On Friday 30 May 2014 22:29:13 Hiroshi Doyu wrote: > > > The disadvantage of this is that this limits the max number of streamIDs > > > to support. If # of streamID is increased later more than 64, this > > > format cannot cover any more. You have to predict the max # of streamIDs > > > in advance if steamID is statically assigned. > > > > > > > Well, the iommu specific binding could allow a variable #address-cells. > > That way, you just need to know the number of stream IDs for that instance > > of the iommu. > > That sounds fairly complicated to me. I don't see what that buys us over > the clarity and simplicity that the above explicit notation gives us. Is > it not more common for a device to have a single master rather than a > whole bunch of them? I've never seen a device upstream of an ARM SMMU with a single stream-id; they always seem to have a whole bunch of them. Calxeda's SATA controller had 10 IDs, for example, and a PL330 DMA controller tends to have at least 3. Will