From: Pratyush Anand <pratyush.anand@st.com>
To: Murali Karicheri <m-karicheri2@ti.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
Santosh Shilimkar <santosh.shilimkar@ti.com>,
Russell King <linux@arm.linux.org.uk>,
Grant Likely <grant.likely@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mohit KUMAR DCG <Mohit.KUMAR@st.com>,
Jingoo Han <jg1.han@samsung.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Richard Zhu <r65037@freescale.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Marek Vasut <marex@denx.de>, Arnd Bergmann <arnd@arndb.de>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Randy
Subject: Re: [PATCH v2 1/8] PCI: designware: add rd[wr]_other_conf API
Date: Wed, 18 Jun 2014 12:07:07 +0530 [thread overview]
Message-ID: <20140618063706.GA6098@pratyush-vbox> (raw)
In-Reply-To: <1402426287-31157-2-git-send-email-m-karicheri2@ti.com>
On Wed, Jun 11, 2014 at 02:51:20AM +0800, Murali Karicheri wrote:
> v3.65 version of the designware h/w, requires application space
> registers to be configured to access the remote EP config space.
> To support this, add rd[wr]_other_conf API in the pcie_host_opts
>
> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
>
> CC: Santosh Shilimkar <santosh.shilimkar@ti.com>
> CC: Russell King <linux@arm.linux.org.uk>
> CC: Grant Likely <grant.likely@linaro.org>
> CC: Rob Herring <robh+dt@kernel.org>
> CC: Mohit Kumar <mohit.kumar@st.com>
> CC: Jingoo Han <jg1.han@samsung.com>
> CC: Bjorn Helgaas <bhelgaas@google.com>
> CC: Pratyush Anand <pratyush.anand@st.com>
> CC: Richard Zhu <r65037@freescale.com>
> CC: Kishon Vijay Abraham I <kishon@ti.com>
> CC: Marek Vasut <marex@denx.de>
> CC: Arnd Bergmann <arnd@arndb.de>
> CC: Pawel Moll <pawel.moll@arm.com>
> CC: Mark Rutland <mark.rutland@arm.com>
> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
> CC: Kumar Gala <galak@codeaurora.org>
> CC: Randy Dunlap <rdunlap@infradead.org>
> CC: Grant Likely <grant.likely@linaro.org>
>
> ---
> drivers/pci/host/pcie-designware.c | 12 ++++++++++--
> drivers/pci/host/pcie-designware.h | 4 ++++
> 2 files changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index c4e3732..e8f5d8d 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -654,7 +654,11 @@ static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
>
> spin_lock_irqsave(&pp->conf_lock, flags);
> if (bus->number != pp->root_bus_nr)
> - ret = dw_pcie_rd_other_conf(pp, bus, devfn,
> + if (pp->ops->rd_other_conf)
> + ret = pp->ops->rd_other_conf(pp, bus, devfn,
> + where, size, val);
> + else
> + ret = dw_pcie_rd_other_conf(pp, bus, devfn,
> where, size, val);
> else
> ret = dw_pcie_rd_own_conf(pp, where, size, val);
> @@ -680,7 +684,11 @@ static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
>
> spin_lock_irqsave(&pp->conf_lock, flags);
> if (bus->number != pp->root_bus_nr)
> - ret = dw_pcie_wr_other_conf(pp, bus, devfn,
> + if (pp->ops->wr_other_conf)
> + ret = pp->ops->wr_other_conf(pp, bus, devfn,
> + where, size, val);
> + else
> + ret = dw_pcie_wr_other_conf(pp, bus, devfn,
> where, size, val);
> else
> ret = dw_pcie_wr_own_conf(pp, where, size, val);
> diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
> index 3063b35..2d6dd66 100644
> --- a/drivers/pci/host/pcie-designware.h
> +++ b/drivers/pci/host/pcie-designware.h
> @@ -62,6 +62,10 @@ struct pcie_host_ops {
> u32 val, void __iomem *dbi_base);
> int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val);
> int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val);
> + int (*rd_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
> + unsigned int devfn, int where, int size, u32 *val);
> + int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
> + unsigned int devfn, int where, int size, u32 val);
> int (*link_up)(struct pcie_port *pp);
> void (*host_init)(struct pcie_port *pp);
> };
Reviewed-by: Pratyush Anand <pratyush.anand@st.com>
> --
> 1.7.9.5
next prev parent reply other threads:[~2014-06-18 6:37 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-10 18:51 [PATCH v2 0/8] Add Keystone PCIe controller driver Murali Karicheri
2014-06-10 18:51 ` [PATCH v2 1/8] PCI: designware: add rd[wr]_other_conf API Murali Karicheri
2014-06-18 6:37 ` Pratyush Anand [this message]
2014-06-10 18:51 ` [PATCH v2 2/8] PCI: designware: refactor host init code to re-use on v3.65 DW pci hw Murali Karicheri
2014-06-18 7:05 ` Pratyush Anand
2014-06-20 18:47 ` Murali Karicheri
2014-06-23 5:05 ` Pratyush Anand
2014-06-23 5:26 ` Mohit KUMAR DCG
2014-06-20 18:47 ` Murali Karicheri
2014-06-10 18:51 ` [PATCH v2 3/8] PCI: designware: update pcie core driver to work with dw hw version 3.65 Murali Karicheri
2014-06-18 7:13 ` Mohit KUMAR DCG
2014-06-20 17:27 ` Murali Karicheri
2014-06-20 17:29 ` Santosh Shilimkar
2014-06-10 18:51 ` [PATCH v2 4/8] PCI: designware: add msi controller functions for v3.65 hw Murali Karicheri
2014-06-18 7:16 ` Mohit KUMAR DCG
2014-06-10 18:51 ` [PATCH v2 5/8] PCI: designware: add PCI controller functions for v3.65 DW hw Murali Karicheri
2014-06-10 18:51 ` [PATCH v2 6/8] phy: Add serdes phy driver for keystone Murali Karicheri
2014-06-10 18:51 ` [PATCH v2 7/8] PCI: keystone: add pcie driver based on designware core driver Murali Karicheri
2014-06-10 18:51 ` [PATCH v2 8/8] ARM: keystone: add pcie related options Murali Karicheri
2014-06-18 0:08 ` [PATCH v2 0/8] Add Keystone PCIe controller driver Bjorn Helgaas
2014-06-18 0:31 ` Jingoo Han
2014-06-20 15:31 ` Murali Karicheri
2014-06-20 17:11 ` Santosh Shilimkar
2014-06-20 19:05 ` Arnd Bergmann
2014-06-23 5:32 ` Pratyush Anand
[not found] ` <53A85ACE.9070506@ti.com>
2014-06-24 16:08 ` Murali Karicheri
2014-06-24 16:58 ` Murali Karicheri
2014-06-23 1:44 ` Jingoo Han
2014-06-18 10:14 ` Mohit KUMAR DCG
2014-06-20 17:03 ` Murali Karicheri
2014-06-20 21:17 ` Murali Karicheri
2014-06-23 5:13 ` Pratyush Anand
[not found] ` <53A85AAC.4070401@ti.com>
2014-06-24 16:21 ` Murali Karicheri
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