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From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: Thor Thayer <tthayer.linux@gmail.com>
Cc: Thor Thayer <tthayer@altera.com>,
	Rob Herring <robherring2@gmail.com>,
	pawel.moll@arm.com, Mark Rutland <mark.rutland@arm.com>,
	ijc+devicetree@hellion.org.uk, Kumar Gala <galak@codeaurora.org>,
	Rob Landley <rob@landley.net>,
	linux@arm.linux.org.uk, Dinh Nguyen <dinguyen@altera.com>,
	dougthompson@xmission.com, Grant Likely <grant.likely@linaro.org>,
	Borislav Petkov <bp@alien8.de>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org
Subject: Re: [PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller
Date: Sun, 22 Jun 2014 20:41:24 +0200	[thread overview]
Message-ID: <20140622184124.GC8053@pengutronix.de> (raw)
In-Reply-To: <CAF03EBeUdrqfjOPCf4XxaKL_ZSqAcrgSbpDfTKov9_5oG4-Btg@mail.gmail.com>

On Sun, Jun 22, 2014 at 01:31:02PM -0500, Thor Thayer wrote:
> On Sat, Jun 21, 2014 at 4:04 AM, Steffen Trumtrar
> <s.trumtrar@pengutronix.de> wrote:
> > Hi!
> >
> > On Fri, Jun 20, 2014 at 06:22:01PM -0500, tthayer@altera.com wrote:
> >> From: Thor Thayer <tthayer@altera.com>
> >>
> >> Addition of the Altera SDRAM Controller bindings and device tree changes.
> >>
> >> v2: Changes to SoC SDRAM EDAC code.
> >>
> >> v3: Implement code suggestions for SDRAM EDAC code.
> >>
> >> v4: Remove syscon from SDRAM controller bindings.
> >>
> >> v5: No Change, bump version for consistency.
> >>
> >> v6: Only map the ctrlcfg register as syscon.
> >>
> >> Signed-off-by: Thor Thayer <tthayer@altera.com>
> >> ---
> >>  .../bindings/arm/altera/socfpga-sdram.txt          |   11 +++++++++++
> >>  arch/arm/boot/dts/socfpga.dtsi                     |    5 +++++
> >>  2 files changed, 16 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt
> >> new file mode 100644
> >> index 0000000..5027026
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt
> >> @@ -0,0 +1,11 @@
> >> +Altera SOCFPGA SDRAM Controller
> >> +
> >> +Required properties:
> >> +- compatible : "altr,sdr-ctl";
> >> +- reg : Should contain 1 register ranges(address and length)
> >> +
> >> +Example:
> >> +     sdrctl@ffc25000 {
> >> +             compatible = "altr,sdr-ctl";
> >> +             reg = <0xffc25000 0x4>;
> >> +     };
> >> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> >> index 4676f25..310292e 100644
> >> --- a/arch/arm/boot/dts/socfpga.dtsi
> >> +++ b/arch/arm/boot/dts/socfpga.dtsi
> >> @@ -682,6 +682,11 @@
> >>                       clocks = <&l4_sp_clk>;
> >>               };
> >>
> >> +             sdrctl@ffc25000 {
> >> +                     compatible = "altr,sdr-ctl", "syscon";
> >
> > Did you forget to add the syscon to the binding documentation?
> >
> Hi Steffen,
> 
> I guess I'm confused about when to use syscon. In my last series, I
> was advised not to include syscon in the bindings but to use it in the
> device tree. I had been including it in the binding document until
> this patch.
> 

Oh, aha. Well, then I'm confused, too. Let's wait for one of the DT
binding guys than.

Regards,
Steffen

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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  reply	other threads:[~2014-06-22 18:41 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-20 23:22 [PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller tthayer
2014-06-20 23:22 ` [PATCHv6 2/3] devicetree: Addition of the Altera SDRAM EDAC tthayer
2014-06-21  9:06   ` Steffen Trumtrar
     [not found]     ` <20140621090618.GB8053-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-06-22 18:31       ` Thor Thayer
2014-06-20 23:22 ` [PATCHv6 3/3] edac: altera: Add EDAC support for SDRAM Ctlr tthayer
     [not found]   ` <1403306523-4174-4-git-send-email-tthayer-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org>
2014-06-23 19:13     ` Dinh Nguyen
2014-06-21  9:04 ` [PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller Steffen Trumtrar
2014-06-22 18:31   ` Thor Thayer
2014-06-22 18:41     ` Steffen Trumtrar [this message]
  -- strict thread matches above, loose matches on Subject: below --
2014-06-20 23:16 Add EDAC support for Altera SDRAM Controller tthayer
2014-06-20 23:16 ` [PATCHv6 1/3] devicetree: Addition of the Altera SDRAM controller tthayer

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