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From: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
To: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: "shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org"
	<shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Subject: Re: [PATCH 5/5] ARM: imx: Add Freescale LS1021A SMP support
Date: Wed, 2 Jul 2014 12:30:58 +0100	[thread overview]
Message-ID: <20140702113058.GF14665@leverpostej> (raw)
In-Reply-To: <1404291772-2644-6-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

On Wed, Jul 02, 2014 at 10:02:52AM +0100, Jingchang Lu wrote:
> From: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> 
> Freescale LS1021A SoC deploys two cortex-A7 processors,
> this adds bring-up support for the secondary core.
> 
> Signed-off-by: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
>  arch/arm/mach-imx/common.h       |  2 ++
>  arch/arm/mach-imx/headsmp.S      | 11 ++++++++++
>  arch/arm/mach-imx/mach-ls1021a.c |  1 +
>  arch/arm/mach-imx/platsmp.c      | 44 ++++++++++++++++++++++++++++++++++++++++
>  4 files changed, 58 insertions(+)

[...]

> diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
> index de5047c..fdd93d9 100644
> --- a/arch/arm/mach-imx/headsmp.S
> +++ b/arch/arm/mach-imx/headsmp.S
> @@ -29,3 +29,14 @@ ENTRY(v7_secondary_startup)
>  	set_diag_reg
>  	b	secondary_startup
>  ENDPROC(v7_secondary_startup)
> +
> +ENTRY(ls1021a_secondary_startup)
> +	/* set CNTFREQ of secondary core */
> +	ldr	r0, =12500000
> +	mcr 	p15, 0, r0, c14, c0, 0
> +	/* disable Physical and Virtural Timer */
> +	mov	r0, #0x0
> +	mcr	p15, 0, r0, c14, c2, 1
> +	mcr	p15, 0, r0, c14, c3, 1
> +	b	secondary_startup

Urrgh...

What about CNTVOFF? That's been a source of problems elsewhere.

Is the boot CPU set up correctly?

Is that frequency always going to be correct?

[...]

> +static void __init ls1021a_smp_init_cpus(void)
> +{
> +	int i, ncores;
> +	/* get number of cores from CP15 L2 controller register(L2CTLR)*/
> +	asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (ncores));
> +
> +	ncores = ((ncores >> 24) & 0x3) + 1;
> +	for (i = ncores; i < NR_CPUS; i++)
> +		set_cpu_possible(i, false);
> +}

NAK.

This information is _already_ in the DT. This adds more code to do
redundant work, and it's broken.

The physical<->logical CPU ID mapping is arbitrary, so you set arbitrary
CPUs as being online despite this not necessarily being the case.

Get rid of this, and rely on the DT being correct. There;s no reason it
shouldn't be for a new platform.

Thanks,
Mark.
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  parent reply	other threads:[~2014-07-02 11:30 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-02  9:02 [PATCH 0/5] ARM: imx: Add Freescale LS1021A SoC and board support Jingchang Lu
     [not found] ` <1404291772-2644-1-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-07-02  9:02   ` [PATCH 1/5] ARM: dts: Add SoC level device tree support for LS1021A Jingchang Lu
     [not found]     ` <1404291772-2644-2-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-07-02 11:14       ` Mark Rutland
2014-07-03  7:58         ` Jingchang Lu
     [not found]           ` <c0f6813bc62a41b19790158d761d6652-AZ66ij2kwab4MB1ZSnT4iOO6mTEJWrR4XA4E9RH9d+qIuWR1G4zioA@public.gmane.org>
2014-07-03 10:10             ` Mark Rutland
2014-07-02  9:02   ` [PATCH 2/5] ARM: dts: Add initial LS1021A QDS board dts support Jingchang Lu
2014-07-02  9:02   ` [PATCH 4/5] ARM: imx: Add initial support for Freescale LS1021A Jingchang Lu
     [not found]     ` <1404291772-2644-5-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-07-02 11:21       ` Mark Rutland
2014-07-03 10:17         ` Jingchang Lu
     [not found]           ` <cb01fef2c4d44711b04a321fddae33d4-AZ66ij2kwab4MB1ZSnT4iOO6mTEJWrR4XA4E9RH9d+qIuWR1G4zioA@public.gmane.org>
2014-07-03 15:12             ` Mark Rutland
2014-07-04  6:21               ` Jingchang Lu
2014-07-02  9:02   ` [PATCH 5/5] ARM: imx: Add Freescale LS1021A SMP support Jingchang Lu
     [not found]     ` <1404291772-2644-6-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-07-02 11:30       ` Mark Rutland [this message]
2014-07-04 10:16         ` Jingchang Lu
2014-07-02  9:02 ` [PATCH 3/5] ARM: dts: Add initial LS1021A TWR board dts support Jingchang Lu

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