From: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Boris BREZILLON
<b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
"Gupta, Pekon\"" <pekon-l0cyMroinI0@public.gmane.org>,
Ezequiel Garcia
<ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Jason Gunthorpe
<jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>
Subject: Re: [PATCH] mtd: nand: stm_nand_bch: add new driver
Date: Tue, 8 Jul 2014 09:58:55 +0200 [thread overview]
Message-ID: <20140708095855.29c2fb87@bbrezillon> (raw)
In-Reply-To: <20140707235222.GC7537@ld-irv-0074>
Hi Brian,
On Mon, 7 Jul 2014 16:52:22 -0700
Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Hi Boris,
>
> On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
> > On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> > > On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
> > > > +
> > > > + nand_timing0: nand-timing {
> > > > + sig-setup = <10>;
> > > > + sig-hold = <10>;
> > > > + CE-deassert = <0>;
> > > > + WE-to-RBn = <100>;
> > > > + wr-on = <10>;
> > > > + wr-off = <30>;
> > > > + rd-on = <10>;
> > > > + rd-off = <30>;
> > > > + chip-delay = <30>; /* delay in us */
> > > > + };
> > >
> > > You didn't document any of this node. And I don't think we want to
> > > specify every single timing parameter in DT; it may make sense to use
> > > Boris Brezillon's approach (I note this further down, in the driver
> > > code) for mapping non-ONFI NAND timings into a compatible ONFI timing
> > > mode. This will greatly simplify the bindings needed, since it's
> > > standardized and auto-detectable in many cases.
> >
> >
> > AFAIR, the NAND timing representation for non-ONFI chips question was
> > left unanswered:
> >
> > https://lkml.org/lkml/2014/5/20/581
> >
> > I can definitely respin my NAND timings series, but I'd like to be sure
> > this is how you want it done before doing so.
>
> Can we start by supporting ONFI-only (or ONFI-only, plus entries in
> nand_flash_ids[]), and have nand_base provide the translation so drivers
> can retrieve the info? Then we can begin supporting new drivers like
> Lee's, and worry about the DT question separately.
So, basically, I just send a new series with patch 1 and 2 from my sunxi
NAND series [1] (including the fixes you suggested, of course), right ?
[1] http://thread.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7977
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
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next prev parent reply other threads:[~2014-07-08 7:58 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1401268805-26043-1-git-send-email-lee.jones@linaro.org>
2014-07-03 0:22 ` [PATCH] mtd: nand: stm_nand_bch: add new driver Brian Norris
2014-07-03 8:05 ` Boris BREZILLON
2014-07-07 23:52 ` Brian Norris
2014-07-08 7:58 ` Boris BREZILLON [this message]
2014-07-09 17:22 ` Brian Norris
2014-07-03 9:09 ` Gupta, Pekon
2014-07-08 0:16 ` Brian Norris
[not found] ` <20980858CB6D3A4BAE95CA194937D5E73EAFAFF1-yXqyApvAXouIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2014-08-05 14:23 ` Lee Jones
2014-08-05 21:02 ` pekon
[not found] ` <d4ba973a22bd71eaff94be1f479c5334-+F4LgK8oP1VBDgjK7y7TUQ@public.gmane.org>
2014-08-19 2:12 ` Brian Norris
2014-08-20 18:02 ` pekon
2014-07-31 16:47 ` Lee Jones
2014-07-31 17:54 ` Brian Norris
2014-08-01 9:27 ` Lee Jones
2014-08-19 2:42 ` Brian Norris
2014-08-06 10:44 ` Lee Jones
2014-08-06 10:26 ` Lee Jones
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