From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pavel Machek Subject: Re: [PATCH 3/3] ARM: dts: socfpga: memreserve first 4KB for SMP code Date: Thu, 14 Aug 2014 23:03:19 +0200 Message-ID: <20140814210319.GC26857@amd.pavel.ucw.cz> References: <1408031491-15609-1-git-send-email-dinguyen@opensource.altera.com> <1408031491-15609-4-git-send-email-dinguyen@opensource.altera.com> <20140814185432.GE11558@amd.pavel.ucw.cz> <53ED2295.3020700@opensource.altera.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <53ED2295.3020700-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Dinh Nguyen Cc: dinh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org, tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org, vbridger-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org On Thu 2014-08-14 15:56:53, Dinh Nguyen wrote: > > > On 8/14/14, 1:54 PM, Pavel Machek wrote: > > On Thu 2014-08-14 10:51:31, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote: > >> From: Dinh Nguyen > >> > >> The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to > >> bring secondary cores online. This patch adds a /memreserve/ section to > >> reserve the first 4K for the SMP trampoline code. > >> > >> Signed-off-by: Dinh Nguyen > >> --- > >> arch/arm/boot/dts/socfpga_arria5.dtsi | 1 + > >> arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 + > >> 2 files changed, 2 insertions(+) > >> > >> diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi > >> index 468fc4c..73b939e 100644 > >> --- a/arch/arm/boot/dts/socfpga_arria5.dtsi > >> +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi > >> @@ -15,6 +15,7 @@ > >> */ > >> > >> /dts-v1/; > >> +/memreserve/ 0x00000000 0x0001000; > > > > Actually, comment here explaining that ROM code uses 0x0 for the > > trampoline would be nice here... if I understand it correctly. > > Sure...I'll add a single line comment. Thanks. You can add my acked-by then :-). Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html