Re: [PATCH v3 1/5] of: Add NVIDIA Tegra Legacy Interrupt Controller binding

[Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

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On Tue, Aug 26, 2014 at 11:59:13AM -0600, Stephen Warren wrote:
> On 08/26/2014 12:41 AM, Thierry Reding wrote:
> >From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> >
> >The Legacy Interrupt Controller found on NVIDIA Tegra SoCs is used by
> >the AVP coprocessor and can also serve as a backup for the ARM Cortex
> >CPU's local interrupt controller (GIC).
> >
> >The LIC is subdivided into multiple identical units, each handling 32
> >possible interrupt sources.
> 
> If I apply this series without patch 2, which is necessary to test the
> support for compatibility with old DTs, then I get the following very early
> on in boot:
> 
> Other than that, I would apply this.

Ugh... this is because before patch 3 the code would always initialize
all five controllers, even on Tegra20 where it doesn't exist. Patch 3
adds a check for that based on the chip ID, which due to other patches
merged for v3.17 isn't available at this point. One solution would be
for this to be moved into an initcall to make sure it's called after
initialization of the fuse driver so that tegra_get_chip_id() can read
the chip ID. But since you're not at all a fan of that I guess the best
we can do is to match on the top-level machine compatible instead of
using the chip ID.

Thierry

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