* [PATCH 1/6] ARM: dts: OMAP3+: Add PRM interrupt
2014-08-22 14:03 [PATCH 0/6] ARM: dts: OMAP5+: Fixes for pinctrl support Nishanth Menon
@ 2014-08-22 14:03 ` Nishanth Menon
2014-09-09 0:58 ` Tony Lindgren
[not found] ` <1408716235-26164-1-git-send-email-nm-l0cyMroinI0@public.gmane.org>
` (4 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Nishanth Menon @ 2014-08-22 14:03 UTC (permalink / raw)
To: Tony Lindgren, Tero Kristo, Paul Walmsley, Benoît Cousson
Cc: Kevin Hilman, linux-arm-kernel, linux-omap, linux-kernel, Keerthy,
Santosh Shilimkar, devicetree, Nishanth Menon
Provide OMAP3, 4 and OMAP5 with interrupt number for PRM
And for DRA7, provide crossbar number for prm interrupt.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 1 +
arch/arm/boot/dts/omap3.dtsi | 1 +
arch/arm/boot/dts/omap4.dtsi | 1 +
arch/arm/boot/dts/omap5.dtsi | 1 +
4 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 97f603c..7a3e011 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -89,6 +89,7 @@
prm: prm@4ae06000 {
compatible = "ti,dra7-prm";
reg = <0x4ae06000 0x3000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
prm_clocks: clocks {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 575a49b..3136ed1 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -97,6 +97,7 @@
prm: prm@48306000 {
compatible = "ti,omap3-prm";
reg = <0x48306000 0x4000>;
+ interrupts = <11>;
prm_clocks: clocks {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 69408b5..7375d44 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -129,6 +129,7 @@
prm: prm@4a306000 {
compatible = "ti,omap4-prm";
reg = <0x4a306000 0x3000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
prm_clocks: clocks {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index fc8df17..df0a09b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -131,6 +131,7 @@
prm: prm@4ae06000 {
compatible = "ti,omap5-prm";
reg = <0x4ae06000 0x3000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
prm_clocks: clocks {
#address-cells = <1>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/6] ARM: dts: OMAP3+: Add PRM interrupt
2014-08-22 14:03 ` [PATCH 1/6] ARM: dts: OMAP3+: Add PRM interrupt Nishanth Menon
@ 2014-09-09 0:58 ` Tony Lindgren
0 siblings, 0 replies; 9+ messages in thread
From: Tony Lindgren @ 2014-09-09 0:58 UTC (permalink / raw)
To: Nishanth Menon
Cc: Tero Kristo, Paul Walmsley, Benoît Cousson, Kevin Hilman,
linux-arm-kernel, linux-omap, linux-kernel, Keerthy,
Santosh Shilimkar, devicetree
* Nishanth Menon <nm@ti.com> [140822 07:08]:
> Provide OMAP3, 4 and OMAP5 with interrupt number for PRM
>
> And for DRA7, provide crossbar number for prm interrupt.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
I've picked this patch only into omap-for-v3.18/soc as
this is needed for Felipe's intc related changes to work
properly with the wake-up interrupts for DT based booting
for off-idle.
So please don't include this patch into your pull request
for the other dts changes you have.
Regards,
Tony
> ---
> arch/arm/boot/dts/dra7.dtsi | 1 +
> arch/arm/boot/dts/omap3.dtsi | 1 +
> arch/arm/boot/dts/omap4.dtsi | 1 +
> arch/arm/boot/dts/omap5.dtsi | 1 +
> 4 files changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 97f603c..7a3e011 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -89,6 +89,7 @@
> prm: prm@4ae06000 {
> compatible = "ti,dra7-prm";
> reg = <0x4ae06000 0x3000>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
>
> prm_clocks: clocks {
> #address-cells = <1>;
> diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> index 575a49b..3136ed1 100644
> --- a/arch/arm/boot/dts/omap3.dtsi
> +++ b/arch/arm/boot/dts/omap3.dtsi
> @@ -97,6 +97,7 @@
> prm: prm@48306000 {
> compatible = "ti,omap3-prm";
> reg = <0x48306000 0x4000>;
> + interrupts = <11>;
>
> prm_clocks: clocks {
> #address-cells = <1>;
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 69408b5..7375d44 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -129,6 +129,7 @@
> prm: prm@4a306000 {
> compatible = "ti,omap4-prm";
> reg = <0x4a306000 0x3000>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
>
> prm_clocks: clocks {
> #address-cells = <1>;
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index fc8df17..df0a09b 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -131,6 +131,7 @@
> prm: prm@4ae06000 {
> compatible = "ti,omap5-prm";
> reg = <0x4ae06000 0x3000>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
>
> prm_clocks: clocks {
> #address-cells = <1>;
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 9+ messages in thread
[parent not found: <1408716235-26164-1-git-send-email-nm-l0cyMroinI0@public.gmane.org>]
* [PATCH 2/6] ARM: dts: OMAP5: switch to compatible pinctrl
[not found] ` <1408716235-26164-1-git-send-email-nm-l0cyMroinI0@public.gmane.org>
@ 2014-08-22 14:03 ` Nishanth Menon
0 siblings, 0 replies; 9+ messages in thread
From: Nishanth Menon @ 2014-08-22 14:03 UTC (permalink / raw)
To: Tony Lindgren, Tero Kristo, Paul Walmsley, Benoît Cousson
Cc: Kevin Hilman, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Keerthy, Santosh Shilimkar,
devicetree-u79uwXL29TY76Z2rM5mHXA, Nishanth Menon
Now that ti,omap5-padconf is available, switch over to that compatible
property. Retain pinctrl-single for legacy support.
While at it, mark pinctrl as interrupt controller so that it can be
used with interrupts-extended property for wakeup events.
Signed-off-by: Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>
---
arch/arm/boot/dts/omap5.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index df0a09b..04acda6 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -188,18 +188,22 @@
};
omap5_pmx_core: pinmux@4a002840 {
- compatible = "ti,omap4-padconf", "pinctrl-single";
+ compatible = "ti,omap5-padconf", "pinctrl-single";
reg = <0x4a002840 0x01b6>;
#address-cells = <1>;
#size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
omap5_pmx_wkup: pinmux@4ae0c840 {
- compatible = "ti,omap4-padconf", "pinctrl-single";
+ compatible = "ti,omap5-padconf", "pinctrl-single";
reg = <0x4ae0c840 0x0038>;
#address-cells = <1>;
#size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/6] ARM: dts: DRA7: switch to compatible pinctrl
2014-08-22 14:03 [PATCH 0/6] ARM: dts: OMAP5+: Fixes for pinctrl support Nishanth Menon
2014-08-22 14:03 ` [PATCH 1/6] ARM: dts: OMAP3+: Add PRM interrupt Nishanth Menon
[not found] ` <1408716235-26164-1-git-send-email-nm-l0cyMroinI0@public.gmane.org>
@ 2014-08-22 14:03 ` Nishanth Menon
2014-08-22 14:03 ` [PATCH 4/6] ARM: dts: AM437x: " Nishanth Menon
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Nishanth Menon @ 2014-08-22 14:03 UTC (permalink / raw)
To: Tony Lindgren, Tero Kristo, Paul Walmsley, Benoît Cousson
Cc: Kevin Hilman, linux-arm-kernel, linux-omap, linux-kernel, Keerthy,
Santosh Shilimkar, devicetree, Nishanth Menon
Now that ti,dra7-padconf is available, switch over to that compatible
property. Retain pinctrl-single for legacy support.
While at it, mark pinctrl as interrupt controller so that it can be used
with interrupts-extended property for wakeup events.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 7a3e011..4e4ce96 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -218,10 +218,12 @@
};
dra7_pmx_core: pinmux@4a003400 {
- compatible = "pinctrl-single";
+ compatible = "ti,dra7-padconf", "pinctrl-single";
reg = <0x4a003400 0x0464>;
#address-cells = <1>;
#size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x3fffffff>;
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/6] ARM: dts: AM437x: switch to compatible pinctrl
2014-08-22 14:03 [PATCH 0/6] ARM: dts: OMAP5+: Fixes for pinctrl support Nishanth Menon
` (2 preceding siblings ...)
2014-08-22 14:03 ` [PATCH 3/6] ARM: dts: DRA7: " Nishanth Menon
@ 2014-08-22 14:03 ` Nishanth Menon
2014-08-22 14:03 ` [PATCH 5/6] ARM: dts: OMAP5/DRA7: switch over to interrupts-extended property for UART Nishanth Menon
2014-08-22 14:03 ` [PATCH 6/6] ARM: dts: dra7-evm: Mark uart1 rxd as wakeup capable Nishanth Menon
5 siblings, 0 replies; 9+ messages in thread
From: Nishanth Menon @ 2014-08-22 14:03 UTC (permalink / raw)
To: Tony Lindgren, Tero Kristo, Paul Walmsley, Benoît Cousson
Cc: Kevin Hilman, linux-arm-kernel, linux-omap, linux-kernel, Keerthy,
Santosh Shilimkar, devicetree, Nishanth Menon
Now that ti,am437-padconf is available, switch over to that compatible
property. Retain pinctrl-single for legacy support.
While at it, mark the pinctrl as interrupt controller so that it can
be used with interrupts-extended property for wakeup events.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 9b3d2ba..b384830 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -58,10 +58,12 @@
};
am43xx_pinmux: pinmux@44e10800 {
- compatible = "pinctrl-single";
+ compatible = "ti,am437-padconf", "pinctrl-single";
reg = <0x44e10800 0x31c>;
#address-cells = <1>;
#size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 5/6] ARM: dts: OMAP5/DRA7: switch over to interrupts-extended property for UART
2014-08-22 14:03 [PATCH 0/6] ARM: dts: OMAP5+: Fixes for pinctrl support Nishanth Menon
` (3 preceding siblings ...)
2014-08-22 14:03 ` [PATCH 4/6] ARM: dts: AM437x: " Nishanth Menon
@ 2014-08-22 14:03 ` Nishanth Menon
2014-08-22 14:03 ` [PATCH 6/6] ARM: dts: dra7-evm: Mark uart1 rxd as wakeup capable Nishanth Menon
5 siblings, 0 replies; 9+ messages in thread
From: Nishanth Menon @ 2014-08-22 14:03 UTC (permalink / raw)
To: Tony Lindgren, Tero Kristo, Paul Walmsley, Benoît Cousson
Cc: Kevin Hilman, linux-arm-kernel, linux-omap, linux-kernel, Keerthy,
Santosh Shilimkar, devicetree, Nishanth Menon
We've had deeper idle states working on omaps for few years now,
but only in the legacy mode. When booted with device tree, the
wake-up events did not have a chance to work until commit
3e6cee1786a1 ("pinctrl: single: Add support for wake-up interrupts")
that recently got merged. In addition to that we also needed
commit 79d9701559a9 ("of/irq: create interrupts-extended property")
that's now also merged.
Note that there's no longer need to specify the wake-up bit in
the pinctrl settings, the request_irq on the wake-up pin takes
care of that.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 20 ++++++++++----------
arch/arm/boot/dts/omap5.dtsi | 12 ++++++------
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 4e4ce96..45cb91f 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -331,7 +331,7 @@
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
status = "disabled";
@@ -340,7 +340,7 @@
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
- interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
status = "disabled";
@@ -349,7 +349,7 @@
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
status = "disabled";
@@ -358,7 +358,7 @@
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
status = "disabled";
@@ -367,7 +367,7 @@
uart5: serial@48066000 {
compatible = "ti,omap4-uart";
reg = <0x48066000 0x100>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
clock-frequency = <48000000>;
status = "disabled";
@@ -376,7 +376,7 @@
uart6: serial@48068000 {
compatible = "ti,omap4-uart";
reg = <0x48068000 0x100>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
clock-frequency = <48000000>;
status = "disabled";
@@ -385,7 +385,7 @@
uart7: serial@48420000 {
compatible = "ti,omap4-uart";
reg = <0x48420000 0x100>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart7";
clock-frequency = <48000000>;
status = "disabled";
@@ -394,7 +394,7 @@
uart8: serial@48422000 {
compatible = "ti,omap4-uart";
reg = <0x48422000 0x100>;
- interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart8";
clock-frequency = <48000000>;
status = "disabled";
@@ -403,7 +403,7 @@
uart9: serial@48424000 {
compatible = "ti,omap4-uart";
reg = <0x48424000 0x100>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart9";
clock-frequency = <48000000>;
status = "disabled";
@@ -412,7 +412,7 @@
uart10: serial@4ae2b000 {
compatible = "ti,omap4-uart";
reg = <0x4ae2b000 0x100>;
- interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart10";
clock-frequency = <48000000>;
status = "disabled";
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 04acda6..fe2effd 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -452,7 +452,7 @@
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
};
@@ -460,7 +460,7 @@
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
@@ -468,7 +468,7 @@
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
@@ -476,7 +476,7 @@
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
- interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
@@ -484,7 +484,7 @@
uart5: serial@48066000 {
compatible = "ti,omap4-uart";
reg = <0x48066000 0x100>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
clock-frequency = <48000000>;
};
@@ -492,7 +492,7 @@
uart6: serial@48068000 {
compatible = "ti,omap4-uart";
reg = <0x48068000 0x100>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
clock-frequency = <48000000>;
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 6/6] ARM: dts: dra7-evm: Mark uart1 rxd as wakeup capable
2014-08-22 14:03 [PATCH 0/6] ARM: dts: OMAP5+: Fixes for pinctrl support Nishanth Menon
` (4 preceding siblings ...)
2014-08-22 14:03 ` [PATCH 5/6] ARM: dts: OMAP5/DRA7: switch over to interrupts-extended property for UART Nishanth Menon
@ 2014-08-22 14:03 ` Nishanth Menon
[not found] ` <1408716235-26164-7-git-send-email-nm-l0cyMroinI0@public.gmane.org>
5 siblings, 1 reply; 9+ messages in thread
From: Nishanth Menon @ 2014-08-22 14:03 UTC (permalink / raw)
To: Tony Lindgren, Tero Kristo, Paul Walmsley, Benoît Cousson
Cc: Kevin Hilman, linux-arm-kernel, linux-omap, linux-kernel, Keerthy,
Santosh Shilimkar, devicetree, Nishanth Menon
Mark rxd as wakeupcapable for 115200n8 no hardware-flow control
configuration. If h/w flow control is being used, then rts/cts
appropriately should be used.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm/boot/dts/dra7-evm.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 50f8022..a329177 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -303,6 +303,8 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
+ interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH
+ &dra7_pmx_core 0x3e0>;
};
&uart2 {
--
1.7.9.5
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