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From: Vinod Koul <vinod.koul@intel.com>
To: Srikanth Thokala <sthokal@xilinx.com>
Cc: devicetree@vger.kernel.org, Levente Kurusa <levex@linux.com>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	svemula@xilinx.com, Michal Simek <michal.simek@xilinx.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	dmaengine@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	anirudh@xilinx.com, Grant Likely <grant.likely@linaro.org>,
	"Williams, Dan J" <dan.j.williams@intel.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 2/2] dma: Add Xilinx AXI Direct Memory Access Engine driver support
Date: Tue, 9 Sep 2014 21:27:16 +0530	[thread overview]
Message-ID: <20140909155716.GN1610@intel.com> (raw)
In-Reply-To: <CA+mB=1KarJGUYTZu=2k46gqt3oMAuYawfq+H=Lxa7YVqcThjCw@mail.gmail.com>

On Tue, Sep 09, 2014 at 12:52:16AM +0530, Srikanth Thokala wrote:
> Hi Vinod,
> 
> On Thu, Sep 4, 2014 at 12:06 PM, Vinod Koul <vinod.koul@intel.com> wrote:
> > On Wed, Sep 03, 2014 at 12:17:43PM +0530, Srikanth Thokala wrote:
> >> Hi Vinod,
> >>
> >> Apologies for the delay.
> >>
> >> On Tue, Aug 19, 2014 at 10:33 PM, Vinod Koul <vinod.koul@intel.com> wrote:
> >> > On Mon, Jul 28, 2014 at 05:47:49PM +0530, Srikanth Thokala wrote:
> >> >> +struct xilinx_dma_chan {
> >> >> +     struct xilinx_dma_device *xdev;
> >> >> +     u32 ctrl_offset;
> >> >> +     spinlock_t lock;
> >> >> +     struct list_head pending_list;
> >> >> +     struct xilinx_dma_tx_descriptor *active_desc;
> >> >> +     struct xilinx_dma_tx_descriptor *allocated_desc;
> >> >> +     struct list_head done_list;
> >> >> +     struct list_head free_seg_list;
> >> >> +     struct dma_chan common;
> >> >> +     struct xilinx_dma_tx_segment *seg_v;
> >> >> +     dma_addr_t seg_p;
> >> >> +     struct device *dev;
> >> >> +     int irq;
> >> >> +     int id;
> >> >> +     enum dma_transfer_direction direction;
> >> > This looks suspect. Why should channel have direction, for a descriptor it
> >> > makes sense though.
> >>
> >> The channel only supports transfers in one direction. Either from memory to
> >> peripheral or from peripheral to memory, that's fixed and can't be changed
> >> at runtime.  So, the driver needs to know which direction the channel supports
> >> and hence it can reject transfers with the wrong direction.
> > But you already have this information in descriptor so why duplicate?
> 
> Our descriptor doesn't have the information of channel direction, we have this
> information only in the chan structure (struct xilinx_dma_chan) which
> is populated
> while parsing the DT.  So, we use this information to ensure if we are servicing
> proper channel (in prep_slave_sg call).
One of the argument of prep_slave_sg call is direction. You need to use that
and store in in your descriptor for using it afterwards

> FYI: We also need the direction of the channel so that we can select SRC/DST
> register address in the issue_pending() call.
And you have the descriptor there as well so can use it

-- 
~Vinod

  reply	other threads:[~2014-09-09 15:57 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-28 12:17 [PATCH v3 1/2] dma: Add Xilinx AXI DMA DT Binding Documentation Srikanth Thokala
2014-07-28 12:17 ` [PATCH v3 2/2] dma: Add Xilinx AXI Direct Memory Access Engine driver support Srikanth Thokala
2014-08-01  4:59   ` Srikanth Thokala
2014-08-08  9:13     ` Michal Simek
     [not found]   ` <1406549869-24422-2-git-send-email-sthokal-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-08-19 17:03     ` Vinod Koul
2014-09-03  6:47       ` Srikanth Thokala
     [not found]         ` <CA+mB=1L14Os=ZdJzj8_+XXa+oq4ZOS_kadQHpKQ2yws2tqGVSQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-09-04  6:36           ` Vinod Koul
     [not found]             ` <20140904063613.GD1610-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2014-09-08 19:22               ` Srikanth Thokala
2014-09-09 15:57                 ` Vinod Koul [this message]
2014-09-10  6:59                   ` Srikanth Thokala
     [not found] ` <1406549869-24422-1-git-send-email-sthokal-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-07-28 12:28   ` [PATCH v3 1/2] dma: Add Xilinx AXI DMA DT Binding Documentation Arnd Bergmann
2014-07-28 12:37     ` Srikanth Thokala
2014-08-19 17:05   ` Vinod Koul

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