* [PATCH 0/2] Add clock binding id for rk3288
@ 2014-09-24 13:36 Kever Yang
[not found] ` <1411565795-26966-1-git-send-email-kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2014-09-25 22:01 ` [PATCH 0/2] Add " Mike Turquette
0 siblings, 2 replies; 4+ messages in thread
From: Kever Yang @ 2014-09-24 13:36 UTC (permalink / raw)
To: heiko, Mike Turquette
Cc: dianders, sonnyrao, addy.ke, cf, xjq, hj, huangtao,
linux-rockchip, Kever Yang, devicetree, Kumar Gala, linux-kernel,
Ian Campbell, Rob Herring, Pawel Moll, Mark Rutland,
linux-arm-kernel
This patch add some clock binding id for different modules
that under development and going to send upstream.
This patch also add the clock node in PD_VIDEO.
Kever Yang (2):
clk: rockchip: add some needed clock binding id for rk3288
clk: rockchip: use the clock id for nodes init
drivers/clk/rockchip/clk-rk3288.c | 79 +++++++++++++++++++---------------
include/dt-bindings/clock/rk3288-cru.h | 38 +++++++++++++++-
2 files changed, 82 insertions(+), 35 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 4+ messages in thread[parent not found: <1411565795-26966-1-git-send-email-kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* [PATCH 1/2] clk: rockchip: add some needed clock binding id for rk3288
[not found] ` <1411565795-26966-1-git-send-email-kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
@ 2014-09-24 13:36 ` Kever Yang
2014-09-24 14:06 ` Heiko Stübner
0 siblings, 1 reply; 4+ messages in thread
From: Kever Yang @ 2014-09-24 13:36 UTC (permalink / raw)
To: heiko-4mtYJXux2i+zQB+pC5nmwQ, Mike Turquette
Cc: dianders-F7+t8E8rja9g9hUCZPvPmw, sonnyrao-F7+t8E8rja9g9hUCZPvPmw,
addy.ke-TNX95d0MmH7DzftRWevZcw, cf-TNX95d0MmH7DzftRWevZcw,
xjq-TNX95d0MmH7DzftRWevZcw, hj-TNX95d0MmH7DzftRWevZcw,
huangtao-TNX95d0MmH7DzftRWevZcw,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Kever Yang,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
This patch add some clock binding id for different modules
that under development and going to send upstream.
Signed-off-by: Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
include/dt-bindings/clock/rk3288-cru.h | 38 +++++++++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index ebcb460..ee579ff 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -61,6 +61,15 @@
#define SCLK_LCDC_PWM1 101
#define SCLK_MAC_RX 102
#define SCLK_MAC_TX 103
+#define SCLK_EDP_24M 104
+#define SCLK_EDP 105
+#define SCLK_RGA 106
+#define SCLK_ISP 107
+#define SCLK_ISP_JPE 108
+#define SCLK_HDMI_HDCP 109
+#define SCLK_HDMI_CEC 110
+#define SCLK_HEVC_CABAC 111
+#define SCLK_HEVC_CORE 112
#define DCLK_VOP0 190
#define DCLK_VOP1 191
@@ -75,6 +84,16 @@
#define ACLK_VOP1 198
#define ACLK_CRYPTO 199
#define ACLK_RGA 200
+#define ACLK_RGA_NIU 201
+#define ACLK_IEP 202
+#define ACLK_VIO0_NIU 203
+#define ACLK_VIP 204
+#define ACLK_ISP 205
+#define ACLK_VIO1_NIU 206
+#define ACLK_HEVC 207
+#define ACLK_VCODEC 208
+#define ACLK_CPU 209
+#define ACLK_PERI 210
/* pclk gates */
#define PCLK_GPIO0 320
@@ -112,6 +131,15 @@
#define PCLK_PS2C 352
#define PCLK_TIMER 353
#define PCLK_TZPC 354
+#define PCLK_EDP_CTRL 355
+#define PCLK_MIPI_DSI0 356
+#define PCLK_MIPI_DSI1 357
+#define PCLK_MIPI_CSI 358
+#define PCLK_LVDS_PHY 359
+#define PCLK_HDMI_CTRL 360
+#define PCLK_VIO2_H2P 361
+#define PCLK_CPU 362
+#define PCLK_PERI 363
/* hclk gates */
#define HCLK_GPS 448
@@ -137,8 +165,16 @@
#define HCLK_IEP 468
#define HCLK_ISP 469
#define HCLK_RGA 470
+#define HCLK_VIO_AHB_ARBI 471
+#define HCLK_VIO_NIU 472
+#define HCLK_VIP 473
+#define HCLK_VIO2_H2P 474
+#define HCLK_HEVC 475
+#define HCLK_VCODEC 476
+#define HCLK_CPU 477
+#define HCLK_PERI 478
-#define CLK_NR_CLKS (HCLK_RGA + 1)
+#define CLK_NR_CLKS (HCLK_PERI + 1)
/* soft-reset indices */
#define SRST_CORE0 0
--
1.9.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 1/2] clk: rockchip: add some needed clock binding id for rk3288
2014-09-24 13:36 ` [PATCH 1/2] clk: rockchip: add some needed " Kever Yang
@ 2014-09-24 14:06 ` Heiko Stübner
0 siblings, 0 replies; 4+ messages in thread
From: Heiko Stübner @ 2014-09-24 14:06 UTC (permalink / raw)
To: Kever Yang
Cc: Mike Turquette, dianders, sonnyrao, addy.ke, cf, xjq, hj,
huangtao, linux-rockchip, Rob Herring, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, devicetree, linux-kernel
Am Mittwoch, 24. September 2014, 21:36:34 schrieb Kever Yang:
> This patch add some clock binding id for different modules
> that under development and going to send upstream.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>
> include/dt-bindings/clock/rk3288-cru.h | 38
> +++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1
> deletion(-)
>
> diff --git a/include/dt-bindings/clock/rk3288-cru.h
> b/include/dt-bindings/clock/rk3288-cru.h index ebcb460..ee579ff 100644
> --- a/include/dt-bindings/clock/rk3288-cru.h
> +++ b/include/dt-bindings/clock/rk3288-cru.h
> @@ -61,6 +61,15 @@
> #define SCLK_LCDC_PWM1 101
> #define SCLK_MAC_RX 102
> #define SCLK_MAC_TX 103
> +#define SCLK_EDP_24M 104
> +#define SCLK_EDP 105
> +#define SCLK_RGA 106
> +#define SCLK_ISP 107
> +#define SCLK_ISP_JPE 108
> +#define SCLK_HDMI_HDCP 109
> +#define SCLK_HDMI_CEC 110
> +#define SCLK_HEVC_CABAC 111
> +#define SCLK_HEVC_CORE 112
>
> #define DCLK_VOP0 190
> #define DCLK_VOP1 191
> @@ -75,6 +84,16 @@
> #define ACLK_VOP1 198
> #define ACLK_CRYPTO 199
> #define ACLK_RGA 200
> +#define ACLK_RGA_NIU 201
> +#define ACLK_IEP 202
> +#define ACLK_VIO0_NIU 203
> +#define ACLK_VIP 204
> +#define ACLK_ISP 205
> +#define ACLK_VIO1_NIU 206
> +#define ACLK_HEVC 207
> +#define ACLK_VCODEC 208
> +#define ACLK_CPU 209
> +#define ACLK_PERI 210
>
> /* pclk gates */
> #define PCLK_GPIO0 320
> @@ -112,6 +131,15 @@
> #define PCLK_PS2C 352
> #define PCLK_TIMER 353
> #define PCLK_TZPC 354
> +#define PCLK_EDP_CTRL 355
> +#define PCLK_MIPI_DSI0 356
> +#define PCLK_MIPI_DSI1 357
> +#define PCLK_MIPI_CSI 358
> +#define PCLK_LVDS_PHY 359
> +#define PCLK_HDMI_CTRL 360
> +#define PCLK_VIO2_H2P 361
> +#define PCLK_CPU 362
> +#define PCLK_PERI 363
>
> /* hclk gates */
> #define HCLK_GPS 448
> @@ -137,8 +165,16 @@
> #define HCLK_IEP 468
> #define HCLK_ISP 469
> #define HCLK_RGA 470
> +#define HCLK_VIO_AHB_ARBI 471
> +#define HCLK_VIO_NIU 472
> +#define HCLK_VIP 473
> +#define HCLK_VIO2_H2P 474
> +#define HCLK_HEVC 475
> +#define HCLK_VCODEC 476
> +#define HCLK_CPU 477
> +#define HCLK_PERI 478
>
> -#define CLK_NR_CLKS (HCLK_RGA + 1)
> +#define CLK_NR_CLKS (HCLK_PERI + 1)
>
> /* soft-reset indices */
> #define SRST_CORE0 0
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 0/2] Add clock binding id for rk3288
2014-09-24 13:36 [PATCH 0/2] Add clock binding id for rk3288 Kever Yang
[not found] ` <1411565795-26966-1-git-send-email-kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
@ 2014-09-25 22:01 ` Mike Turquette
1 sibling, 0 replies; 4+ messages in thread
From: Mike Turquette @ 2014-09-25 22:01 UTC (permalink / raw)
To: heiko
Cc: dianders, sonnyrao, addy.ke, cf, xjq, hj, huangtao,
linux-rockchip, Kever Yang, devicetree, Kumar Gala, linux-kernel,
Ian Campbell, Rob Herring, Pawel Moll, Mark Rutland,
linux-arm-kernel
Quoting Kever Yang (2014-09-24 06:36:33)
> This patch add some clock binding id for different modules
> that under development and going to send upstream.
>
> This patch also add the clock node in PD_VIDEO.
Applied both patches to clk-next and fixed up the comment block locally.
Regards,
Mike
>
>
> Kever Yang (2):
> clk: rockchip: add some needed clock binding id for rk3288
> clk: rockchip: use the clock id for nodes init
>
> drivers/clk/rockchip/clk-rk3288.c | 79 +++++++++++++++++++---------------
> include/dt-bindings/clock/rk3288-cru.h | 38 +++++++++++++++-
> 2 files changed, 82 insertions(+), 35 deletions(-)
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2014-09-24 13:36 [PATCH 0/2] Add clock binding id for rk3288 Kever Yang
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2014-09-24 13:36 ` [PATCH 1/2] clk: rockchip: add some needed " Kever Yang
2014-09-24 14:06 ` Heiko Stübner
2014-09-25 22:01 ` [PATCH 0/2] Add " Mike Turquette
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