From: Mark Rutland <mark.rutland@arm.com>
To: Emil Medve <Emilian.Medve@freescale.com>
Cc: "scottwood@freescale.com" <scottwood@freescale.com>,
"galak@kernel.crashing.org" <galak@kernel.crashing.org>,
"corbet@lwn.net" <corbet@lwn.net>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"ijc+devicetree@hellion.org.uk" <ijc+devicetree@hellion.org.uk>,
"galak@codeaurora.org" <galak@codeaurora.org>,
Pawel Moll <Pawel.Moll@arm.com>,
"Geoff.Thorpe@freescale.com" <Geoff.Thorpe@freescale.com>,
"linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>
Subject: Re: [PATCH 2/4] dt/bindings: Introduce the FSL QorIQ DPAA BMan portal(s)
Date: Thu, 23 Oct 2014 12:16:22 +0100 [thread overview]
Message-ID: <20141023111622.GB13690@leverpostej> (raw)
In-Reply-To: <54480DE6.4090604@Freescale.com>
On Wed, Oct 22, 2014 at 09:04:54PM +0100, Emil Medve wrote:
> Hello Mark,
>
>
> Thanks for having a look at this
>
> On 10/22/2014 09:29 AM, Mark Rutland wrote:
> > On Wed, Oct 22, 2014 at 03:09:30PM +0100, Emil Medve wrote:
> >> Portals are used by software running on processor cores, accelerators and
> >> network interfaces to communicate with the BMan
> >
> > What exactly is a portal?
> >
> > Is it a region of shared memory? A device?
>
> In a nutshell a (software, i.e. processor core accessible) portal is a
> memory mapped interface to the B/QMan that allows low latency, lock-less
> interaction by logically separated units of software. The original
> intent was to have one affine portal per core. As of now we're
> sprinkling portals to use from various (core affine) contexts:
> hypervisor, guests, user-space, containers, etc.
>
> I'll make the definition more palatable in the next round
Thanks,
> > I only received emails 2 and 3 of this series, so I'm lacking the
> > context necessary to understand the bindings.
>
> Some bubble in the pipe... As of now they all seem to have hit the
> e-mail list(s), patchwork and hopefully your Inbox
They've all come through now, yes.
I'd expected to see the relevant code too -- in isolation the bindings
are somewhat difficult to grok.
>
> >> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
> >> Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95
> >> ---
> >> .../bindings/powerpc/fsl/bman-portals.txt | 50 ++++++++++++++++++++++
> >> 1 file changed, 50 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt
> >> new file mode 100644
> >> index 0000000..40e607e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt
> >> @@ -0,0 +1,50 @@
> >> +QorIQ DPAA Buffer Manager Portals Device Tree Binding
> >> +
> >> +Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
> >> +
> >> +CONTENTS
> >> +
> >> + - BMan Portal
> >> + - Example
> >> +
> >> +NOTE: The bindings described in this document are preliminary and subject to
> >> + change
> >
> > While we've tried that elsewhere, unstable DT bindings have been shown
> > to be a major source of pain.
>
> Agreed
>
> > I'd feel rather uncomfortable accepting a
> > binding that we already believe to be insufficient to describe the
> > hardware.
> >
> > What do you expect to change?
>
> Related bindings seem incomplete. As such, the PAMU binding (pamu.txt)
> covers incompletely a dynamic LIODN assignment/programming model. The
> current driver uses a static assignment scheme that the binding needs to
> include. I also suspect that once the driver starts supporting the
> dynamic LIODN assignment/programming we might find some wrinkles
Ok. Given that the driver doesn't seem to be in mainline (per a quick
grep), just put "DO NOT MERGE" or something like that in the commit
message. Once this is merged you're going to need to support it.
> >> +BMan Portal Node
> >> +
> >> +PROPERTIES
> >> +
> >> +- compatible
> >> + Usage: Required
> >> + Value type: <stringlist>
> >> + Definition: Must include "fsl,bman-portal-<hardware revision>"
> >> + May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal"
> >> +
> >> +- reg
> >> + Usage: Required
> >> + Value type: <prop-encoded-array>
> >> + Definition: Two regions. The first is the cache-enabled region of
> >> + the portal. The second is the cache-inhibited region of
> >> + the portal
> >> +
> >> +EXAMPLE
> >> +
> >> +The example below shows a (P4080) BMan portals container/bus node with two portals
> >
> > Is there any particular reason to place these under a simple-bus?
>
> I think they fit the ePAPR definition for simple-bus container. They can
> be accessed directly and can be used independently. What are you suggesting?
>
> >> +
> >> + bman-portals@ff4000000 {
> >> + #address-cells = <1>;
> >> + #size-cells = <1>;
> >> + compatible = "simple-bus";
> >> + ranges = <0 0xf 0xf4000000 0x200000>;
> >> +
> >> + bman-portal@0 {
> >> + compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
> >> + reg = <0x0 0x4000 0x100000 0x1000>;
> >
> > It would be easier to read is each entry had its own set of brackets.
> > Initially this looked to me like a single 64-bit address/size pair.
>
> Something like <>, <>?
So here we'd have:
reg = <0x000000 0x4000>,
<0x100000 0x1000>;
> It doesn't seem widely used but I agree is more readable. I can
> include it in the the next spin
Thanks.
>
> >> + interrupts = <105 2 0 0>;
> >> + };
> >
> > Given the description above, surely you need to know what the portal is
> > used for? Or is that queried from the portal?
>
> We don't need/want to include such information in the DT. Portals are
> "allocated" dynamically and used by the respective context
Ok. So they have no fixed purpose and software allocates as necessary?
There are no constraints on how each portal may be used, or which portal
another agetn might use?
Thanks,
Mark.
next prev parent reply other threads:[~2014-10-23 11:16 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-22 14:09 [PATCH 1/4] dt/bindings: Introduce the FSL QorIQ DPAA BMan Emil Medve
2014-10-22 14:09 ` [PATCH 2/4] dt/bindings: Introduce the FSL QorIQ DPAA BMan portal(s) Emil Medve
2014-10-22 14:29 ` Mark Rutland
2014-10-22 20:04 ` Emil Medve
2014-10-23 11:16 ` Mark Rutland [this message]
2014-10-23 13:28 ` Geoff Thorpe
2014-10-24 9:26 ` Emil Medve
2014-10-28 18:09 ` Scott Wood
2014-10-22 14:09 ` [PATCH 3/4] dt/bindings: Introduce the FSL QorIQ DPAA QMan Emil Medve
2014-10-22 14:37 ` Mark Rutland
2014-10-22 20:05 ` Emil Medve
2014-10-23 11:26 ` Mark Rutland
2014-10-23 13:51 ` Geoff Thorpe
2014-10-24 9:53 ` Emil Medve
2014-10-22 14:09 ` [PATCH 4/4] dt/bindings: Introduce the FSL QorIQ DPAA QMan portal(s) Emil Medve
2014-10-28 18:27 ` Scott Wood
[not found] ` <1413986972-621-1-git-send-email-Emilian.Medve-eDlz3WWmN0ll57MIdRCFDg@public.gmane.org>
2014-10-28 14:36 ` [PATCH 1/4] dt/bindings: Introduce the FSL QorIQ DPAA BMan Kumar Gala
[not found] ` <EA33D307-CCDA-4A30-9386-46FA832FE0CA-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-10-28 18:08 ` Scott Wood
[not found] ` <1414519738.23458.84.camel__4795.38602890006$1414521743$gmane$org@snotra.buserror.net>
2014-10-29 21:40 ` Emil Medve
2014-10-29 22:16 ` Scott Wood
[not found] ` <1414620996.23458.141.camel__29590.7804662876$1414621051$gmane$org@snotra.buserror.net>
2014-10-30 4:32 ` Emil Medve
2014-10-30 14:51 ` Scott Wood
[not found] ` <1414680683.23458.148.camel__4514.07629666409$1414680744$gmane$org@snotra.buserror.net>
2014-10-30 16:19 ` Emil Medve
2014-10-30 16:29 ` Scott Wood
[not found] ` <1414686590.23458.151.camel__44619.4786033176$1414686664$gmane$org@snotra.buserror.net>
2014-10-30 16:45 ` Emil Medve
2014-10-30 21:26 ` Scott Wood
2014-10-30 21:30 ` Emil Medve
2014-10-30 15:10 ` Varun Sethi
2014-10-28 18:19 ` Scott Wood
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