From: David Cohen <david.a.cohen@linux.intel.com>
To: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Gregory Clement <gregory.clement@free-electrons.com>,
linux-arm-kernel@lists.infradead.org,
Tawfik Bayouk <tawfik@marvell.com>,
Nadav Haklai <nadavh@marvell.com>,
Lior Amsalem <alior@marvell.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
devicetree@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
Alexandre Courbot <gnurou@gmail.com>,
linux-gpio@vger.kernel.org
Subject: Re: [PATCH 06/17] gpio: mvebu: add suspend/resume support
Date: Fri, 24 Oct 2014 09:30:52 -0700 [thread overview]
Message-ID: <20141024163051.GG4529@psi-dev26.jf.intel.com> (raw)
In-Reply-To: <1414151970-6626-7-git-send-email-thomas.petazzoni@free-electrons.com>
On Fri, Oct 24, 2014 at 01:59:19PM +0200, Thomas Petazzoni wrote:
> This commit adds the implementation of ->suspend() and ->resume()
> platform_driver hooks in order to save and restore the state of the
> GPIO configuration. In order to achieve that, additional fields are
> added to the mvebu_gpio_chip structure.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Alexandre Courbot <gnurou@gmail.com>
> Cc: linux-gpio@vger.kernel.org
> ---
> drivers/gpio/gpio-mvebu.c | 99 +++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 99 insertions(+)
>
> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
> index 418e386..dd5545c 100644
> --- a/drivers/gpio/gpio-mvebu.c
> +++ b/drivers/gpio/gpio-mvebu.c
> @@ -83,6 +83,14 @@ struct mvebu_gpio_chip {
> int irqbase;
> struct irq_domain *domain;
> int soc_variant;
> +
> + /* Used to preserve GPIO registers accross suspend/resume */
> + u32 out_reg;
> + u32 io_conf_reg;
> + u32 blink_en_reg;
> + u32 in_pol_reg;
> + u32 edge_mask_regs[4];
> + u32 level_mask_regs[4];
> };
>
> /*
> @@ -554,6 +562,93 @@ static const struct of_device_id mvebu_gpio_of_match[] = {
> };
> MODULE_DEVICE_TABLE(of, mvebu_gpio_of_match);
>
> +static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
> +{
> + struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev);
> + int i;
> +
> + mvchip->out_reg = readl(mvebu_gpioreg_out(mvchip));
> + mvchip->io_conf_reg = readl(mvebu_gpioreg_io_conf(mvchip));
> + mvchip->blink_en_reg = readl(mvebu_gpioreg_blink(mvchip));
> + mvchip->in_pol_reg = readl(mvebu_gpioreg_in_pol(mvchip));
> +
> + switch (mvchip->soc_variant) {
> + case MVEBU_GPIO_SOC_VARIANT_ORION:
> + mvchip->edge_mask_regs[0] =
> + readl(mvchip->membase + GPIO_EDGE_MASK_OFF);
> + mvchip->level_mask_regs[0] =
> + readl(mvchip->membase + GPIO_LEVEL_MASK_OFF);
> + break;
> + case MVEBU_GPIO_SOC_VARIANT_MV78200:
> + for (i = 0; i < 2; i++) {
> + mvchip->edge_mask_regs[i] =
> + readl(mvchip->membase +
> + GPIO_EDGE_MASK_MV78200_OFF(i));
> + mvchip->level_mask_regs[i] =
> + readl(mvchip->membase +
> + GPIO_LEVEL_MASK_MV78200_OFF(i));
> + }
> + break;
> + case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
> + for (i = 0; i < 4; i++) {
> + mvchip->edge_mask_regs[i] =
> + readl(mvchip->membase +
> + GPIO_EDGE_MASK_ARMADAXP_OFF(i));
> + mvchip->level_mask_regs[i] =
> + readl(mvchip->membase +
> + GPIO_LEVEL_MASK_ARMADAXP_OFF(i));
> + }
> + break;
> + default:
> + BUG();
Isn't it too severe? Is the platform going too unstable if driver
reaches this case?
I'd consider a WARN() instead.
> + }
> +
> + return 0;
> +}
> +
> +static int mvebu_gpio_resume(struct platform_device *pdev)
> +{
> + struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev);
> + int i;
> +
> + writel(mvchip->out_reg, mvebu_gpioreg_out(mvchip));
> + writel(mvchip->io_conf_reg, mvebu_gpioreg_io_conf(mvchip));
> + writel(mvchip->blink_en_reg, mvebu_gpioreg_blink(mvchip));
> + writel(mvchip->in_pol_reg, mvebu_gpioreg_in_pol(mvchip));
> +
> + switch (mvchip->soc_variant) {
> + case MVEBU_GPIO_SOC_VARIANT_ORION:
> + writel(mvchip->edge_mask_regs[0],
> + mvchip->membase + GPIO_EDGE_MASK_OFF);
> + writel(mvchip->level_mask_regs[0],
> + mvchip->membase + GPIO_LEVEL_MASK_OFF);
> + break;
> + case MVEBU_GPIO_SOC_VARIANT_MV78200:
> + for (i = 0; i < 2; i++) {
> + writel(mvchip->edge_mask_regs[i],
> + mvchip->membase + GPIO_EDGE_MASK_MV78200_OFF(i));
> + writel(mvchip->level_mask_regs[i],
> + mvchip->membase +
> + GPIO_LEVEL_MASK_MV78200_OFF(i));
> + }
> + break;
> + case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
> + for (i = 0; i < 4; i++) {
> + writel(mvchip->edge_mask_regs[i],
> + mvchip->membase +
> + GPIO_EDGE_MASK_ARMADAXP_OFF(i));
> + writel(mvchip->level_mask_regs[i],
> + mvchip->membase +
> + GPIO_LEVEL_MASK_ARMADAXP_OFF(i));
> + }
> + break;
> + default:
> + BUG();
Ditto.
Br, David Cohen
> + }
> +
> + return 0;
> +}
> +
> static int mvebu_gpio_probe(struct platform_device *pdev)
> {
> struct mvebu_gpio_chip *mvchip;
> @@ -577,6 +672,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
> if (!mvchip)
> return -ENOMEM;
>
> + platform_set_drvdata(pdev, mvchip);
> +
> if (of_property_read_u32(pdev->dev.of_node, "ngpios", &ngpios)) {
> dev_err(&pdev->dev, "Missing ngpios OF property\n");
> return -ENODEV;
> @@ -735,5 +832,7 @@ static struct platform_driver mvebu_gpio_driver = {
> .of_match_table = mvebu_gpio_of_match,
> },
> .probe = mvebu_gpio_probe,
> + .suspend = mvebu_gpio_suspend,
> + .resume = mvebu_gpio_resume,
> };
> module_platform_driver(mvebu_gpio_driver);
> --
> 2.0.0
>
> --
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> More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2014-10-24 16:30 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-24 11:59 [PATCH 00/17] Suspend to RAM support for Armada XP Thomas Petazzoni
2014-10-24 11:59 ` [PATCH 01/17] Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller Thomas Petazzoni
[not found] ` <1414151970-6626-2-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-03 17:05 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 02/17] ARM: mvebu: enable strex backoff delay Thomas Petazzoni
2014-11-03 17:08 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 03/17] irqchip: irq-armada-370-xp: use proper return value for ->set_affinity() Thomas Petazzoni
2014-11-03 17:20 ` Gregory CLEMENT
[not found] ` <1414151970-6626-4-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-07 4:09 ` Jason Cooper
2014-10-24 11:59 ` [PATCH 05/17] clocksource: time-armada-370-xp: add suspend/resume support Thomas Petazzoni
[not found] ` <1414151970-6626-6-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-03 17:45 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 06/17] gpio: mvebu: " Thomas Petazzoni
2014-10-24 16:30 ` David Cohen [this message]
2014-10-24 20:45 ` Andrew Lunn
2014-10-27 5:27 ` Alexandre Courbot
2014-10-27 17:45 ` David Cohen
2014-10-31 7:00 ` Linus Walleij
2014-10-31 7:52 ` Gregory CLEMENT
2014-10-31 8:14 ` Thomas Petazzoni
2014-11-03 13:26 ` Linus Walleij
2014-11-03 13:29 ` Linus Walleij
2014-11-03 17:53 ` Gregory CLEMENT
2014-11-03 21:21 ` Thomas Petazzoni
2014-10-24 11:59 ` [PATCH 09/17] clk: mvebu: add suspend/resume for gatable clocks Thomas Petazzoni
[not found] ` <1414151970-6626-10-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-04 9:32 ` Gregory CLEMENT
[not found] ` <1414151970-6626-1-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-10-24 11:59 ` [PATCH 04/17] irqchip: irq-armada-370-xp: suspend/resume support Thomas Petazzoni
2014-11-03 17:38 ` Gregory CLEMENT
2014-11-13 16:32 ` Thomas Petazzoni
2014-10-24 11:59 ` [PATCH 07/17] bus: mvebu-mbus: " Thomas Petazzoni
[not found] ` <1414151970-6626-8-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-03 18:08 ` Gregory CLEMENT
[not found] ` <5457C495.7080403-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-03 21:20 ` Thomas Petazzoni
2014-10-24 11:59 ` [PATCH 08/17] bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration Thomas Petazzoni
[not found] ` <1414151970-6626-9-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-04 9:17 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 10/17] ARM: mvebu: implement suspend/resume support for Armada XP Thomas Petazzoni
[not found] ` <1414151970-6626-11-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-04 10:00 ` Gregory CLEMENT
[not found] ` <5458A3CE.70900-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-13 17:00 ` Thomas Petazzoni
2014-10-24 11:59 ` [PATCH 11/17] ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume Thomas Petazzoni
[not found] ` <1414151970-6626-12-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-04 10:09 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 12/17] ARM: mvebu: Armada XP GP specific suspend/resume code Thomas Petazzoni
[not found] ` <1414151970-6626-13-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-10-24 14:20 ` Andrew Lunn
[not found] ` <20141024142044.GB3142-g2DYL2Zd6BY@public.gmane.org>
2014-10-24 14:28 ` Thomas Petazzoni
[not found] ` <20141024162824.67f9ce3d-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-10-24 14:51 ` Andrew Lunn
[not found] ` <20141024145119.GD3142-g2DYL2Zd6BY@public.gmane.org>
2014-10-27 12:51 ` Thomas Petazzoni
[not found] ` <20141027135129.292bd882-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-10-27 14:19 ` Andrew Lunn
[not found] ` <20141027141958.GB12627-g2DYL2Zd6BY@public.gmane.org>
2014-10-27 14:40 ` Thomas Petazzoni
[not found] ` <20141027154049.583e4cd2-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-10-27 14:59 ` Andrew Lunn
[not found] ` <20141027145939.GD12627-g2DYL2Zd6BY@public.gmane.org>
2014-10-27 15:12 ` Thomas Petazzoni
[not found] ` <20141027161226.199cca96-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-10-27 15:15 ` Andrew Lunn
2014-11-10 13:53 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 13/17] ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume Thomas Petazzoni
[not found] ` <1414151970-6626-14-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-10 14:05 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 14/17] ARM: mvebu: synchronize secondary CPU clocks on resume Thomas Petazzoni
[not found] ` <1414151970-6626-15-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-10 14:12 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 15/17] ARM: mvebu: add suspend/resume DT information for Armada XP GP Thomas Petazzoni
[not found] ` <1414151970-6626-16-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-10 14:14 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 16/17] ARM: mvebu: adjust mbus controller description on Armada 370/XP Thomas Petazzoni
[not found] ` <1414151970-6626-17-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-10 14:15 ` Gregory CLEMENT
2014-10-24 11:59 ` [PATCH 17/17] ARM: mvebu: add SDRAM controller description for Armada XP Thomas Petazzoni
[not found] ` <1414151970-6626-18-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-11-10 14:25 ` Gregory CLEMENT
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