[PATCH v3 00/10] ARM: dts: TI: Add CAN support

[PATCH v3 00/10] ARM: dts: TI: Add CAN support

[Roger Quadros]

Hi Tony,

These patches add CAN support for am33xx, am43xx and dra7 platforms.
They must go in together with CAN driver RAMINIT Syscon support [1].

Tested on am335x-evm, am437x-gp-evm and dra7-evm.

NOTE:
- for DCAN to work on DRA7 we need this patch to keep the CAN PHY powered.
https://lkml.org/lkml/2014/10/21/484

- There is another issue which causes undesired behaviour if WKUPAON and
L4CFG clock domains are allowed to HW_AUTO. Undesired behaviour is in the form
of DCAN1 module being stuck-in-transition when disabled and RAMINIT-done bit
not getting set as part of RAMINIT mechanism. To address these issues there is a patch
to prevent these clockdomains from HW_AUTO.
https://github.com/rogerq/linux/commit/31d6da939dbbaf8ea2ab96ca5680b81cd5607e51
Even without this second patch DCAN seems to work.

cheers,
-roger

Changelog:

v3:
- Move raminit register data into driver data
- rename syscon property to "syscon-raminit"

v2:
- Added vendor prefix "ti," to raminit properties
- Updated am335x dcan nodes

[1] - CAN driver RAMINIT Syscon support
http://article.gmane.org/gmane.linux.can/6773

cheers,
-roger

---
Mugunthan V N (1):
  arm: dts: am437x-gp: Add dcan support

Roger Quadros (9):
  ARM: dts: dra7: Add syscon regmap for CORE CONTROL area
  ARM: dts: DRA7: Add DCAN nodes
  ARM: dts: dra7-evm: Add CAN support
  ARM: dts: dra72-evm: Add CAN support
  ARM: dts: am4372: Add control module syscon node
  ARM: dts: am4372: Add DCAN nodes
  ARM: dts: am33xx: Add control module syscon node
  ARM: dts: am33xx: Update DCAN nodes
  ARM: dts: am335x-evm: Add DCAN1 details

 arch/arm/boot/dts/am335x-evm.dts    | 13 +++++++++++++
 arch/arm/boot/dts/am33xx.dtsi       | 25 +++++++++++++++++--------
 arch/arm/boot/dts/am4372.dtsi       | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/am437x-gp-evm.dts | 26 ++++++++++++++++++++++++++
 arch/arm/boot/dts/dra7-evm.dts      | 23 +++++++++++++++++++++++
 arch/arm/boot/dts/dra7.dtsi         | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/dra72-evm.dts     | 23 +++++++++++++++++++++++
 7 files changed, 156 insertions(+), 8 deletions(-)

-- 
1.8.3.2

[PATCH v3 01/10] ARM: dts: dra7: Add syscon regmap for CORE CONTROL area

[Roger Quadros]

Display and DCAN drivers use syscon regmap to access some registers
in the CORE control area. Add the syscon regmap node for this
area.

Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 9cc9843..5fd52cd 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -201,6 +201,11 @@
 			ti,hwmods = "counter_32k";
 		};
 
+		dra7_ctrl_core: ctrl_core@4a002000 {
+			compatible = "syscon";
+			reg = <0x4a002000 0x6d0>;
+		};
+
 		dra7_ctrl_general: tisyscon@4a002e00 {
 			compatible = "syscon";
 			reg = <0x4a002e00 0x7c>;
-- 
1.8.3.2

[PATCH v3 02/10] ARM: dts: DRA7: Add DCAN nodes

[Roger Quadros]

The SoC supports 2 DCAN nodes. Add them.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5fd52cd..9d84846 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
 		serial3 = &uart4;
 		serial4 = &uart5;
 		serial5 = &uart6;
+		d_can0 = &dcan1;
+		d_can1 = &dcan2;
 	};
 
 	timer {
@@ -1270,6 +1272,26 @@
 			ti,irqs-skip = <10 133 139 140>;
 			ti,irqs-safe-map = <0>;
 		};
+
+		dcan1: can@481cc000 {
+			compatible = "ti,dra7-d_can1";
+			ti,hwmods = "dcan1";
+			reg = <0x4ae3c000 0x2000>;
+			syscon-raminit = <&dra7_ctrl_core 0x558>;
+			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&dcan1_sys_clk_mux>;
+			status = "disabled";
+		};
+
+		dcan2: can@481d0000 {
+			compatible = "ti,dra7-d_can2";
+			ti,hwmods = "dcan2";
+			reg = <0x48480000 0x2000>;
+			syscon-raminit = <&dra7_ctrl_core 0x558>;
+			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sys_clkin1>;
+			status = "disabled";
+		};
 	};
 };
 
-- 
1.8.3.2

[PATCH v3 03/10] ARM: dts: dra7-evm: Add CAN support

[Roger Quadros]

The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.

WAKEUP0 pin doesn't have INPUT enable bit so we just disable
weak PULLs.

The second CAN port cannot be used without hardware modification
so we don't enable the second port.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index c6ce625..8c2c37b 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -171,6 +171,22 @@
 			0xd0	(PIN_OUTPUT | MUX_MODE0)	/* gpmc_be0n_cle */
 		>;
 	};
+
+	dcan1_pins_default: dcan1_pins_default {
+		pinctrl-single,pins = <
+			0x3d0   (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
+			0x3d4   (MUX_MODE15)		/* dcan1_rx.off */
+			0x418   (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
+		>;
+	};
+
+	dcan1_pins_sleep: dcan1_pins_sleep {
+		pinctrl-single,pins = <
+			0x3d0   (MUX_MODE15)	/* dcan1_tx.off */
+			0x3d4   (MUX_MODE15)	/* dcan1_rx.off */
+			0x418   (MUX_MODE15)	/* wakeup0.off */
+		>;
+	};
 };
 
 &i2c1 {
@@ -528,3 +544,10 @@
 	ti,no-reset-on-init;
 	ti,no-idle-on-init;
 };
+
+&dcan1 {
+	status = "ok";
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&dcan1_pins_default>;
+	pinctrl-1 = <&dcan1_pins_sleep>;
+};
-- 
1.8.3.2

[PATCH v3 04/10] ARM: dts: dra72-evm: Add CAN support

[Roger Quadros]

The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.

WAKEUP0 pin doesn't have INPUT enable bit so we just disable
weak PULLs.

The second CAN port cannot be used without hardware modification
so we don't enable the second port.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra72-evm.dts | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4107428..a4b01ce 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -26,6 +26,22 @@
 			0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
 		>;
 	};
+
+	dcan1_pins_default: dcan1_pins_default {
+		pinctrl-single,pins = <
+			0x3d0   (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
+			0x3d4   (MUX_MODE15)		/* dcan1_rx.off */
+			0x418   (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
+		>;
+	};
+
+	dcan1_pins_sleep: dcan1_pins_sleep {
+		pinctrl-single,pins = <
+			0x3d0   (MUX_MODE15)	/* dcan1_tx.off */
+			0x3d4   (MUX_MODE15)	/* dcan1_rx.off */
+			0x418   (MUX_MODE15)	/* wakeup0.off */
+		>;
+	};
 };
 
 &i2c1 {
@@ -142,3 +158,10 @@
 &uart1 {
 	status = "okay";
 };
+
+&dcan1 {
+	status = "ok";
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&dcan1_pins_default>;
+	pinctrl-1 = <&dcan1_pins_sleep>;
+};
-- 
1.8.3.2

[PATCH v3 05/10] ARM: dts: am4372: Add control module syscon node

[Roger Quadros]

Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 46660ff..899c57c 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -57,6 +57,11 @@
 		cache-level = <2>;
 	};
 
+	am43xx_control_module: control_module@4a002000 {
+		compatible = "syscon";
+		reg = <0x44e10000 0x7f4>;
+	};
+
 	am43xx_pinmux: pinmux@44e10800 {
 		compatible = "ti,am437-padconf", "pinctrl-single";
 		reg = <0x44e10800 0x31c>;
-- 
1.8.3.2

[PATCH v3 06/10] ARM: dts: am4372: Add DCAN nodes

[Roger Quadros]

The SoC contains 2 DCAN modules. Add them.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 899c57c..98f81c9 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -901,6 +901,28 @@
 			compatible = "mmio-sram";
 			reg = <0x40300000 0x40000>; /* 256k */
 		};
+
+		dcan0: can@481cc000 {
+			compatible = "ti,am3352-d_can0";
+			ti,hwmods = "d_can0";
+			clocks = <&dcan0_fck>;
+			clock-names = "fck";
+			reg = <0x481cc000 0x2000>;
+			syscon-raminit = <&am43xx_control_module 0x644>;
+			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		dcan1: can@481d0000 {
+			compatible = "ti,am3352-d_can1";
+			ti,hwmods = "d_can1";
+			clocks = <&dcan1_fck>;
+			clock-names = "fck";
+			reg = <0x481d0000 0x2000>;
+			syscon-raminit = <&am43xx_control_module 0x644>;
+			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
 	};
 };
 
-- 
1.8.3.2

[PATCH v3 07/10] arm: dts: am437x-gp: Add dcan support

[Roger Quadros]

From: Mugunthan V N <mugunthanvnm@ti.com>

Add DCAN support for AM437x GP EVM with both DCAN instances.

[Roger Q] Updated output pin to not use pull up.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am437x-gp-evm.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index e7ac47f..58594fd 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -254,6 +254,20 @@
 			0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
 		>;
 	};
+
+	dcan0_default: dcan0_default_pins {
+		pinctrl-single,pins = <
+			0x178 (PIN_OUTPUT | MUX_MODE2)		/* uart1_ctsn.d_can0_tx */
+			0x17c (PIN_INPUT_PULLUP | MUX_MODE2)	/* uart1_rtsn.d_can0_rx */
+		>;
+	};
+
+	dcan1_default: dcan1_default_pins {
+		pinctrl-single,pins = <
+			0x180 (PIN_OUTPUT | MUX_MODE2)		/* uart1_rxd.d_can1_tx */
+			0x184 (PIN_INPUT_PULLUP | MUX_MODE2)	/* uart1_txd.d_can1_rx */
+		>;
+	};
 };
 
 &i2c0 {
@@ -511,3 +525,15 @@
 		};
 	};
 };
+
+&dcan0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dcan0_default>;
+	status = "okay";
+};
+
+&dcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dcan1_default>;
+	status = "okay";
+};
-- 
1.8.3.2

[PATCH v3 08/10] ARM: dts: am33xx: Add control module syscon node

[Roger Quadros]

Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 8318105..9f3058c 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -83,6 +83,11 @@
 		};
 	};
 
+	am33xx_control_module: control_module@4a002000 {
+		compatible = "syscon";
+		reg = <0x44e10000 0x7fc>;
+	};
+
 	am33xx_pinmux: pinmux@44e10800 {
 		compatible = "pinctrl-single";
 		reg = <0x44e10800 0x0238>;
-- 
1.8.3.2

[PATCH v3 09/10] ARM: dts: am33xx: Update DCAN nodes

[Roger Quadros]

Add "raminit-syscon" property to specify the RAMINIT register.
Add clock information.
Rename can nodes from "d_can" to "can" to be compliant
with the ePAPR specs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 9f3058c..f227ba1 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -338,20 +338,24 @@
 			interrupts = <91>;
 		};
 
-		dcan0: d_can@481cc000 {
-			compatible = "bosch,d_can";
+		dcan0: can@481cc000 {
+			compatible = "ti,am3352-d_can0";
 			ti,hwmods = "d_can0";
-			reg = <0x481cc000 0x2000
-				0x44e10644 0x4>;
+			reg = <0x481cc000 0x2000>;
+			clocks = <&dcan0_fck>;
+			clock-names = "fck";
+			syscon-raminitn = <&am33xx_control_module 0x644>;
 			interrupts = <52>;
 			status = "disabled";
 		};
 
-		dcan1: d_can@481d0000 {
-			compatible = "bosch,d_can";
+		dcan1: can@481d0000 {
+			compatible = "ti,am3352-d_can1";
 			ti,hwmods = "d_can1";
-			reg = <0x481d0000 0x2000
-				0x44e10644 0x4>;
+			reg = <0x481d0000 0x2000>;
+			clocks = <&dcan1_fck>;
+			clock-names = "fck";
+			syscon-raminit = <&am33xx_control_module 0x644>;
 			interrupts = <55>;
 			status = "disabled";
 		};
-- 
1.8.3.2

[PATCH v3 10/10] ARM: dts: am335x-evm: Add DCAN1 details

[Roger Quadros]

DCAN1 is routed to CAN port (J11) when Profile 1 is selected on the
profile selection switch.
Provide information for DCAN1 pins and node but keep it disabled
by default. User has to manually enable it if Profile 1 is chosen.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am335x-evm.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index e2156a5..7b7bd8f 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -307,6 +307,13 @@
 			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
 		>;
 	};
+
+	dcan1_pins_default: dcan1_pins_default {
+		pinctrl-single,pins = <
+			0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
+			0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
+		>;
+	};
 };
 
 &uart0 {
@@ -664,3 +671,9 @@
 &aes {
 	status = "okay";
 };
+
+&dcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dcan1_pins_default>;
+	status = "disabled";	/* Enable only if Profile 1 is selected */
+};
-- 
1.8.3.2

Re: [PATCH v3 00/10] ARM: dts: TI: Add CAN support

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141104 02:50]:
> Hi Tony,
> 
> These patches add CAN support for am33xx, am43xx and dra7 platforms.
> They must go in together with CAN driver RAMINIT Syscon support [1].

Can you make this series not depend on [1] for most part without
breaking existing functionality?

Then we can do a single follow-up patch to enable things after [1]
has been merged.

That would remove a dependency between driver changes and .dts changes.

Regards,

Tony

> [1] - CAN driver RAMINIT Syscon support
> http://article.gmane.org/gmane.linux.can/6773

Re: [PATCH v3 00/10] ARM: dts: TI: Add CAN support

[Roger Quadros]

On 11/04/2014 05:55 PM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [141104 02:50]:
>> Hi Tony,
>>
>> These patches add CAN support for am33xx, am43xx and dra7 platforms.
>> They must go in together with CAN driver RAMINIT Syscon support [1].
> 
> Can you make this series not depend on [1] for most part without
> breaking existing functionality?

I just checked that we haven't enabled DCAN on any of the boards
so we don't risk breaking anything even if these 2 series don't go in
together. 

> 
> Then we can do a single follow-up patch to enable things after [1]
> has been merged.
> 
> That would remove a dependency between driver changes and .dts changes.

Apart from patches 1, 3 and 8, that add the control module nodes the rest
pretty much depend on the driver DT binding changes.

I can send them separately if needed.

cheers,
-roger

Re: [PATCH v3 00/10] ARM: dts: TI: Add CAN support

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [141105 03:08]:
> On 11/04/2014 05:55 PM, Tony Lindgren wrote:
> > * Roger Quadros <rogerq@ti.com> [141104 02:50]:
> >> Hi Tony,
> >>
> >> These patches add CAN support for am33xx, am43xx and dra7 platforms.
> >> They must go in together with CAN driver RAMINIT Syscon support [1].
> > 
> > Can you make this series not depend on [1] for most part without
> > breaking existing functionality?
> 
> I just checked that we haven't enabled DCAN on any of the boards
> so we don't risk breaking anything even if these 2 series don't go in
> together. 

OK 
 
> > Then we can do a single follow-up patch to enable things after [1]
> > has been merged.
> > 
> > That would remove a dependency between driver changes and .dts changes.
> 
> Apart from patches 1, 3 and 8, that add the control module nodes the rest
> pretty much depend on the driver DT binding changes.
> 
> I can send them separately if needed.

Well sounds like I can already apply the .dts changes without
affecting anything until the driver changes are merged.

Let me know if that's the case and I'll apply these assuming
the binding is OK and not going to change.

Regards,

Tony

Re: [PATCH v3 00/10] ARM: dts: TI: Add CAN support

[Roger Quadros]

On 11/05/2014 08:49 PM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [141105 03:08]:
>> On 11/04/2014 05:55 PM, Tony Lindgren wrote:
>>> * Roger Quadros <rogerq@ti.com> [141104 02:50]:
>>>> Hi Tony,
>>>>
>>>> These patches add CAN support for am33xx, am43xx and dra7 platforms.
>>>> They must go in together with CAN driver RAMINIT Syscon support [1].
>>>
>>> Can you make this series not depend on [1] for most part without
>>> breaking existing functionality?
>>
>> I just checked that we haven't enabled DCAN on any of the boards
>> so we don't risk breaking anything even if these 2 series don't go in
>> together. 
> 
> OK 
>  
>>> Then we can do a single follow-up patch to enable things after [1]
>>> has been merged.
>>>
>>> That would remove a dependency between driver changes and .dts changes.
>>
>> Apart from patches 1, 3 and 8, that add the control module nodes the rest
>> pretty much depend on the driver DT binding changes.
>>
>> I can send them separately if needed.
> 
> Well sounds like I can already apply the .dts changes without
> affecting anything until the driver changes are merged.
> 
> Let me know if that's the case and I'll apply these assuming
> the binding is OK and not going to change.

There is one change in the binding so I'll have to post a v4.

cheers,
-roger