[PATCH v3] clk_mux: Fix set_parent doing the wrong thing when INDEX_BIT && index >= 3

[PATCH v3] clk_mux: Fix set_parent doing the wrong thing when INDEX_BIT && index >= 3

[Hans de Goede]

If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent,
so theoretically multiple parents could be enabled at the same time, but in
practice only one bit should ever be 1. So to select parent 0, set
the register (*) to 0x01, to select parent 1 set it 0x02, parent 2, 0x04,
parent 3, 0x08, etc.

But the current code does:

                if (mux->flags & CLK_MUX_INDEX_BIT)
                        index = (1 << ffs(index));

Which means that:

For an input index of 0, ffs returns 0, so we set the register
to 0x01, ok.

For an input index of 1, ffs returns 1, so we set the register
to 0x02, ok.

For an input index of 2, ffs returns 2, so we set the register
to 0x04, ok.

For an input index of 3, ffs returns 1, so we set the register
to 0x02, not good!

The code should simply be:

                if (mux->flags & CLK_MUX_INDEX_BIT)
                        index = 1 << index;

Which always does the right thing, this commit fixes this.

Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
 drivers/clk/clk-mux.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 4f96ff3..6e1ecf9 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -77,7 +77,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
 
 	else {
 		if (mux->flags & CLK_MUX_INDEX_BIT)
-			index = (1 << ffs(index));
+			index = 1 << index;
 
 		if (mux->flags & CLK_MUX_INDEX_ONE)
 			index++;
-- 
2.1.0

Re: [PATCH v3] clk_mux: Fix set_parent doing the wrong thing when INDEX_BIT && index >= 3

[Mike Turquette]

Quoting Hans de Goede (2014-11-19 05:48:59)
> If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent,
> so theoretically multiple parents could be enabled at the same time, but in
> practice only one bit should ever be 1. So to select parent 0, set
> the register (*) to 0x01, to select parent 1 set it 0x02, parent 2, 0x04,
> parent 3, 0x08, etc.
> 
> But the current code does:
> 
>                 if (mux->flags & CLK_MUX_INDEX_BIT)
>                         index = (1 << ffs(index));
> 
> Which means that:
> 
> For an input index of 0, ffs returns 0, so we set the register
> to 0x01, ok.
> 
> For an input index of 1, ffs returns 1, so we set the register
> to 0x02, ok.
> 
> For an input index of 2, ffs returns 2, so we set the register
> to 0x04, ok.
> 
> For an input index of 3, ffs returns 1, so we set the register
> to 0x02, not good!
> 
> The code should simply be:
> 
>                 if (mux->flags & CLK_MUX_INDEX_BIT)
>                         index = 1 << index;
> 
> Which always does the right thing, this commit fixes this.
> 
> Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>

Applied to clk-next towards 3.19. I don't think any merged platforms are
hitting this bug in the field so I've not put it into -fixes.

Thanks,
Mike

> ---
>  drivers/clk/clk-mux.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
> index 4f96ff3..6e1ecf9 100644
> --- a/drivers/clk/clk-mux.c
> +++ b/drivers/clk/clk-mux.c
> @@ -77,7 +77,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
>  
>         else {
>                 if (mux->flags & CLK_MUX_INDEX_BIT)
> -                       index = (1 << ffs(index));
> +                       index = 1 << index;
>  
>                 if (mux->flags & CLK_MUX_INDEX_ONE)
>                         index++;
> -- 
> 2.1.0
>