From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Walmsley Subject: [PATCH 09/24] Documentation: DT bindings: add more chip compatible strings for Tegra PWM Date: Wed, 28 Jan 2015 16:49:37 -0700 Message-ID: <20150128234937.20644.4804.stgit@dusk.lan> References: <20150128234935.20644.89300.stgit@dusk.lan> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20150128234935.20644.89300.stgit-orwA252wQtA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Mark Rutland , Alexandre Courbot , Pawel Moll , Ian Campbell , Stephen Warren , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Thierry Reding , linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Kumar Gala , linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org Add compatible strings for the PWM IP blocks present on several Tegra chips. The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 Signed-off-by: Paul Walmsley Cc: Thierry Reding Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Stephen Warren Cc: Alexandre Courbot Cc: linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org --- .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt index c7ea9d4a988b..f3390f602378 100644 --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt @@ -4,6 +4,10 @@ Required properties: - compatible: should be one of: - "nvidia,tegra20-pwm" - "nvidia,tegra30-pwm" + - "nvidia,tegra114-pwm" (not yet matched by the driver) + - "nvidia,tegra124-pwm" (not yet matched by the driver) + - "nvidia,tegra132-pwm" (not yet matched by the driver) + - "nvidia,tegra210-pwm" (not yet matched by the driver) - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. See pwm.txt in this directory for a description of the cells format.