From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Walmsley Subject: [PATCH 04/24] Documentation: DT bindings: add more chip compatible strings for Tegra timers Date: Wed, 28 Jan 2015 16:49:37 -0700 Message-ID: <20150128234937.20644.54294.stgit@dusk.lan> References: <20150128234935.20644.89300.stgit@dusk.lan> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20150128234935.20644.89300.stgit@dusk.lan> Sender: linux-kernel-owner@vger.kernel.org Cc: Mark Rutland , Alexandre Courbot , Pawel Moll , Stephen Warren , Ian Campbell , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Thierry Reding , Paul Walmsley , Kumar Gala , linux-tegra@vger.kernel.org List-Id: devicetree@vger.kernel.org Add compatible strings for the timer IP blocks present on several Tegra chips. The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 N.B. The nvidia,tegra20-timer compatible string is removed from the nvidia,tegra30-timer.txt documentation file because it's already mentioned in the nvidia,tegra20-timer.txt documentation file. Signed-off-by: Paul Walmsley Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Stephen Warren Cc: Thierry Reding Cc: Alexandre Courbot Cc: Paul Walmsley Cc: devicetree@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- .../bindings/timer/nvidia,tegra30-timer.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt index b5082a1cf461..bbf38d26605b 100644 --- a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt @@ -6,7 +6,9 @@ trigger a legacy watchdog reset. Required properties: -- compatible : should be "nvidia,tegra30-timer", "nvidia,tegra20-timer". +- compatible : "nvidia,tegra30-timer" + "nvidia,tegra124-timer" (not yet matched in the driver) + "nvidia,tegra132-timer" (not yet matched in the driver) - reg : Specifies base physical address and size of the registers. - interrupts : A list of 6 interrupts; one per each of timer channels 1 through 5, and one for the shared interrupt for the remaining channels.