From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Walmsley Subject: [PATCH 12/24] Documentation: DT bindings: add more chip compatible strings for Tegra RTC Date: Wed, 28 Jan 2015 16:49:38 -0700 Message-ID: <20150128234937.20644.87268.stgit@dusk.lan> References: <20150128234935.20644.89300.stgit@dusk.lan> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20150128234935.20644.89300.stgit@dusk.lan> Sender: linux-kernel-owner@vger.kernel.org Cc: Mark Rutland , Alexandre Courbot , Pawel Moll , Stephen Warren , Ian Campbell , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Thierry Reding , Paul Walmsley , Kumar Gala , linux-tegra@vger.kernel.org List-Id: devicetree@vger.kernel.org Add compatible strings for the RTC IP blocks present on several Tegra chips. The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 Signed-off-by: Paul Walmsley Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Stephen Warren Cc: Thierry Reding Cc: Alexandre Courbot Cc: Paul Walmsley Cc: devicetree@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- .../devicetree/bindings/rtc/nvidia,tegra20-rtc.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt index 652d1ff2e8be..b6d27e17b5e4 100644 --- a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt +++ b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt @@ -6,7 +6,9 @@ state. Required properties: -- compatible : should be "nvidia,tegra20-rtc". +- compatible : "nvidia,tegra20-rtc" + "nvidia,tegra124-rtc" (not yet matched by the driver) + "nvidia,tegra132-rtc" (not yet matched by the driver) - reg : Specifies base physical address and size of the registers. - interrupts : A single interrupt specifier. - clocks : Must contain one entry, for the module clock.