From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v3 06/10] ARM: dts: sun9i: Add USB host controller nodes to a80 dtsi Date: Sun, 1 Feb 2015 15:17:50 +0100 Message-ID: <20150201141750.GG4827@lukather> References: <1422388455-25923-1-git-send-email-wens@csie.org> <1422388455-25923-7-git-send-email-wens@csie.org> Reply-To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="S5HS5MvDw4DmbRmb" Return-path: Content-Disposition: inline In-Reply-To: <1422388455-25923-7-git-send-email-wens-jdAy2FN1RRM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Chen-Yu Tsai Cc: Mike Turquette , Emilio Lopez , Rob Herring , Grant Likely , Kishon Vijay Abraham I , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --S5HS5MvDw4DmbRmb Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline On Wed, Jan 28, 2015 at 03:54:11AM +0800, Chen-Yu Tsai wrote: > The A80 has 3 EHCI/OHCI USB controllers. > > Signed-off-by: Chen-Yu Tsai > --- > arch/arm/boot/dts/sun9i-a80.dtsi | 70 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 70 insertions(+) > > diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi > index d7ebd9390b01..9483b15bfda7 100644 > --- a/arch/arm/boot/dts/sun9i-a80.dtsi > +++ b/arch/arm/boot/dts/sun9i-a80.dtsi > @@ -355,6 +355,28 @@ > */ > ranges = <0 0 0 0x20000000>; > > + ehci0: usb@00a00000 { > + compatible = "allwinner,sun9i-a80-ehci", "generic-ehci"; > + reg = <0x00a00000 0x100>; > + interrupts = ; > + clocks = <&usb_mod_clk 1>; > + resets = <&usb_mod_clk 17>; > + phys = <&usbphy1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + ohci0: usb@00a00400 { > + compatible = "allwinner,sun9i-a80-ohci", "generic-ohci"; > + reg = <0x00a00400 0x100>; > + interrupts = ; > + clocks = <&usb_mod_clk 1>, <&usb_mod_clk 2>; > + resets = <&usb_mod_clk 17>; > + phys = <&usbphy1>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > usbphy1: phy@00a00800 { > compatible = "allwinner,sun9i-a80-usb-phy"; > reg = <0x00a00800 0x4>; > @@ -366,6 +388,32 @@ > #phy-cells = <0>; > }; > > + ehci1: usb@00a01000 { > + compatible = "allwinner,sun9i-a80-ehci", "generic-ehci"; > + reg = <0x00a01000 0x100>; > + interrupts = ; > + clocks = <&usb_mod_clk 3>; > + resets = <&usb_mod_clk 18>; > + phys = <&usbphy2>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + > + /* > + * Even though ohci1 exists, it is never used as > + * usb1 only has HSIC pins routed externally > + */ > + ohci1: usb@00a01400 { > + compatible = "allwinner,sun9i-a80-ohci", "generic-ohci"; > + reg = <0x00a01400 0x100>; > + interrupts = ; > + clocks = <&usb_mod_clk 3>, <&usb_mod_clk 4>; > + resets = <&usb_mod_clk 18>; > + phys = <&usbphy2>; > + phy-names = "usb"; > + status = "disabled"; > + }; > + Is it worth declaring it then? If it's not never ever going to be used since no pins are routed outside of the SoC, I don't think it should be declared in the DTSI. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --S5HS5MvDw4DmbRmb--