From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lee Jones Subject: Re: [PATCH v2 4/4] clk: dt: Introduce always-on clock domain documentation Date: Thu, 19 Feb 2015 11:13:25 +0000 Message-ID: <20150219111325.GG12212@x1> References: <20150218215435.GA32415@x1> <20150219094200.GB12212@x1> <20150219101106.GD12212@x1> <20150219102810.GE12212@x1> <20150219104332.GF12212@x1> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Geert Uytterhoeven Cc: Rob Herring , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Mike Turquette , Stephen Boyd , kernel@stlinux.com, "devicetree@vger.kernel.org" List-Id: devicetree@vger.kernel.org On Thu, 19 Feb 2015, Geert Uytterhoeven wrote: > On Thu, Feb 19, 2015 at 11:43 AM, Lee Jones wr= ote: > > On Thu, 19 Feb 2015, Geert Uytterhoeven wrote: > >> On Thu, Feb 19, 2015 at 11:28 AM, Lee Jones = wrote: > >> > On Thu, 19 Feb 2015, Geert Uytterhoeven wrote: > >> >> On Thu, Feb 19, 2015 at 11:11 AM, Lee Jones wrote: > >> >> > On Thu, 19 Feb 2015, Geert Uytterhoeven wrote: > >> >> >> On Thu, Feb 19, 2015 at 10:42 AM, Lee Jones wrote: > >> >> >> >> What kind of clocks are these? What do they control? > >> >> >> >> Memory controllers? Bus controllers? > >> >> >> >> > >> >> >> >> They must control some device(s), so there should be one = or more device > >> >> >> >> nodes in DT that reference these clocks. > >> >> >> >> As soon as that information is in DT, support can be adde= d to Linux to > >> >> >> >> make sure the "critical" clocks stay enabled, either thro= ugh a real driver, > >> >> >> >> or through platform code. > >> >> >> > > >> >> >> > Some do, some don't. For instance, we have one clock whic= h controls > >> >> >> > SPI and I2C that must not be turned off. We discovered th= is then when > >> >> >> > a suspend was attempted and the board refused to resume. = This clock > >> >> >> > also runs one of the critical interconnects that runs from= the a9. It > >> >> >> > would be wrong to remove the clk_disable() attempt from th= e SPI/I2C > >> >> >> > drivers because the same IP on another board might be cont= rolled by a > >> >> >> > different clock which is able to be gated. > >> >> >> > > >> >> >> > There are also clocks which control other interconnects th= at are not > >> >> >> > connected to any device drivers. If we fail to take refer= ences for > >> >> >> > them before clk_disable_unused() is called, again the boar= d hangs. We > >> >> >> > even lose JTAG support. > >> >> >> > >> >> >> Interconnects are buses. Can't you represent those buses in = the DT > >> >> >> hierarchy, and give them clocks properties? > >> >> > > >> >> > So instead of this nice succinct, simple, cover all bases > >> >> > (interconnects was just an example, there are bound to be oth= ers), > >> >> > generic framework, you are suggesting to write drivers for de= vices > >> >> > which other than "don't turn my clocks off", Linux can't actu= ally see > >> >> > or control? > >> >> > >> >> DT describes the hardware, not behavior. > >> > > >> > Okay so ... > >> > > >> > /* > >> > * ICNs are not visible/controllable in Linux, but references to= their > >> > * clocks must be obtained and retained or the platform will bec= ome > >> > * irrecoverably unresponsive. > >> > */ > >> > interconnects@0 { > >> > compatible =3D "always-on-clk-domain"; > >> > >> st,...flexgen... > >> > >> > clocks =3D <&clk_s_c0_flexgen CLK_ICN_SBC>, > >> > <&clk_s_c0_flexgen CLK_ICN_LMI>, > >> > <&clk_s_c0_flexgen CLK_ICN_CPU>, > >> > <&clk_s_c0_flexgen CLK_TX_ICN_DMU>; > >> > }; > >> > >> And then you can have platform code that binds against st,...flexg= en..., > >> and enables all referenced clocks. > > > > Flexgen isn't a device, it's a clk source. a) writing a device dri= ver >=20 > Sorry, I'm not familiar with ST nomenclature. > So that should become the name of the interconnect/bus. You're still talking about writing function-less drivers for multiple pieces of h/w. We would have a few for ST alone, then multiply that by the number of silicon vendors with similar issues -- which is likely to be most of them. I can understand Rob's "DT has to match h/w" point, but to insist we write lots of empty drivers just to stop some clocks from being gated is barking mad. > > for a clk source seems wrong b) what if on another platform a > > different clock source supplied the clock? Write another driver? = And > > what if the ICNs are connected to different clock sources? More > > drivers? c) all of these drivers will only do one thing -- pull a > > reference and keep hold of it. You want 50 drivers (across all > > platforms) doing only that? Or, more sanely, do you want this one > > generic framework driver doing that? > > > >> Alternatively, if you have power domains, you can add a reference = to > >> the power domain, and let the power domain driver handle it. > > > > I'm not sure what a power domain driver will do? We need a driver = to > > _not_ give up references, that is all. :) >=20 > A power domain driver can do anything it wants. > That includes enabling your interconnect clocks, and keeping them ena= bled. >=20 > Now, if flexgen is the name of the clock source, then all devices con= nected > to flexgen are part of the flexgen clock domain, which can be represe= nted > in Linux using the generic PM domain. Do all devices connected to fle= xgen > need to be handled similarly w.r.t. clocks? If yes, the genpd may be = the place > to implement that. Most of the FLEXGEN clocks are fully gateable. It's only a select few which are critical to the running of the system. --=20 Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org =E2=94=82 Open source software for ARM SoCs =46ollow Linaro: Facebook | Twitter | Blog